diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h
index fdca7655c6ddf41dbaf35ae53492d30a80904268..f8b9b3ae0401a5d723ab98829206e38fb41fd919 100644 (file)
#include <asm/io.h>
#include <asm/arch/clocks.h>
#include <asm/omap_common.h>
-#include <asm/arch/mux_omap5.h>
+#include <asm/arch/clocks.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct pad_conf_entry {
+ u32 offset;
+ u32 val;
+};
struct omap_sysinfo {
char *board_string;
};
extern const struct omap_sysinfo sysinfo;
-extern struct omap5_prcm_regs *const prcm;
-
void gpmc_init(void);
void watchdog_init(void);
u32 get_device_type(void);
void sr32(void *, u32, u32, u32);
u32 wait_on_value(u32, u32, void *, u32);
void sdelay(unsigned long);
-void omap_rev_string(char *omap_rev_string);
void setup_clocks_for_console(void);
void prcm_init(void);
-void bypass_dpll(u32 *const base);
+void bypass_dpll(u32 const base);
void freq_update_core(void);
u32 get_sys_clk_freq(void);
u32 omap5_ddr_clk(void);
u32 cortex_rev(void);
void init_omap_revision(void);
void do_io_settings(void);
-
-/*
- * This is used to verify if the configuration header
- * was executed by Romcode prior to control of transfer
- * to the bootloader. SPL is responsible for saving and
- * passing this to the u-boot.
- */
-extern struct omap_boot_parameters boot_params;
+void sri2c_init(void);
+void gpi2c_init(void);
+int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
+u32 warm_reset(void);
+void force_emif_self_refresh(void);
+void get_ioregs(const struct ctrl_ioregs **regs);
+void srcomp_enable(void);
+void setup_warmreset_time(void);
+void set_crossbar_regs(void);
static inline u32 running_from_sdram(void)
{
static inline u8 uboot_loaded_by_spl(void)
{
/*
- * Configuration Header is not supported yet, so u-boot init running
- * from SDRAM implies that it was loaded by SPL. When this situation
- * changes one of these approaches could be taken:
- * i. Pass a magic from SPL to U-Boot and U-Boot save it at a known
- * location.
- * ii. Check the OPP. CH can support only 50% OPP while SPL initializes
- * the DPLLs at 100% OPP.
+ * u-boot can be running from sdram either because of configuration
+ * Header or by SPL. If because of CH, then the romcode sets the
+ * CHSETTINGS executed bit to true in the boot parameter structure that
+ * it passes to the bootloader.This parameter is stored in the ch_flags
+ * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
+ * mandatory section if CH is present.
*/
- return running_from_sdram();
+ if ((gd->arch.omap_boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
+ return 0;
+ else
+ return running_from_sdram();
}
/*
* The basic hardware init of OMAP(s_init()) can happen in 4
#endif
}
-static inline u32 omap_revision(void)
+static inline u32 div_round_up(u32 num, u32 den)
{
- extern u32 *const omap5_revision;
- return *omap5_revision;
+ return (num + den - 1)/den;
}
+static inline u32 usec_to_32k(u32 usec)
+{
+ return div_round_up(32768 * usec, 1000000);
+}
#endif