drivers: net: cpsw: remove hard coding bd ram for cpsw

[glsdk/glsdk-u-boot.git] / drivers / net / cpsw.c

diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
index af3d8593eb6933e42207717913f6b27fc31ec8d8..dc0a2be23bccf21cbd366861e774a68c33183817 100644 (file)
--- a/drivers/net/cpsw.c
+++ b/drivers/net/cpsw.c
@@ -24,6 +24,7 @@
 #include <asm/errno.h>
 #include <asm/io.h>
 #include <phy.h>
+#include <asm/arch/cpu.h>
 
 #define BITMASK(bits)          (BIT(bits) - 1)
 #define PHY_REG_MASK           0x1f
@@ -50,8 +51,6 @@
 #define CPDMA_RXCP_VER1                0x160
 #define CPDMA_RXCP_VER2                0x260
 
-#define CPDMA_RAM_ADDR         0x4a102000
-
 /* Descriptor mode bits */
 #define CPDMA_DESC_SOP         BIT(31)
 #define CPDMA_DESC_EOP         BIT(30)
@@ -108,7 +107,13 @@ struct cpsw_slave_regs {
        u32     flow_thresh;
        u32     port_vlan;
        u32     tx_pri_map;
+#ifdef CONFIG_AM33XX
        u32     gap_thresh;
+#elif defined(CONFIG_TI814X)
+       u32     ts_ctl;
+       u32     ts_seq_ltype;
+       u32     ts_vlan;
+#endif
        u32     sa_lo;
        u32     sa_hi;
 };
@@ -227,6 +232,9 @@ struct cpsw_priv {
        struct cpsw_slave               *slaves;
        struct phy_device               *phydev;
        struct mii_dev                  *bus;
+
+       u32                             mdio_link;
+       u32                             phy_mask;
 };
 
 static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32 bits)
@@ -598,10 +606,21 @@ static int cpsw_update_link(struct cpsw_priv *priv)
 
        for_each_slave(slave, priv)
                cpsw_slave_update_link(slave, priv, &link);
-
+       priv->mdio_link = readl(&mdio_regs->link);
        return link;
 }
 
+static int cpsw_check_link(struct cpsw_priv *priv)
+{
+       u32 link = 0;
+
+       link = __raw_readl(&mdio_regs->link) & priv->phy_mask;
+       if ((link) && (link == priv->mdio_link))
+               return 1;
+
+       return cpsw_update_link(priv);
+}
+
 static inline u32  cpsw_get_slave_port(struct cpsw_priv *priv, u32 slave_num)
 {
        if (priv->host_port == 0)
@@ -631,6 +650,8 @@ static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv)
        cpsw_ale_port_state(priv, slave_port, ALE_PORT_STATE_FORWARD);
 
        cpsw_ale_add_mcast(priv, NetBcastAddr, 1 << slave_port);
+
+       priv->phy_mask |= 1 << slave->data->phy_id;
 }
 
 static struct cpdma_desc *cpdma_desc_alloc(struct cpsw_priv *priv)
@@ -862,7 +883,7 @@ static int cpsw_send(struct eth_device *dev, void *packet, int length)
        int len;
        int timeout = CPDMA_TIMEOUT;
 
-       if (!cpsw_update_link(priv))
+       if (!cpsw_check_link(priv))
                return -EIO;
 
        flush_dcache_range((unsigned long)packet,
@@ -920,7 +941,10 @@ static int cpsw_phy_init(struct eth_device *dev, struct cpsw_slave *slave)
                        SUPPORTED_100baseT_Full |
                        SUPPORTED_1000baseT_Full);
 
-       phydev = phy_connect(priv->bus, 0, dev, slave->data->phy_if);
+       phydev = phy_connect(priv->bus,
+                       CONFIG_PHY_ADDR,
+                       dev,
+                       slave->data->phy_if);
 
        phydev->supported &= supported;
        phydev->advertising = phydev->supported;
@@ -958,12 +982,12 @@ int cpsw_register(struct cpsw_platform_data *data)
                return -ENOMEM;
        }
 
-       priv->descs             = (void *)CPDMA_RAM_ADDR;
        priv->host_port         = data->host_port_num;
        priv->regs              = regs;
        priv->host_port_regs    = regs + data->host_port_reg_ofs;
        priv->dma_regs          = regs + data->cpdma_reg_ofs;
        priv->ale_regs          = regs + data->ale_reg_ofs;
+       priv->descs             = (void *)regs + data->bd_ram_ofs;
 
        int idx = 0;