| author | Timur Tabi <timur@freescale.com> | |
| Fri, 18 May 2012 09:09:09 +0000 (09:09 +0000) | ||
| committer | Andy Fleming <afleming@freescale.com> | |
| Wed, 8 Aug 2012 22:13:37 +0000 (17:13 -0500) | ||
| commit | 7a946961c7ed99cb171686e42a35ca6e16b7d570 | |
| tree | d2c4e7d40cc8799a68b336abe32b7f8359e914f2 | tree | snapshot (tar.xz tar.gz zip) |
| parent | af2536088e2feae2cf1274f48376e3310e0f709e | commit | diff |
powerpc/p1022ds: fix DIU/LBC switching with NAND enabled
In order for indirect mode on the PIXIS to work properly, both chip selects
need to be set to GPCM mode, otherwise writes to the chip select base
addresses will not actually post to the local bus -- they'll go to the
NAND controller instead. Therefore, we need to set BR0 and BR1 to GPCM
mode before switching to indirect mode.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
In order for indirect mode on the PIXIS to work properly, both chip selects
need to be set to GPCM mode, otherwise writes to the chip select base
addresses will not actually post to the local bus -- they'll go to the
NAND controller instead. Therefore, we need to set BR0 and BR1 to GPCM
mode before switching to indirect mode.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
| board/freescale/p1022ds/diu.c | diff | blob | history |