author | Nishanth Menon <nm@ti.com> | |
Thu, 4 Apr 2013 13:16:24 +0000 (18:46 +0530) | ||
committer | Lokesh Vutla <lokeshvutla@ti.com> | |
Wed, 29 May 2013 09:34:40 +0000 (15:04 +0530) | ||
commit | c1b9a301d89ba9701dc189782ada623ab657bdad | |
tree | 34e974387e573af76a63b341371dd517d98ca6ee | tree | snapshot (tar.xz tar.gz zip) |
parent | 61bc717b48e0cbd935c0ad401d9fcc20a2e2b267 | commit | diff |
ARM: OMAP5: DRA7xx: support class 0 optimized voltages
DRA752 now uses AVS Class 0 voltages which are voltages in efuse.
This means that we can now use the optimized voltages which are
stored as mV values in efuse and program PMIC accordingly.
This allows us to go with higher OPP as needed in the system without
the need for implementing complex AVS logic.
Signed-off-by: Nishanth Menon <nm@ti.com>
DRA752 now uses AVS Class 0 voltages which are voltages in efuse.
This means that we can now use the optimized voltages which are
stored as mV values in efuse and program PMIC accordingly.
This allows us to go with higher OPP as needed in the system without
the need for implementing complex AVS logic.
Signed-off-by: Nishanth Menon <nm@ti.com>