ARM: OMAP5: DRA7xx: support class 0 optimized voltages
authorNishanth Menon <nm@ti.com>
Thu, 4 Apr 2013 13:16:24 +0000 (18:46 +0530)
committerLokesh Vutla <lokeshvutla@ti.com>
Wed, 29 May 2013 09:34:40 +0000 (15:04 +0530)
commitc1b9a301d89ba9701dc189782ada623ab657bdad
tree34e974387e573af76a63b341371dd517d98ca6ee
parent61bc717b48e0cbd935c0ad401d9fcc20a2e2b267
ARM: OMAP5: DRA7xx: support class 0 optimized voltages

DRA752 now uses AVS Class 0 voltages which are voltages in efuse.

This means that we can now use the optimized voltages which are
stored as mV values in efuse and program PMIC accordingly.

This allows us to go with higher OPP as needed in the system without
the need for implementing complex AVS logic.

Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm/cpu/armv7/omap-common/clocks-common.c
arch/arm/cpu/armv7/omap5/hw_data.c
arch/arm/include/asm/arch-omap5/clocks.h
arch/arm/include/asm/omap_common.h