| author | SRICHARAN R <r.sricharan@ti.com> | |
| Mon, 12 Mar 2012 02:25:37 +0000 (02:25 +0000) | ||
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | |
| Tue, 15 May 2012 06:31:23 +0000 (08:31 +0200) | ||
| commit | f40107345cbcd6e0d1747eda45e76c4e2a6df0db | |
| tree | 19926012178f2c73c3fc5c60d391d8d40f1cfaff | tree | snapshot (tar.xz tar.gz zip) |
| parent | 6ad8d67de8f9ec9d4a8a90b0b3f78f13bec43c89 | commit | diff |
OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon.
The OMAP5 silicon has new DDR PHY design, which includes a external PHY
as well. So configuring the ext PHY parameters here. Also the EMIF timimg
registers and a couple of DDR mode registers needs to be updated based on
the testing from the actual silicon.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
The OMAP5 silicon has new DDR PHY design, which includes a external PHY
as well. So configuring the ext PHY parameters here. Also the EMIF timimg
registers and a couple of DDR mode registers needs to be updated based on
the testing from the actual silicon.
Signed-off-by: R Sricharan <r.sricharan@ti.com>