Merge remote-tracking branch 'u-boot-atmel/master'
authorAlbert ARIBAUD <albert.u.boot@aribaud.net>
Fri, 26 Oct 2012 05:54:25 +0000 (07:54 +0200)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Fri, 26 Oct 2012 05:54:25 +0000 (07:54 +0200)
arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c
board/atmel/at91sam9x5ek/at91sam9x5ek.c
drivers/mmc/gen_atmel_mci.c
include/atmel_mci.h
include/configs/at91sam9x5ek.h

index 6d77219d0daeca8bb75fcd59a363a260a1b86faa..93485523b585077e48a9ca03a6d163f80ed5f77e 100644 (file)
@@ -118,6 +118,21 @@ void at91_serial2_hw_init(void)
        writel(1 << ATMEL_ID_USART2, &pmc->pcer);
 }
 
+void at91_mci_hw_init(void)
+{
+       /* Initialize the MCI0 */
+       at91_set_a_periph(AT91_PIO_PORTA, 17, 1);       /* MCCK */
+       at91_set_a_periph(AT91_PIO_PORTA, 16, 1);       /* MCCDA */
+       at91_set_a_periph(AT91_PIO_PORTA, 15, 1);       /* MCDA0 */
+       at91_set_a_periph(AT91_PIO_PORTA, 18, 1);       /* MCDA1 */
+       at91_set_a_periph(AT91_PIO_PORTA, 19, 1);       /* MCDA2 */
+       at91_set_a_periph(AT91_PIO_PORTA, 20, 1);       /* MCDA3 */
+
+       /* Enable clock for MCI0 */
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+       writel(1 << ATMEL_ID_HSMCI0, &pmc->pcer);
+}
+
 #ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
index 06028aa01e82fbf699441caf815dc125f65c80c4..edb088680d000838288d84f9cff0bd48433cd9b8 100644 (file)
@@ -31,6 +31,7 @@
 #include <asm/arch/clk.h>
 #include <lcd.h>
 #include <atmel_hlcdc.h>
+#include <atmel_mci.h>
 #ifdef CONFIG_MACB
 #include <net.h>
 #endif
@@ -258,6 +259,15 @@ void spi_cs_deactivate(struct spi_slave *slave)
 }
 #endif /* CONFIG_ATMEL_SPI */
 
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+int board_mmc_init(bd_t *bd)
+{
+       at91_mci_hw_init();
+
+       return atmel_mci_init((void *)ATMEL_BASE_HSMCI0);
+}
+#endif
+
 int board_early_init_f(void)
 {
        at91_seriald_hw_init();
index 4968c5e4912aa46da6b68884e58fc9edda4375f3..67b2dbe8d4c0b4d47339714ceaac0f4ff29aa60c 100644 (file)
@@ -87,6 +87,11 @@ static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen)
                 | MMCI_BF(BLKLEN, blklen)
                 | MMCI_BIT(RDPROOF)
                 | MMCI_BIT(WRPROOF)), &mci->mr);
+       /*
+        * On some new platforms BLKLEN in mci->mr is ignored.
+        * Should use the BLKLEN in the block register.
+        */
+       writel(MMCI_BF(BLKLEN, blklen), &mci->blkr);
        initialized = 1;
 }
 
@@ -183,6 +188,12 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
        /* Figure out the transfer arguments */
        cmdr = mci_encode_cmd(cmd, data, &error_flags);
 
+       /* For multi blocks read/write, set the block register */
+       if ((cmd->cmdidx == MMC_CMD_READ_MULTIPLE_BLOCK)
+                       || (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK))
+               writel(data->blocks | MMCI_BF(BLKLEN, mmc->read_bl_len),
+                       &mci->blkr);
+
        /* Send the command */
        writel(cmd->cmdarg, &mci->argr);
        writel(cmdr, &mci->cmdr);
@@ -310,8 +321,8 @@ static int mci_init(struct mmc *mmc)
        writel(MMCI_BIT(MCIEN), &mci->cr);      /* enable mci */
        writel(MMCI_BF(SCDSEL, MCI_BUS), &mci->sdcr);   /* select port */
 
-       /* Initial Time-outs */
-       writel(0x5f, &mci->dtor);
+       /* This delay can be optimized, but stick with max value */
+       writel(0x7f, &mci->dtor);
        /* Disable Interrupts */
        writel(~0UL, &mci->idr);
 
index 3dd5d67be9d0de7600ce67df230f1c9b008163ef..c711881276bdd8dc4366095364c3d43aae2df771 100644 (file)
@@ -38,7 +38,7 @@ typedef struct atmel_mci {
        u32     sdcr;   /* 0x0c */
        u32     argr;   /* 0x10 */
        u32     cmdr;   /* 0x14 */
-       u32     _18;    /* 0x18 */
+       u32     blkr;   /* 0x18 */
        u32     _1c;    /* 0x1c */
        u32     rspr;   /* 0x20 */
        u32     rspr1;  /* 0x24 */
@@ -118,6 +118,11 @@ typedef struct atmel_mci {
 #define MMCI_TRTYP_OFFSET                      19
 #define MMCI_TRTYP_SIZE                                2
 
+/* Bitfields in BLKR */
+/* MMCI_BLKLEN_OFFSET/SIZE already defined in MR */
+#define MMCI_BCNT_OFFSET                       0
+#define MMCI_BCNT_SIZE                 16
+
 /* Bitfields in RSPRx */
 #define MMCI_RSP_OFFSET                                0
 #define MMCI_RSP_SIZE                          32
index cbdc3e93cbfd841287a93569499860f56fabbd26..71f765b49422208da2b46b62cade585a83071250 100644 (file)
@@ -89,6 +89,7 @@
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_NAND
 #define CONFIG_CMD_SF
+#define CONFIG_CMD_MMC
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS           1
 #define CONFIG_CMD_UBIFS
 #endif
 
+/* MMC */
+#ifdef CONFIG_CMD_MMC
+#define CONFIG_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_GENERIC_MMC
+#define CONFIG_GENERIC_ATMEL_MCI
+#define CONFIG_DOS_PARTITION
+#endif
+
 /* Ethernet */
 #define CONFIG_MACB
 #define CONFIG_RMII