ARM: DRA7xx: Add CPSW and MDIO pinmux support

Adding CPSW Slave 0 and MDIO pinmux support for DRA7xx EVM

Change-Id: I562fecee5194f9498d1e8387e1e3888e3ebb3fbd
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
[Resolved merge conflict and added change id for gerrit]
Signed-off-by: Praveen Rao <prao@ti.com>

diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h
index 2441c55b24e16187ae0bb14b90cac3dc8e390db8..749e49a212da28ec6c7ee7634762068f5f94015a 100644 (file)
--- a/board/ti/dra7xx/mux_data.h
+++ b/board/ti/dra7xx/mux_data.h
@@ -63,5 +63,19 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
        {GPMC_A4, (IEN | PDIS | M1)},   /* QSPI1_CS3 */
        {GPMC_CS2, (IEN | PTU | PDIS | M1)},    /* QSPI1_CS0 */
        {GPMC_CS3, (IEN | PTU | PDIS | M1)},    /* QSPI1_CS1*/
+       {MDIO_MCLK, (PTU | PEN | M0)},          /* MDIO_MCLK  */
+       {MDIO_D, (IEN | PTU | PEN | M0)},       /* MDIO_D  */
+       {RGMII0_TXC, (M0) },
+       {RGMII0_TXCTL, (M0) },
+       {RGMII0_TXD3, (M0) },
+       {RGMII0_TXD2, (M0) },
+       {RGMII0_TXD1, (M0) },
+       {RGMII0_TXD0, (M0) },
+       {RGMII0_RXC, (IEN | M0) },
+       {RGMII0_RXCTL, (IEN | M0) },
+       {RGMII0_RXD3, (IEN | M0) },
+       {RGMII0_RXD2, (IEN | M0) },
+       {RGMII0_RXD1, (IEN | M0) },
+       {RGMII0_RXD0, (IEN | M0) },
 };
 #endif /* _MUX_DATA_DRA7XX_H_ */