Davinci: add support for the ea20 board

This board uses the OMAP-L138 SOM stacked on a
custom baseboard. It supports SPI Flash, Ethernet
with RMII.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index ad335bc5f1cf822a4ae5844becf2943f530fa5f5..986e0dc6141711fa697fcba018a19fc8442608f8 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -549,6 +549,7 @@ Rowel Atienza <rowel@diwalabs.com>
 
 Stefano Babic <sbabic@denx.de>
 
+       ea20            davinci
        polaris         xscale
        trizepsiv       xscale
        mx51evk         i.MX51

diff --git a/board/davinci/ea20/Makefile b/board/davinci/ea20/Makefile
new file mode 100644 (file)
index 0000000..ddd2564
--- /dev/null
+++ b/board/davinci/ea20/Makefile
@@ -0,0 +1,53 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB    = $(obj)lib$(BOARD).a
+
+COBJS-y        += ea20.o
+
+COBJS   := $(COBJS-y)
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):        $(obj).depend $(OBJS) $(SOBJS)
+       $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+       rm -f $(SOBJS) $(OBJS)
+
+distclean:     clean
+       rm -f $(LIB) core *.bak *~ .depend
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

diff --git a/board/davinci/ea20/ea20.c b/board/davinci/ea20/ea20.c
new file mode 100644 (file)
index 0000000..9d0f71b
--- /dev/null
+++ b/board/davinci/ea20/ea20.c
@@ -0,0 +1,196 @@
+/*
+ * (C) Copyright 2010
+ * Stefano Babic, DENX Software Engineering, sbabic@denx.de
+ *
+ * Based on da850evm.c, original Copyrights follow:
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Based on da830evm.c. Original Copyrights follow:
+ *
+ * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <net.h>
+#include <netdev.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/emif_defs.h>
+#include <asm/arch/emac_defs.h>
+#include <asm/io.h>
+#include <asm/arch/davinci_misc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define pinmux(x)      (&davinci_syscfg_regs->pinmux[x])
+
+/* SPI0 pin muxer settings */
+static const struct pinmux_config spi1_pins[] = {
+       { pinmux(5), 1, 1 },
+       { pinmux(5), 1, 2 },
+       { pinmux(5), 1, 4 },
+       { pinmux(5), 1, 5 }
+};
+
+/* UART pin muxer settings */
+static const struct pinmux_config uart_pins[] = {
+       { pinmux(0), 4, 6 },
+       { pinmux(0), 4, 7 },
+       { pinmux(4), 2, 4 },
+       { pinmux(4), 2, 5 }
+};
+
+#ifdef CONFIG_DRIVER_TI_EMAC
+#define HAS_RMII 1
+static const struct pinmux_config emac_pins[] = {
+       { pinmux(14), 8, 2 },
+       { pinmux(14), 8, 3 },
+       { pinmux(14), 8, 4 },
+       { pinmux(14), 8, 5 },
+       { pinmux(14), 8, 6 },
+       { pinmux(14), 8, 7 },
+       { pinmux(15), 8, 1 },
+       { pinmux(4), 8, 0 },
+       { pinmux(4), 8, 1 }
+};
+#endif
+
+#ifdef CONFIG_NAND_DAVINCI
+const struct pinmux_config nand_pins[] = {
+       { pinmux(7), 1, 1 },
+       { pinmux(7), 1, 2 },
+       { pinmux(7), 1, 4 },
+       { pinmux(7), 1, 5 },
+       { pinmux(9), 1, 0 },
+       { pinmux(9), 1, 1 },
+       { pinmux(9), 1, 2 },
+       { pinmux(9), 1, 3 },
+       { pinmux(9), 1, 4 },
+       { pinmux(9), 1, 5 },
+       { pinmux(9), 1, 6 },
+       { pinmux(9), 1, 7 },
+       { pinmux(12), 1, 5 },
+       { pinmux(12), 1, 6 }
+};
+#endif
+
+static const struct pinmux_resource pinmuxes[] = {
+#ifdef CONFIG_SPI_FLASH
+       PINMUX_ITEM(spi1_pins),
+#endif
+       PINMUX_ITEM(uart_pins),
+#ifdef CONFIG_NAND_DAVINCI
+       PINMUX_ITEM(nand_pins),
+#endif
+};
+
+static const struct lpsc_resource lpsc[] = {
+       { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
+       { DAVINCI_LPSC_SPI1 },  /* Serial Flash */
+       { DAVINCI_LPSC_EMAC },  /* image download */
+       { DAVINCI_LPSC_UART2 }, /* console */
+       { DAVINCI_LPSC_GPIO },
+};
+
+int board_init(void)
+{
+#ifndef CONFIG_USE_IRQ
+       irq_init();
+#endif
+
+
+#ifdef CONFIG_NAND_DAVINCI
+       /*
+        * NAND CS setup - cycle counts based on da850evm NAND timings in the
+        * Linux kernel @ 25MHz EMIFA
+        */
+       writel((DAVINCI_ABCR_WSETUP(0) |
+               DAVINCI_ABCR_WSTROBE(0) |
+               DAVINCI_ABCR_WHOLD(0) |
+               DAVINCI_ABCR_RSETUP(0) |
+               DAVINCI_ABCR_RSTROBE(1) |
+               DAVINCI_ABCR_RHOLD(0) |
+               DAVINCI_ABCR_TA(0) |
+               DAVINCI_ABCR_ASIZE_8BIT),
+              &davinci_emif_regs->ab2cr); /* CS3 */
+#endif
+
+       /* arch number of the board */
+       gd->bd->bi_arch_number = MACH_TYPE_EA20;
+
+       /* address of boot parameters */
+       gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+       /*
+        * Power on required peripherals
+        * ARM does not have access by default to PSC0 and PSC1
+        * assuming here that the DSP bootloader has set the IOPU
+        * such that PSC access is available to ARM
+        */
+       if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
+               return 1;
+
+       /* setup the SUSPSRC for ARM to control emulation suspend */
+       writel(readl(&davinci_syscfg_regs->suspsrc) &
+              ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
+                DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
+                DAVINCI_SYSCFG_SUSPSRC_UART2),
+              &davinci_syscfg_regs->suspsrc);
+
+       /* configure pinmux settings */
+       if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
+               return 1;
+
+#ifdef CONFIG_DRIVER_TI_EMAC
+       if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
+               return 1;
+
+       davinci_emac_mii_mode_sel(HAS_RMII);
+#endif /* CONFIG_DRIVER_TI_EMAC */
+
+       /* enable the console UART */
+       writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
+               DAVINCI_UART_PWREMU_MGMT_UTRST),
+              &davinci_uart2_ctrl_regs->pwremu_mgmt);
+
+       return 0;
+}
+
+#ifdef CONFIG_DRIVER_TI_EMAC
+
+/*
+ * Initializes on-board ethernet controllers.
+ */
+int board_eth_init(bd_t *bis)
+{
+       if (!davinci_emac_initialize()) {
+               printf("Error: Ethernet init failed!\n");
+               return -1;
+       }
+
+       /*
+        * This board has a RMII PHY. However, the MDC line on the SOM
+        * must not be disabled (there is no MII PHY on the
+        * baseboard) via the GPIO2[6], because this pin
+        * disables at the same time the SPI flash.
+        */
+
+       return 0;
+}
+#endif /* CONFIG_DRIVER_TI_EMAC */

diff --git a/boards.cfg b/boards.cfg
index beb5d81ef7fe0ad9b0c58607b74d6146dd0d96f3..6da9959a0b086a8efbe96a612f6ede2c5e6f7749 100644 (file)
--- a/boards.cfg
+++ b/boards.cfg
@@ -79,6 +79,7 @@ da850evm                     arm         arm926ejs   da8xxevm            davinci
 hawkboard                    arm         arm926ejs   da8xxevm            davinci        davinci
 hawkboard_nand               arm         arm926ejs   da8xxevm            davinci        davinci     hawkboard:NAND_U_BOOT
 hawkboard_uart               arm         arm926ejs   da8xxevm            davinci        davinci     hawkboard:UART_U_BOOT
+ea20                        arm         arm926ejs   ea20                davinci        davinci
 davinci_dm355evm             arm         arm926ejs   dm355evm            davinci        davinci
 davinci_dm355leopard         arm         arm926ejs   dm355leopard        davinci        davinci
 davinci_dm365evm             arm         arm926ejs   dm365evm            davinci        davinci

diff --git a/include/configs/ea20.h b/include/configs/ea20.h
new file mode 100644 (file)
index 0000000..48ce945
--- /dev/null
+++ b/include/configs/ea20.h
@@ -0,0 +1,192 @@
+/*
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Based on davinci_dvevm.h. Original Copyrights follow:
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * Board
+ */
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_USE_SPIFLASH
+#define CONFIG_DRIVER_TI_EMAC_USE_RMII
+
+/*
+ * SoC Configuration
+ */
+#define CONFIG_MACH_DAVINCI_DA850_EVM
+#define CONFIG_ARM926EJS               /* arm926ejs CPU core */
+#define CONFIG_SOC_DA8XX               /* TI DA8xx SoC */
+#define CONFIG_SYS_CLK_FREQ            clk_get(DAVINCI_ARM_CLKID)
+#define CONFIG_SYS_OSCIN_FREQ          24000000
+#define CONFIG_SYS_TIMERBASE           DAVINCI_TIMER0_BASE
+#define CONFIG_SYS_HZ_CLOCK            clk_get(DAVINCI_AUXCLK_CLKID)
+#define CONFIG_SYS_HZ                  1000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_TEXT_BASE           0xc1080000
+
+/*
+ * Memory Info
+ */
+#define CONFIG_SYS_MALLOC_LEN  (0x10000 + 1*1024*1024) /* malloc() len */
+#define PHYS_SDRAM_1           DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
+#define PHYS_SDRAM_1_SIZE      (64 << 20) /* SDRAM size 64MB */
+#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
+
+/* memtest start addr */
+#define CONFIG_SYS_MEMTEST_START       (PHYS_SDRAM_1 + 0x2000000)
+
+/* memtest will be run on 16MB */
+#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
+
+#define CONFIG_NR_DRAM_BANKS   1 /* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE       (256*1024) /* regular stack */
+
+/*
+ * Serial Driver info
+ */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE    -4      /* NS16550 register size */
+#define CONFIG_SYS_NS16550_COM1        DAVINCI_UART2_BASE /* Base address of UART2 */
+#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
+#define CONFIG_CONS_INDEX      1               /* use UART0 for console */
+#define CONFIG_BAUDRATE                115200          /* Default baud rate */
+#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
+
+#define CONFIG_SPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_DAVINCI_SPI
+#define CONFIG_SYS_SPI_BASE            DAVINCI_SPI1_BASE
+#define CONFIG_SYS_SPI_CLK             clk_get(DAVINCI_SPI1_CLKID)
+#define CONFIG_SF_DEFAULT_SPEED                30000000
+#define CONFIG_ENV_SPI_MAX_HZ  CONFIG_SF_DEFAULT_SPEED
+
+/*
+ * Network & Ethernet Configuration
+ */
+#ifdef CONFIG_DRIVER_TI_EMAC
+#define CONFIG_EMAC_MDIO_PHY_NUM       0
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT 10
+#define CONFIG_NET_MULTI
+#endif
+
+#ifdef CONFIG_USE_SPIFLASH
+#undef CONFIG_ENV_IS_IN_FLASH
+#undef CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE                        (8 << 10)
+#define CONFIG_ENV_OFFSET              (256 << 10)
+#define CONFIG_ENV_SECT_SIZE           (64 << 10)
+#define CONFIG_SYS_NO_FLASH
+#endif
+
+/*
+ * U-Boot general configuration
+ */
+#define CONFIG_BOOTFILE                "uImage" /* Boot file name */
+#define CONFIG_SYS_PROMPT      "ea20 > " /* Command Prompt */
+#define CONFIG_SYS_CBSIZE      1024 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE      (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS     16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
+#define CONFIG_SYS_LOAD_ADDR   (PHYS_SDRAM_1 + 0x700000)
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+
+/*
+ * Linux Information
+ */
+#define LINUX_BOOT_PARAM_ADDR  (PHYS_SDRAM_1 + 0x100)
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTDELAY       3
+
+/*
+ * U-Boot commands
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_MEMORY
+
+#ifndef CONFIG_DRIVER_TI_EMAC
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_PING
+#endif
+
+#ifdef CONFIG_USE_NAND
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_NAND
+
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_LZO
+#define CONFIG_RBTREE
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#endif
+
+#ifdef CONFIG_USE_SPIFLASH
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_FLASH
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SAVEENV
+#endif
+
+#if !defined(CONFIG_USE_NAND) && \
+       !defined(CONFIG_USE_NOR) && \
+       !defined(CONFIG_USE_SPIFLASH)
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_SIZE                (16 << 10)
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_ENV
+#endif
+
+/* additions for new relocation code, must added to all boards */
+#define CONFIG_SYS_SDRAM_BASE          0xc0000000
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+                                       GENERATED_GBL_DATA_SIZE)
+#endif /* __CONFIG_H */