summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (from parent 1: 748fe28)
raw | patch | inline | side by side (from parent 1: 748fe28)
author | Minal <minal.shah@ti.com> | |
Mon, 12 Aug 2013 12:13:18 +0000 (17:43 +0530) | ||
committer | Somnath Mukherjee <somnath@ti.com> | |
Tue, 13 Aug 2013 12:56:35 +0000 (18:26 +0530) |
UART-boot is considered as a peripheral boot.
For dra7xx Peripheral boot UART3 is used as default console.
The ROM code transfers MLO over UART3 in this case.
For Memory boot UART1 is used as default console.
Which UART to be used is decided by parameter CONS_INDEX.
For peripheral boot this should be set to 3.
Changes common to memory boot and peripheral boot:
--------------------------------------------------
boards.cfg:
Moved definition of CONS_INDEX in boards.cfg to make it configurable between
memory boot and peripheral boot.
spl.h:
Added #define BOOT_DEVICE_UART for UART boot device code.
Changes specific to peripheral boot:
------------------------------------
boards.cfg:
Added a build variant "dra7xx_evm_uart3" for dra7xx that sets UART to UART3 and
enables YMODEM support.
MLO->u-boot needs YMODEM support enabled. By default it is disabled.
Changes needed in addition to the above:
----------------------------------------
1. When building u-boot ensure usage of dra7xx_evm_uart3_config instead of
dra7xx_evm_config.
2. Please note that apart from the above changes CONFIG_SPL_TEXT_BASE should point to
base of OCMC_RAM1 for proper execution.
In memory boot mode ROM code transfers MLO to location OCMC_RAM1 base+offset
(CONFIG_SPL_TEXT_BASE = 0x40300000+350).
In peripheral boot mode ROM code transfers MLO to location OCMC_RAM1 base
(0x40300000).
Hence is is a must to change CONFIG_SPL_TEXT_BASE in include/configs/omap5_common.h
from 0x40300350 to 0x40300000
Signed-off-by: Minal <minal.shah@ti.com>
For dra7xx Peripheral boot UART3 is used as default console.
The ROM code transfers MLO over UART3 in this case.
For Memory boot UART1 is used as default console.
Which UART to be used is decided by parameter CONS_INDEX.
For peripheral boot this should be set to 3.
Changes common to memory boot and peripheral boot:
--------------------------------------------------
boards.cfg:
Moved definition of CONS_INDEX in boards.cfg to make it configurable between
memory boot and peripheral boot.
spl.h:
Added #define BOOT_DEVICE_UART for UART boot device code.
Changes specific to peripheral boot:
------------------------------------
boards.cfg:
Added a build variant "dra7xx_evm_uart3" for dra7xx that sets UART to UART3 and
enables YMODEM support.
MLO->u-boot needs YMODEM support enabled. By default it is disabled.
Changes needed in addition to the above:
----------------------------------------
1. When building u-boot ensure usage of dra7xx_evm_uart3_config instead of
dra7xx_evm_config.
2. Please note that apart from the above changes CONFIG_SPL_TEXT_BASE should point to
base of OCMC_RAM1 for proper execution.
In memory boot mode ROM code transfers MLO to location OCMC_RAM1 base+offset
(CONFIG_SPL_TEXT_BASE = 0x40300000+350).
In peripheral boot mode ROM code transfers MLO to location OCMC_RAM1 base
(0x40300000).
Hence is is a must to change CONFIG_SPL_TEXT_BASE in include/configs/omap5_common.h
from 0x40300350 to 0x40300000
Signed-off-by: Minal <minal.shah@ti.com>
arch/arm/include/asm/arch-omap5/spl.h | patch | blob | history | |
boards.cfg | patch | blob | history | |
include/configs/dra7xx_evm.h | patch | blob | history |
index 8905cb89999c20d5fa1d4796acd026fa2377bf76..ceb912eab48c917020e2e698945f2df1e1f95b2e 100644 (file)
#define BOOT_DEVICE_MMC2 6
#define BOOT_DEVICE_MMC2_2 7
#define BOOT_DEVICE_SPI 10
+#define BOOT_DEVICE_UART 0x43
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2_2
diff --git a/boards.cfg b/boards.cfg
index 63d0ebeb9fd8a01dd4629a8729235bab12213cb2..7cc59d32f08edd43ebb3f0bdbfb345e60273da3a 100644 (file)
--- a/boards.cfg
+++ b/boards.cfg
omap4_panda arm armv7 panda ti omap4
omap4_sdp4430 arm armv7 sdp4430 ti omap4
omap5_uevm arm armv7 omap5_uevm ti omap5
-dra7xx_evm arm armv7 dra7xx ti omap5
+dra7xx_evm arm armv7 dra7xx ti omap5 dra7xx_evm:CONS_INDEX=1
+dra7xx_evm_uart3 arm armv7 dra7xx ti omap5 dra7xx_evm:CONS_INDEX=3,SPL_YMODEM_SUPPORT
s5p_goni arm armv7 goni samsung s5pc1xx
smdkc100 arm armv7 smdkc100 samsung s5pc1xx
origen arm armv7 origen samsung exynos
index 9a6bcb3b64e01de88f277e967b04f010d587102c..c566f127d5c3dd88cf96087a6269b18dc427944e 100644 (file)
#define CONFIG_DRA7XX /* in a TI DRA7XX core */
#define CONFIG_SYS_PROMPT "DRA752 EVM # "
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_SYS_NS16550_COM1 UART1_BASE
+#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
+#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART1 */
+#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART2 */
#define CONFIG_BAUDRATE 115200
/* Clock Defines */