author | Ben Warren <biggerbadderben@gmail.com> | |
Mon, 9 Jun 2008 05:04:22 +0000 (22:04 -0700) | ||
committer | Ben Warren <biggerbadderben@gmail.com> | |
Mon, 9 Jun 2008 05:04:22 +0000 (22:04 -0700) |
1 | 2 | |||
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README | patch | | diff1 | | diff2 | | blob | history |
drivers/net/dm9000x.c | patch | | diff1 | | diff2 | | blob | history |
diff --cc README
Simple merge
diff --cc drivers/net/dm9000x.c
index c2144d9bc69c28738283c9e0dbaa00fb619a859a,68901cd818e004d5f6132b965cafa11f34d20c12..fa95a730c377f91a1b3c0a39a142170d8a29fc17
+++ b/drivers/net/dm9000x.c
/* Set PHY */
set_PHY_mode();
- /* Program operating register */
- DM9000_iow(DM9000_NCR, 0x0); /* only intern phy supported by now */
- DM9000_iow(DM9000_TCR, 0); /* TX Polling clear */
- DM9000_iow(DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
- DM9000_iow(DM9000_FCTR, FCTR_HWOT(3) | FCTR_LWOT(8)); /* Flow Control : High/Low Water */
- DM9000_iow(DM9000_FCR, 0x0); /* SH FIXME: This looks strange! Flow Control */
- DM9000_iow(DM9000_SMCR, 0); /* Special Mode */
- DM9000_iow(DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END); /* clear TX status */
- DM9000_iow(DM9000_ISR, 0x0f); /* Clear interrupt status */
+ /* Program operating register, only intern phy supported by now */
+ DM9000_iow(DM9000_NCR, 0x0);
+ /* TX Polling clear */
+ DM9000_iow(DM9000_TCR, 0);
+ /* Less 3Kb, 200us */
+ DM9000_iow(DM9000_BPTR, 0x3f);
+ /* Flow Control : High/Low Water */
+ DM9000_iow(DM9000_FCTR, FCTR_HWOT(3) | FCTR_LWOT(8));
+ /* SH FIXME: This looks strange! Flow Control */
+ DM9000_iow(DM9000_FCR, 0x0);
+ /* Special Mode */
+ DM9000_iow(DM9000_SMCR, 0);
+ /* clear TX status */
+ DM9000_iow(DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
+ /* Clear interrupt status */
+ DM9000_iow(DM9000_ISR, 0x0f);
/* Set Node address */
+ #ifndef CONFIG_AT91SAM9261EK
for (i = 0; i < 6; i++)
((u16 *) bd->bi_enetaddr)[i] = read_srom_word(i);
+ #endif
if (is_zero_ether_addr(bd->bi_enetaddr) ||
is_multicast_ether_addr(bd->bi_enetaddr)) {