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raw | patch | inline | side by side (from: f0f8960)
raw | patch | inline | side by side (from: f0f8960)
| author | Amarinder Bindra <a-bindra@ti.com> | |
| Wed, 7 Aug 2013 15:30:18 +0000 (21:00 +0530) | ||
| committer | Somnath Mukherjee <somnath@ti.com> | |
| Thu, 8 Aug 2013 13:04:32 +0000 (18:34 +0530) |
DRA7xx has a large number of interrupts/dma requests to service
the needs of its many peripherals and subsystems. All of the
requests lines from the subsystems are not needed at the same
time, so they have to be muxed to the controllers appropriately.
In such places a interrupt/dma controllers are preceded by an
IRQ/DMA CROSSBAR that provides flexibility in muxing the device
requests to the controller inputs.
This configures some of the MPU IRQs and SDMA DREQ at the u-boot
until this functionality is available at the kernel.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Amarinder Bindra <a-bindra@ti.com>
the needs of its many peripherals and subsystems. All of the
requests lines from the subsystems are not needed at the same
time, so they have to be muxed to the controllers appropriately.
In such places a interrupt/dma controllers are preceded by an
IRQ/DMA CROSSBAR that provides flexibility in muxing the device
requests to the controller inputs.
This configures some of the MPU IRQs and SDMA DREQ at the u-boot
until this functionality is available at the kernel.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Amarinder Bindra <a-bindra@ti.com>
No differences found