RM-autogen-data.py: Add support for am65x SR1 and SR2
authorNikhil Devshatwar <nikhil.nd@ti.com>
Wed, 15 Apr 2020 09:33:21 +0000 (15:03 +0530)
committerNikhil Devshatwar <nikhil.nd@ti.com>
Wed, 15 Apr 2020 11:22:15 +0000 (16:52 +0530)
Auto generate the python headers from documentation
Update the argparse to support both Silicon revisions.
Create baseline excel sheet for am6x and am65x_sr2

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
respart/RM-autogen-data.py
respart/RM-autogen.py
respart/SYSFW-NAVSS-ResAssg.xlsx
respart/am65x.py [deleted file]
respart/am65x_sr2.py [new file with mode: 0644]
respart/am6x.py [new file with mode: 0644]

index 2654a1f091f055bdebbd15922592666d9886ced0..c8450045f63be388e41adc8f4f49554b1ba2719d 100755 (executable)
@@ -98,7 +98,7 @@ parser = argparse.ArgumentParser(prog='RM-autogen.py', formatter_class=argparse.
        description='RM-autogen.py - Auto generate the Resource Management data')
 
 parser.add_argument('-s', '--soc', required=True, dest='soc',
-       action='store', choices=['j721e', 'am65x'],
+       action='store', choices=['j721e', 'am6x', 'am65x_sr2'],
        help='SoC name')
 
 parser.add_argument('-o', '--output', required=True, dest='output',
index d8d55e5c01070787502e687f0f7c1ec417d39747..c70df3b47f57e5af6aeebe38c9128fac2e07a55c 100755 (executable)
@@ -117,7 +117,7 @@ parser = argparse.ArgumentParser(prog='RM-autogen.py', formatter_class=argparse.
        description='RM-autogen.py - Auto generate the Resource Management data')
 
 parser.add_argument('-s', '--soc', required=True, dest='soc',
-       action='store', choices=['j721e', 'am65x'],
+       action='store', choices=['j721e', 'am6x', 'am65x_sr2'],
        help='SoC name')
 
 parser.add_argument('-o', '--output', required=True, dest='output',
index e9dbcd22c12370981ab9acd29391b96bdb95dbb6..aeae01d5c5909e4897e92ac970207649c0dd66e6 100755 (executable)
Binary files a/respart/SYSFW-NAVSS-ResAssg.xlsx and b/respart/SYSFW-NAVSS-ResAssg.xlsx differ
diff --git a/respart/am65x.py b/respart/am65x.py
deleted file mode 100644 (file)
index 17c7b12..0000000
+++ /dev/null
@@ -1,364 +0,0 @@
-'''
-Generated from the SYSFW headers
-cat include/soc/am65x/devices.h | grep "#define AM6_DEV" | awk -F"[ ()]*" '{print "\""$2"\" : "$3","}'
-cat include/soc/am65x/resasg_types.h | grep "#define RESASG_SUBTYPE" | awk -F"[ ()]*" '{print "\""$2"\" : " substr($3, 1, length($3)-1)","}'
-cat include/soc/am65x/hosts.h | grep "#define HOST_ID" | awk -F"[ ()]*" '{print "\""$2"\" : " substr($3, 1, length($3)-1)","}'
-'''
-
-
-RESASG_TYPE_SHIFT = 6
-RESASG_SUBTYPE_SHIFT = 0
-
-const_values = {
-"AM6_DEV_DCC4" : 13,
-"AM6_DEV_DCC6" : 15,
-"AM6_DEV_DCC0" : 9,
-"AM6_DEV_MCU_DCC2" : 19,
-"AM6_DEV_DCC5" : 14,
-"AM6_DEV_MCU_DCC0" : 17,
-"AM6_DEV_MCU_DCC1" : 18,
-"AM6_DEV_DCC1" : 10,
-"AM6_DEV_DCC3" : 12,
-"AM6_DEV_DCC7" : 16,
-"AM6_DEV_DCC2" : 11,
-"AM6_DEV_MCU_I2C0" : 114,
-"AM6_DEV_I2C3" : 113,
-"AM6_DEV_I2C2" : 112,
-"AM6_DEV_WKUP_I2C0" : 115,
-"AM6_DEV_I2C0" : 110,
-"AM6_DEV_I2C1" : 111,
-"AM6_DEV_TIMER5" : 30,
-"AM6_DEV_TIMER6" : 31,
-"AM6_DEV_TIMER7" : 32,
-"AM6_DEV_MCU_TIMER0" : 35,
-"AM6_DEV_TIMER8" : 33,
-"AM6_DEV_TIMER2" : 27,
-"AM6_DEV_MCU_TIMER1" : 36,
-"AM6_DEV_MCU_TIMER2" : 37,
-"AM6_DEV_TIMER4" : 29,
-"AM6_DEV_TIMER3" : 28,
-"AM6_DEV_TIMER9" : 34,
-"AM6_DEV_TIMER11" : 26,
-"AM6_DEV_TIMER10" : 25,
-"AM6_DEV_TIMER0" : 23,
-"AM6_DEV_MCU_TIMER3" : 38,
-"AM6_DEV_TIMER1" : 24,
-"AM6_DEV_WKUP_PSC0" : 79,
-"AM6_DEV_CBASS0" : 82,
-"AM6_DEV_PLL_MMR0" : 101,
-"AM6_DEV_MCU_CPT2_AGGR0" : 7,
-"AM6_DEV_CPT2_AGGR0" : 6,
-"AM6_DEV_DEBUGSS0" : 68,
-"AM6_DEV_EHRPWM4" : 44,
-"AM6_DEV_EHRPWM1" : 41,
-"AM6_DEV_EHRPWM0" : 40,
-"AM6_DEV_EHRPWM3" : 43,
-"AM6_DEV_EHRPWM5" : 45,
-"AM6_DEV_EHRPWM2" : 42,
-"AM6_DEV_ELM0" : 46,
-"AM6_DEV_MCU_UART0" : 149,
-"AM6_DEV_WKUP_UART0" : 150,
-"AM6_DEV_UART1" : 147,
-"AM6_DEV_UART0" : 146,
-"AM6_DEV_UART2" : 148,
-"AM6_DEV_SA2_UL0" : 136,
-"AM6_DEV_CAL0" : 2,
-"AM6_DEV_CPT2_PROBE_VBUSM_MAIN_NAVSRAMLO_4" : 206,
-"AM6_DEV_CPT2_PROBE_VBUSM_MCU_FSS_S1_3" : 207,
-"AM6_DEV_CPT2_PROBE_VBUSM_MCU_EXPORT_SLV_0" : 208,
-"AM6_DEV_CPT2_PROBE_VBUSM_MAIN_NAVSRAMHI_3" : 209,
-"AM6_DEV_CPT2_PROBE_VBUSM_MCU_SRAM_SLV_1" : 210,
-"AM6_DEV_CPT2_PROBE_VBUSM_MAIN_NAVDDRHI_5" : 211,
-"AM6_DEV_CPT2_PROBE_VBUSM_MAIN_NAVDDRLO_6" : 212,
-"AM6_DEV_CPT2_PROBE_VBUSM_MAIN_CAL0_0" : 213,
-"AM6_DEV_CPT2_PROBE_VBUSM_MAIN_DSS_2" : 214,
-"AM6_DEV_CPT2_PROBE_VBUSM_MCU_FSS_S0_2" : 215,
-"AM6_DEV_PBIST0" : 73,
-"AM6_DEV_PBIST1" : 74,
-"AM6_DEV_MCU_PBIST0" : 75,
-"AM6_DEV_NAVSS0" : 118,
-"AM6_DEV_DSS0" : 67,
-"AM6_DEV_GPMC0" : 60,
-"AM6_DEV_MMCSD1" : 48,
-"AM6_DEV_WKUP_PLLCTRL0" : 77,
-"AM6_DEV_PLLCTRL0" : 76,
-"AM6_DEV_USB3SS1" : 152,
-"AM6_DEV_USB3SS0" : 151,
-"AM6_DEV_MCU_MCSPI0" : 142,
-"AM6_DEV_MCSPI2" : 139,
-"AM6_DEV_MCU_MCSPI2" : 144,
-"AM6_DEV_MCSPI0" : 137,
-"AM6_DEV_MCSPI1" : 138,
-"AM6_DEV_MCSPI4" : 141,
-"AM6_DEV_MCSPI3" : 140,
-"AM6_DEV_MCU_MCSPI1" : 143,
-"AM6_DEV_DEBUGSS_WRAP0" : 21,
-"AM6_DEV_CBASS_INFRA0" : 85,
-"AM6_DEV_STM0" : 8,
-"AM6_DEV_MCU_RTI1" : 135,
-"AM6_DEV_RTI0" : 130,
-"AM6_DEV_RTI3" : 133,
-"AM6_DEV_RTI1" : 131,
-"AM6_DEV_MCU_RTI0" : 134,
-"AM6_DEV_RTI2" : 132,
-"AM6_DEV_PSRAMECC0" : 128,
-"AM6_DEV_EFUSE0" : 69,
-"AM6_DEV_MCASP0" : 104,
-"AM6_DEV_MCASP1" : 105,
-"AM6_DEV_MCASP2" : 106,
-"AM6_DEV_MCU_ARMSS0" : 129,
-"AM6_DEV_MCU_ARMSS0_CPU0" : 159,
-"AM6_DEV_MCU_ARMSS0_CPU1" : 245,
-"AM6_DEV_CCDEBUGSS0" : 66,
-"AM6_DEV_WKUP_CTRL_MMR0" : 155,
-"AM6_DEV_MCU_CBASS_FW0" : 91,
-"AM6_DEV_MCU_CPSW0" : 5,
-"AM6_DEV_SERDES0" : 153,
-"AM6_DEV_SERDES1" : 154,
-"AM6_DEV_OLDI_TX_CORE_MAIN_0" : 216,
-"AM6_DEV_MCU_ADC1" : 1,
-"AM6_DEV_MCU_ADC0" : 0,
-"AM6_DEV_WKUP_DMSC0" : 22,
-"AM6_DEV_MCU_PLL_MMR0" : 108,
-"AM6_DEV_MCU_SEC_MMR0" : 109,
-"AM6_DEV_GIC0" : 56,
-"AM6_DEV_MCU_DEBUGSS0" : 71,
-"AM6_DEV_EQEP0" : 49,
-"AM6_DEV_EQEP2" : 51,
-"AM6_DEV_EQEP1" : 50,
-"AM6_DEV_WKUP_GPIO0" : 59,
-"AM6_DEV_GPIO0" : 57,
-"AM6_DEV_GPIO1" : 58,
-"AM6_DEV_COMPUTE_CLUSTER_MSMC0" : 196,
-"AM6_DEV_COMPUTE_CLUSTER_PBIST0" : 197,
-"AM6_DEV_COMPUTE_CLUSTER_CPAC0" : 198,
-"AM6_DEV_COMPUTE_CLUSTER_CPAC_PBIST0" : 199,
-"AM6_DEV_COMPUTE_CLUSTER_CPAC1" : 200,
-"AM6_DEV_COMPUTE_CLUSTER_CPAC_PBIST1" : 201,
-"AM6_DEV_COMPUTE_CLUSTER_A53_0" : 202,
-"AM6_DEV_COMPUTE_CLUSTER_A53_1" : 203,
-"AM6_DEV_COMPUTE_CLUSTER_A53_2" : 204,
-"AM6_DEV_COMPUTE_CLUSTER_A53_3" : 205,
-"AM6_DEV_WKUP_CBASS0" : 94,
-"AM6_DEV_MCU_ROM0" : 78,
-"AM6_DEV_K3_ARM_ATB_FUNNEL_3_32_MCU_0" : 217,
-"AM6_DEV_ESM0" : 52,
-"AM6_DEV_PRU_ICSSG2" : 64,
-"AM6_DEV_PRU_ICSSG0" : 62,
-"AM6_DEV_PRU_ICSSG1" : 63,
-"AM6_DEV_MCU_ESM0" : 53,
-"AM6_DEV_ECAP0" : 39,
-"AM6_DEV_WKUP_ESM0" : 54,
-"AM6_DEV_MCU_EFUSE0" : 72,
-"AM6_DEV_MCU_CTRL_MMR0" : 107,
-"AM6_DEV_PSC0" : 70,
-"AM6_DEV_CTRL_MMR0" : 99,
-"AM6_DEV_MCU_MCAN0" : 102,
-"AM6_DEV_MCU_MCAN1" : 103,
-"AM6_DEV_DDRSS0" : 20,
-"AM6_DEV_MCU_NAVSS0" : 119,
-"AM6_DEV_MCU_FSS0" : 55,
-"AM6_DEV_DFTSS0" : 117,
-"AM6_DEV_WKUP_GPIOMUX_INTRTR0" : 156,
-"AM6_DEV_GPIOMUX_INTRTR0" : 100,
-"AM6_DEV_MAIN2MCU_LVL_INTRTR0" : 97,
-"AM6_DEV_MAIN2MCU_PLS_INTRTR0" : 98,
-"AM6_DEV_ICEMELTER_WKUP_0" : 218,
-"AM6_DEV_GPU0" : 65,
-"AM6_DEV_PDMA_DEBUG0" : 122,
-"AM6_DEV_PDMA0" : 123,
-"AM6_DEV_PDMA1" : 124,
-"AM6_DEV_MCU_PDMA0" : 125,
-"AM6_DEV_MCU_PDMA1" : 126,
-"AM6_DEV_MCU_MSRAM0" : 116,
-"AM6_DEV_CMPEVENT_INTRTR0" : 3,
-"AM6_DEV_DEBUGSUSPENDRTR0" : 81,
-"AM6_DEV_TIMESYNC_INTRTR0" : 145,
-"AM6_DEV_CBASS_DEBUG0" : 83,
-"AM6_DEV_CBASS_FW0" : 84,
-"AM6_DEV_MCU_CBASS_DEBUG0" : 90,
-"AM6_DEV_WKUP_CBASS_FW0" : 96,
-"AM6_DEV_PCIE0" : 120,
-"AM6_DEV_PCIE1" : 121,
-"AM6_DEV_GTC0" : 61,
-"AM6_DEV_K3_LED_MAIN_0" : 219,
-"AM6_DEV_WKUP_VTM0" : 80,
-"AM6_DEV_MMCSD0" : 47,
-"AM6_DEV_MCU_ECC_AGGR0" : 92,
-"AM6_DEV_ECC_AGGR1" : 87,
-"AM6_DEV_ECC_AGGR2" : 88,
-"AM6_DEV_MCU_ECC_AGGR1" : 93,
-"AM6_DEV_WKUP_ECC_AGGR0" : 95,
-"AM6_DEV_VDC_DATA_VBUSM_32B_REF_WKUP2MCU" : 220,
-"AM6_DEV_VDC_DATA_VBUSM_32B_REF_MCU2WKUP" : 221,
-"AM6_DEV_VDC_DATA_VBUSM_64B_REF_MAIN2MCU" : 222,
-"AM6_DEV_VDC_DATA_VBUSM_64B_REF_MCU2MAIN" : 223,
-"AM6_DEV_VDC_DMSC_DBG_VBUSP_32B_REF_DBG2DMSC" : 224,
-"AM6_DEV_VDC_INFRA_VBUSP_32B_REF_WKUP2MAIN_INFRA" : 225,
-"AM6_DEV_VDC_INFRA_VBUSP_32B_REF_MCU2MAIN_INFRA" : 226,
-"AM6_DEV_VDC_SOC_FW_VBUSP_32B_REF_FWWKUP2MCU" : 227,
-"AM6_DEV_VDC_SOC_FW_VBUSP_32B_REF_FWMCU2MAIN" : 228,
-"AM6_DEV_VDC_MCU_DBG_VBUSP_32B_REF_DBGMAIN2MCU" : 229,
-"AM6_DEV_ECC_AGGR0" : 86,
-"AM6_DEV_VDC_NAV_PSIL_128B_REF_MAIN2MCU" : 230,
-"AM6_DEV_MCU_PSRAM0" : 127,
-"AM6_DEV_GS80PRG_SOC_WRAP_WKUP_0" : 231,
-"AM6_DEV_GS80PRG_MCU_WRAP_WKUP_0" : 232,
-"AM6_DEV_MCU_CBASS0" : 89,
-"AM6_DEV_MX_WAKEUP_RESET_SYNC_WKUP_0" : 233,
-"AM6_DEV_MX_EFUSE_MAIN_CHAIN_MAIN_0" : 234,
-"AM6_DEV_MX_EFUSE_MCU_CHAIN_MCU_0" : 235,
-"AM6_DEV_DUMMY_IP_LPSC_WKUP2MCU" : 236,
-"AM6_DEV_DUMMY_IP_LPSC_WKUP2MAIN_INFRA" : 237,
-"AM6_DEV_DUMMY_IP_LPSC_DEBUG2DMSC" : 238,
-"AM6_DEV_DUMMY_IP_LPSC_DMSC" : 239,
-"AM6_DEV_DUMMY_IP_LPSC_MCU2MAIN_INFRA" : 240,
-"AM6_DEV_DUMMY_IP_LPSC_MCU2MAIN" : 241,
-"AM6_DEV_DUMMY_IP_LPSC_MCU2WKUP" : 242,
-"AM6_DEV_DUMMY_IP_LPSC_MAIN2MCU" : 243,
-"AM6_DEV_DUMMY_IP_LPSC_EMIF_DATA" : 244,
-"AM6_DEV_BOARD0" : 157,
-"AM6_DEV_WKUP_DMSC0_CORTEX_M3_0" : 161,
-"AM6_DEV_WKUP_DMSC0_INTR_AGGR_0" : 162,
-"AM6_DEV_NAVSS0_CPTS0" : 163,
-"AM6_DEV_NAVSS0_INTR_ROUTER_0" : 182,
-"AM6_DEV_NAVSS0_MAILBOX0_CLUSTER0" : 164,
-"AM6_DEV_NAVSS0_MAILBOX0_CLUSTER1" : 165,
-"AM6_DEV_NAVSS0_MAILBOX0_CLUSTER2" : 166,
-"AM6_DEV_NAVSS0_MAILBOX0_CLUSTER3" : 167,
-"AM6_DEV_NAVSS0_MAILBOX0_CLUSTER4" : 168,
-"AM6_DEV_NAVSS0_MAILBOX0_CLUSTER5" : 169,
-"AM6_DEV_NAVSS0_MAILBOX0_CLUSTER6" : 170,
-"AM6_DEV_NAVSS0_MAILBOX0_CLUSTER7" : 171,
-"AM6_DEV_NAVSS0_MAILBOX0_CLUSTER8" : 172,
-"AM6_DEV_NAVSS0_MAILBOX0_CLUSTER9" : 173,
-"AM6_DEV_NAVSS0_MAILBOX0_CLUSTER10" : 174,
-"AM6_DEV_NAVSS0_MAILBOX0_CLUSTER11" : 175,
-"AM6_DEV_NAVSS0_MCRC0" : 176,
-"AM6_DEV_NAVSS0_MODSS_INTA0" : 180,
-"AM6_DEV_NAVSS0_MODSS_INTA1" : 181,
-"AM6_DEV_NAVSS0_PROXY0" : 185,
-"AM6_DEV_NAVSS0_PVU0" : 177,
-"AM6_DEV_NAVSS0_PVU1" : 178,
-"AM6_DEV_NAVSS0_RINGACC0" : 187,
-"AM6_DEV_NAVSS0_SEC_PROXY0" : 186,
-"AM6_DEV_NAVSS0_TIMER_MGR0" : 183,
-"AM6_DEV_NAVSS0_TIMER_MGR1" : 184,
-"AM6_DEV_NAVSS0_UDMAP0" : 188,
-"AM6_DEV_NAVSS0_UDMASS_INTA0" : 179,
-"AM6_DEV_MCU_NAVSS0_INTR_AGGR_0" : 189,
-"AM6_DEV_MCU_NAVSS0_INTR_ROUTER_0" : 190,
-"AM6_DEV_MCU_NAVSS0_MCRC0" : 193,
-"AM6_DEV_MCU_NAVSS0_PROXY0" : 191,
-"AM6_DEV_MCU_NAVSS0_RINGACC0" : 195,
-"AM6_DEV_MCU_NAVSS0_SEC_PROXY0" : 192,
-"AM6_DEV_MCU_NAVSS0_UDMAP0" : 194,
-
-"RESASG_SUBTYPE_SHIFT" : 0x0000,
-"RESASG_SUBTYPE_MASK" : 0x003F,
-"RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_VINT" : 0x00,
-"RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_SEVI" : 0x01,
-"RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_MEVI" : 0x02,
-"RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_GEVI" : 0x03,
-"RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_CNT" : 0x04,
-"RESASG_SUBTYPE_MAIN_NAV_MODSS_IA0_VINT" : 0x00,
-"RESASG_SUBTYPE_MAIN_NAV_MODSS_IA0_SEVI" : 0x01,
-"RESASG_SUBTYPE_MAIN_NAV_MODSS_IA0_CNT" : 0x02,
-"RESASG_SUBTYPE_MAIN_NAV_MODSS_IA1_VINT" : 0x00,
-"RESASG_SUBTYPE_MAIN_NAV_MODSS_IA1_SEVI" : 0x01,
-"RESASG_SUBTYPE_MAIN_NAV_MODSS_IA1_CNT" : 0x02,
-"RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_VINT" : 0x00,
-"RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_SEVI" : 0x01,
-"RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_MEVI" : 0x02,
-"RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_GEVI" : 0x03,
-"RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_CNT" : 0x04,
-"RESASG_SUBTYPE_MAIN_NAV_MCRC_LEVI" : 0x00,
-"RESASG_SUBTYPE_MAIN_NAV_MCRC_CNT" : 0x01,
-"RESASG_SUBTYPE_MCU_NAV_MCRC_LEVI" : 0x00,
-"RESASG_SUBTYPE_MCU_NAV_MCRC_CNT" : 0x01,
-"RESASG_SUBTYPE_MAIN_NAV_UDMAP_TRIGGER" : 0x00,
-"RESASG_SUBTYPE_MAIN_NAV_UDMAP_TX_HCHAN" : 0x01,
-"RESASG_SUBTYPE_MAIN_NAV_UDMAP_TX_CHAN" : 0x02,
-"RESASG_SUBTYPE_MAIN_NAV_UDMAP_TX_ECHAN" : 0x03,
-"RESASG_SUBTYPE_MAIN_NAV_UDMAP_RX_HCHAN" : 0x04,
-"RESASG_SUBTYPE_MAIN_NAV_UDMAP_RX_CHAN" : 0x05,
-"RESASG_SUBTYPE_MAIN_NAV_UDMAP_RX_FLOW_COMMON" : 0x06,
-"RESASG_SUBTYPE_MAIN_NAV_UDMAP_INVALID_FLOW_OES" : 0x07,
-"RESASG_SUBTYPE_MAIN_NAV_UDMAP_GCFG" : 0x08,
-"RESASG_SUBTYPE_MAIN_NAV_UDMAP_CNT" : 0x09,
-"RESASG_SUBTYPE_MCU_NAV_UDMAP_TRIGGER" : 0x00,
-"RESASG_SUBTYPE_MCU_NAV_UDMAP_TX_HCHAN" : 0x01,
-"RESASG_SUBTYPE_MCU_NAV_UDMAP_TX_CHAN" : 0x02,
-"RESASG_SUBTYPE_MCU_NAV_UDMAP_RX_HCHAN" : 0x03,
-"RESASG_SUBTYPE_MCU_NAV_UDMAP_RX_CHAN" : 0x04,
-"RESASG_SUBTYPE_MCU_NAV_UDMAP_RX_FLOW_COMMON" : 0x05,
-"RESASG_SUBTYPE_MCU_NAV_UDMAP_INVALID_FLOW_OES" : 0x06,
-"RESASG_SUBTYPE_MCU_NAV_UDMAP_GCFG" : 0x07,
-"RESASG_SUBTYPE_MCU_NAV_UDMAP_CNT" : 0x08,
-"RESASG_SUBTYPE_MSMC_DRU" : 0x00,
-"RESASG_SUBTYPE_MSMC_CNT" : 0x01,
-"RESASG_SUBTYPE_MAIN_NAV_RA_RING_UDMAP_TX" : 0x00,
-"RESASG_SUBTYPE_MAIN_NAV_RA_RING_UDMAP_RX" : 0x01,
-"RESASG_SUBTYPE_MAIN_NAV_RA_RING_GP" : 0x02,
-"RESASG_SUBTYPE_MAIN_NAV_RA_ERROR_OES" : 0x03,
-"RESASG_SUBTYPE_MAIN_NAV_RA_VIRTID" : 0x04,
-"RESASG_SUBTYPE_MAIN_NAV_RA_MONITOR" : 0x05,
-"RESASG_SUBTYPE_MAIN_NAV_RA_CNT" : 0x06,
-"RESASG_SUBTYPE_MAIN_NAV_PROXY_PROXIES" : 0x00,
-"RESASG_SUBTYPE_MAIN_NAV_PROXY_CNT" : 0x01,
-"RESASG_SUBTYPE_MCU_NAV_RA_RING_UDMAP_TX" : 0x00,
-"RESASG_SUBTYPE_MCU_NAV_RA_RING_UDMAP_RX" : 0x01,
-"RESASG_SUBTYPE_MCU_NAV_RA_RING_GP" : 0x02,
-"RESASG_SUBTYPE_MCU_NAV_RA_ERROR_OES" : 0x03,
-"RESASG_SUBTYPE_MCU_NAV_RA_VIRTID" : 0x04,
-"RESASG_SUBTYPE_MCU_NAV_RA_MONITOR" : 0x05,
-"RESASG_SUBTYPE_MCU_NAV_RA_CNT" : 0x06,
-"RESASG_SUBTYPE_GIC_IRQ_MAIN_NAV_SET0" : 0x00,
-"RESASG_SUBTYPE_GIC_IRQ_MAIN_GPIO" : 0x01,
-"RESASG_SUBTYPE_GIC_IRQ_MAIN_NAV_SET1" : 0x02,
-"RESASG_SUBTYPE_GIC_IRQ_COMP_EVT" : 0x03,
-"RESASG_SUBTYPE_GIC_IRQ_WKUP_GPIO" : 0x04,
-"RESASG_SUBTYPE_GIC_IRQ_CNT" : 0x05,
-"RESASG_SUBTYPE_PULSAR_C0_IRQ_MCU_NAV" : 0x00,
-"RESASG_SUBTYPE_PULSAR_C0_IRQ_WKUP_GPIO" : 0x01,
-"RESASG_SUBTYPE_PULSAR_C0_IRQ_MAIN2MCU_LVL" : 0x02,
-"RESASG_SUBTYPE_PULSAR_C0_IRQ_MAIN2MCU_PLS" : 0x03,
-"RESASG_SUBTYPE_PULSAR_C0_IRQ_CNT" : 0x04,
-"RESASG_SUBTYPE_PULSAR_C1_IRQ_MCU_NAV" : 0x00,
-"RESASG_SUBTYPE_PULSAR_C1_IRQ_WKUP_GPIO" : 0x01,
-"RESASG_SUBTYPE_PULSAR_C1_IRQ_MAIN2MCU_LVL" : 0x02,
-"RESASG_SUBTYPE_PULSAR_C1_IRQ_MAIN2MCU_PLS" : 0x03,
-"RESASG_SUBTYPE_PULSAR_C1_IRQ_CNT" : 0x04,
-"RESASG_SUBTYPE_ICSSG0_IRQ_MAIN_NAV" : 0x00,
-"RESASG_SUBTYPE_ICSSG0_IRQ_MAIN_GPIO" : 0x01,
-"RESASG_SUBTYPE_ICSSG0_IRQ_CNT" : 0x02,
-"RESASG_SUBTYPE_ICSSG1_IRQ_MAIN_NAV" : 0x00,
-"RESASG_SUBTYPE_ICSSG1_IRQ_MAIN_GPIO" : 0x01,
-"RESASG_SUBTYPE_ICSSG1_IRQ_CNT" : 0x02,
-"RESASG_SUBTYPE_ICSSG2_IRQ_MAIN_NAV" : 0x00,
-"RESASG_SUBTYPE_ICSSG2_IRQ_MAIN_GPIO" : 0x01,
-"RESASG_SUBTYPE_ICSSG2_IRQ_CNT" : 0x02,
-"RESASG_SUBTYPE_MCU_NAV_PROXY_PROXIES" : 0x00,
-"RESASG_SUBTYPE_MCU_NAV_PROXY_CNT" : 0x01,
-
-"HOST_ID_DMSC" : 0,
-"HOST_ID_R5_0" : 3,
-"HOST_ID_R5_1" : 4,
-"HOST_ID_R5_2" : 5,
-"HOST_ID_R5_3" : 6,
-"HOST_ID_A53_0" : 10,
-"HOST_ID_A53_1" : 11,
-"HOST_ID_A53_2" : 12,
-"HOST_ID_A53_3" : 13,
-"HOST_ID_A53_4" : 14,
-"HOST_ID_A53_5" : 15,
-"HOST_ID_A53_6" : 16,
-"HOST_ID_A53_7" : 17,
-"HOST_ID_GPU_0" : 30,
-"HOST_ID_GPU_1" : 31,
-"HOST_ID_ICSSG_0" : 50,
-"HOST_ID_ICSSG_1" : 51,
-"HOST_ID_ICSSG_2" : 52,
-"HOST_ID_ALL" : 128,
-"HOST_ID_CNT" : 19,
-}
diff --git a/respart/am65x_sr2.py b/respart/am65x_sr2.py
new file mode 100644 (file)
index 0000000..6294a79
--- /dev/null
@@ -0,0 +1,70 @@
+# am65x_sr2.py - Auto generated SoC data
+
+
+RESASG_TYPE_SHIFT = 6
+RESASG_SUBTYPE_SHIFT = 0
+
+const_values  = {
+"AM6_DEV_CMPEVENT_INTRTR0" : 3,
+"AM6_DEV_MAIN2MCU_LVL_INTRTR0" : 97,
+"AM6_DEV_MAIN2MCU_PLS_INTRTR0" : 98,
+"AM6_DEV_GPIOMUX_INTRTR0" : 100,
+"AM6_DEV_TIMESYNC_INTRTR0" : 145,
+"AM6_DEV_WKUP_GPIOMUX_INTRTR0" : 156,
+"AM6_DEV_NAVSS0_UDMASS_INTA0" : 179,
+"AM6_DEV_NAVSS0_MODSS_INTA0" : 180,
+"AM6_DEV_NAVSS0_MODSS_INTA1" : 181,
+"AM6_DEV_NAVSS0_INTR_ROUTER_0" : 182,
+"AM6_DEV_NAVSS0_PROXY0" : 185,
+"AM6_DEV_NAVSS0_RINGACC0" : 187,
+"AM6_DEV_NAVSS0_UDMAP0" : 188,
+"AM6_DEV_MCU_NAVSS0_INTR_AGGR_0" : 189,
+"AM6_DEV_MCU_NAVSS0_INTR_ROUTER_0" : 190,
+"AM6_DEV_MCU_NAVSS0_PROXY0" : 191,
+"AM6_DEV_MCU_NAVSS0_UDMAP0" : 194,
+"AM6_DEV_MCU_NAVSS0_RINGACC0" : 195,
+
+"RESASG_SUBTYPE_IR_OUTPUT" : 0,
+"RESASG_SUBTYPE_PROXY_PROXIES" : 0,
+"RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON" : 0,
+"RESASG_SUBTYPE_RA_ERROR_OES" : 0,
+"RESASG_SUBTYPE_RA_GP" : 1,
+"RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES" : 1,
+"RESASG_SUBTYPE_RA_UDMAP_RX" : 2,
+"RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER" : 2,
+"RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG" : 3,
+"RESASG_SUBTYPE_RA_UDMAP_TX" : 3,
+"RESASG_SUBTYPE_RA_UDMAP_TX_EXT" : 4,
+"RESASG_SUBTYPE_RA_UDMAP_RX_H" : 5,
+"RESASG_SUBTYPE_RA_UDMAP_TX_H" : 7,
+"RESASG_SUBTYPE_RA_VIRTID" : 10,
+"RESASG_SUBTYPE_IA_VINT" : 10,
+"RESASG_SUBTYPE_UDMAP_RX_CHAN" : 10,
+"RESASG_SUBTYPE_UDMAP_RX_HCHAN" : 11,
+"RESASG_SUBTYPE_RA_MONITORS" : 11,
+"RESASG_SUBTYPE_GLOBAL_EVENT_SEVT" : 13,
+"RESASG_SUBTYPE_UDMAP_TX_CHAN" : 13,
+"RESASG_SUBTYPE_UDMAP_TX_ECHAN" : 14,
+"RESASG_SUBTYPE_UDMAP_TX_HCHAN" : 15,
+
+"HOST_ID_DMSC" : 0,
+"HOST_ID_R5_0" : 3,
+"HOST_ID_R5_1" : 4,
+"HOST_ID_R5_2" : 5,
+"HOST_ID_R5_3" : 6,
+"HOST_ID_A53_0" : 10,
+"HOST_ID_A53_1" : 11,
+"HOST_ID_A53_2" : 12,
+"HOST_ID_A53_3" : 13,
+"HOST_ID_A53_4" : 14,
+"HOST_ID_A53_5" : 15,
+"HOST_ID_A53_6" : 16,
+"HOST_ID_A53_7" : 17,
+"HOST_ID_CNT" : 19,
+"HOST_ID_GPU_0" : 30,
+"HOST_ID_GPU_1" : 31,
+"HOST_ID_ICSSG_0" : 50,
+"HOST_ID_ICSSG_1" : 51,
+"HOST_ID_ICSSG_2" : 52,
+"HOST_ID_ALL" : 128,
+}
\ No newline at end of file
diff --git a/respart/am6x.py b/respart/am6x.py
new file mode 100644 (file)
index 0000000..e56f6aa
--- /dev/null
@@ -0,0 +1,70 @@
+# am6x.py - Auto generated SoC data
+
+
+RESASG_TYPE_SHIFT = 6
+RESASG_SUBTYPE_SHIFT = 0
+
+const_values  = {
+"AM6_DEV_CMPEVENT_INTRTR0" : 3,
+"AM6_DEV_MAIN2MCU_LVL_INTRTR0" : 97,
+"AM6_DEV_MAIN2MCU_PLS_INTRTR0" : 98,
+"AM6_DEV_GPIOMUX_INTRTR0" : 100,
+"AM6_DEV_TIMESYNC_INTRTR0" : 145,
+"AM6_DEV_WKUP_GPIOMUX_INTRTR0" : 156,
+"AM6_DEV_NAVSS0_UDMASS_INTA0" : 179,
+"AM6_DEV_NAVSS0_MODSS_INTA0" : 180,
+"AM6_DEV_NAVSS0_MODSS_INTA1" : 181,
+"AM6_DEV_NAVSS0_INTR_ROUTER_0" : 182,
+"AM6_DEV_NAVSS0_PROXY0" : 185,
+"AM6_DEV_NAVSS0_RINGACC0" : 187,
+"AM6_DEV_NAVSS0_UDMAP0" : 188,
+"AM6_DEV_MCU_NAVSS0_INTR_AGGR_0" : 189,
+"AM6_DEV_MCU_NAVSS0_INTR_ROUTER_0" : 190,
+"AM6_DEV_MCU_NAVSS0_PROXY0" : 191,
+"AM6_DEV_MCU_NAVSS0_UDMAP0" : 194,
+"AM6_DEV_MCU_NAVSS0_RINGACC0" : 195,
+
+"RESASG_SUBTYPE_IR_OUTPUT" : 0,
+"RESASG_SUBTYPE_PROXY_PROXIES" : 0,
+"RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON" : 0,
+"RESASG_SUBTYPE_RA_ERROR_OES" : 0,
+"RESASG_SUBTYPE_RA_GP" : 1,
+"RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES" : 1,
+"RESASG_SUBTYPE_RA_UDMAP_RX" : 2,
+"RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER" : 2,
+"RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG" : 3,
+"RESASG_SUBTYPE_RA_UDMAP_TX" : 3,
+"RESASG_SUBTYPE_RA_UDMAP_TX_EXT" : 4,
+"RESASG_SUBTYPE_RA_UDMAP_RX_H" : 5,
+"RESASG_SUBTYPE_RA_UDMAP_TX_H" : 7,
+"RESASG_SUBTYPE_RA_VIRTID" : 10,
+"RESASG_SUBTYPE_IA_VINT" : 10,
+"RESASG_SUBTYPE_UDMAP_RX_CHAN" : 10,
+"RESASG_SUBTYPE_UDMAP_RX_HCHAN" : 11,
+"RESASG_SUBTYPE_RA_MONITORS" : 11,
+"RESASG_SUBTYPE_GLOBAL_EVENT_SEVT" : 13,
+"RESASG_SUBTYPE_UDMAP_TX_CHAN" : 13,
+"RESASG_SUBTYPE_UDMAP_TX_ECHAN" : 14,
+"RESASG_SUBTYPE_UDMAP_TX_HCHAN" : 15,
+
+"HOST_ID_DMSC" : 0,
+"HOST_ID_R5_0" : 3,
+"HOST_ID_R5_1" : 4,
+"HOST_ID_R5_2" : 5,
+"HOST_ID_R5_3" : 6,
+"HOST_ID_A53_0" : 10,
+"HOST_ID_A53_1" : 11,
+"HOST_ID_A53_2" : 12,
+"HOST_ID_A53_3" : 13,
+"HOST_ID_A53_4" : 14,
+"HOST_ID_A53_5" : 15,
+"HOST_ID_A53_6" : 16,
+"HOST_ID_A53_7" : 17,
+"HOST_ID_CNT" : 19,
+"HOST_ID_GPU_0" : 30,
+"HOST_ID_GPU_1" : 31,
+"HOST_ID_ICSSG_0" : 50,
+"HOST_ID_ICSSG_1" : 51,
+"HOST_ID_ICSSG_2" : 52,
+"HOST_ID_ALL" : 128,
+}
\ No newline at end of file