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raw | patch | inline | side by side (parent: 08c8ea6)
author | Kishon Vijay Abraham I <kishon@ti.com> | |
Thu, 24 Aug 2017 14:12:53 +0000 (19:42 +0530) | ||
committer | Jean-Jacques Hiblot <jjhiblot@ti.com> | |
Fri, 25 Aug 2017 12:16:14 +0000 (14:16 +0200) |
DRA76 EVM has a 4-lane PCIe connector and DRA76 can support x2 lanes.
Enable both the PCIe lanes here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Enable both the PCIe lanes here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
arch/arm/boot/dts/dra76-evm.dts | patch | blob | history |
index d5507b3c4351dd3bb20b046a61c8609c8a302a92..db4fc1e99b1db58bef08f5d4a03a44f14387cf2c 100644 (file)
spi-max-frequency = <96000000>;
};
};
+
+&pcie2_phy {
+ status = "okay";
+};
+
+&pcie1_rc {
+ num-lanes = <2>;
+ phys = <&pcie1_phy>, <&pcie2_phy>;
+ phy-names = "pcie-phy0", "pcie-phy1";
+};