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raw | patch | inline | side by side (parent: 653c186)
raw | patch | inline | side by side (parent: 653c186)
author | Jean-Jacques Hiblot <jjhiblot@ti.com> | |
Mon, 26 Jun 2017 14:26:47 +0000 (16:26 +0200) | ||
committer | Jean-Jacques Hiblot <jjhiblot@ti.com> | |
Thu, 13 Jul 2017 08:03:57 +0000 (10:03 +0200) |
This allows to use ADMA in the SPL and when building with no DT support.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
drivers/mmc/omap_hsmmc.c | patch | blob | history |
index 4d4962ac8a2c078e229ac7d2f8c103570423eaa6..3e24936cef3d9cb7e76d2a061e803d4d28456e4b 100644 (file)
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
#define SYSCTL_SRC (1 << 25)
#define SYSCTL_SRD (1 << 26)
+#ifndef CONFIG_OMAP34XX
+#define SUPPORTS_ADMA
+#endif
+
#ifdef CONFIG_IODELAY_RECALIBRATION
struct omap_hsmmc_pinctrl_state {
struct pad_conf_entry *padconf;
int wp_gpio;
#endif
#endif
-#ifdef CONFIG_DM_MMC
- uint iov;
- uint timing;
+
+#ifdef SUPPORTS_ADMA
u8 controller_flags;
struct omap_hsmmc_adma_desc *adma_desc_table;
uint desc_slot;
+#endif
+ ushort last_cmd;
+
+#ifdef CONFIG_DM_MMC
+ uint iov;
+ uint timing;
int node;
char *version;
struct udevice *vmmc_supply;
struct udevice *vmmc_aux_supply;
- ushort last_cmd;
#ifdef CONFIG_IODELAY_RECALIBRATION
struct omap_hsmmc_pinctrl_state *default_pinctrl_state;
struct omap_hsmmc_pinctrl_state *hs_pinctrl_state;
uint signal_voltage;
};
-#ifdef CONFIG_DM_MMC
+#ifdef SUPPORTS_ADMA
struct omap_hsmmc_adma_desc {
u8 attr;
u8 reserved;
unsigned int reg_val;
unsigned int dsor;
ulong start;
-#ifdef CONFIG_DM_MMC
struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv;
-#endif
- mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr;
+ mmc_base = priv->base_addr;
mmc_board_init(mmc);
writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET,
}
}
-#ifdef CONFIG_DM_MMC
- omap_hsmmc_set_capabilities(mmc);
- omap_hsmmc_conf_bus_power(mmc, priv->iov);
+#ifdef SUPPORTS_ADMA
reg_val = readl(&mmc_base->hl_hwinfo);
if (reg_val & MADMA_EN)
priv->controller_flags |= OMAP_HSMMC_USE_ADMA;
+#endif
+
+#ifdef CONFIG_DM_MMC
+ omap_hsmmc_set_capabilities(mmc);
+ omap_hsmmc_conf_bus_power(mmc, priv->iov);
#else
writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl);
writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP,
}
}
-#ifdef CONFIG_DM_MMC
+#ifdef SUPPORTS_ADMA
static int omap_hsmmc_adma_desc(struct mmc *mmc, char *buf, u16 len, bool end)
{
struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv;
struct hsmmc *mmc_base;
unsigned int flags, mmc_stat;
ulong start;
-#ifdef CONFIG_DM_MMC
+#ifdef SUPPORTS_ADMA
struct omap_hsmmc_data *priv = (struct omap_hsmmc_data *)mmc->priv;
priv->last_cmd = cmd->cmdidx;
#endif
else
flags |= (DP_DATA | DDIR_WRITE);
-#ifdef CONFIG_DM_MMC
+#ifdef SUPPORTS_ADMA
if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) &&
cmd->cmdidx != MMC_SEND_TUNING_BLOCK_HS200) {
omap_hsmmc_prepare_data(mmc, data);
}
}
-#ifdef CONFIG_DM_MMC
+#ifdef SUPPORTS_ADMA
if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) && data &&
cmd->cmdidx != MMC_SEND_TUNING_BLOCK_HS200) {
if (mmc_stat & IE_ADMAE) {