PCT: Add support for J6Plus SR1.0 silicon
[glsdk/iodelay-config.git] / XMLFiles / DRA77xP_DRA76xP / model_DRA77xP_DRA76xP_SR1.0_v1.0.1.xml
1 <?xml version="1.0" encoding="US-ASCII"?>\r
2 <SoC>\r
3 <!--\r
4 <projectName>DRA77xP_DRA76xP</projectName>\r
5 <versionNumber>1.0.1</versionNumber>\r
6 -->\r
7 <padDB>\r
8 \r
9 <!-- START REGULAR PADCONF blocks -->\r
10 \r
11 <clockNode>\r
12   <name>xref_clk2</name>\r
13   <type>\r
14     <pad>\r
15       <ballname>B25</ballname>\r
16       <dir>IO</dir>\r
17       <numberOfMuxmodes>16</numberOfMuxmodes>\r
18       <muxmode>\r
19         <mode>0</mode>\r
20         <signal>xref_clk2</signal>\r
21         <color>0xCC0033</color>\r
22       </muxmode>\r
23       <muxmode>\r
24         <mode>1</mode>\r
25         <signal>mcasp2_axr10</signal>\r
26         <color>0xcd5c5c</color>\r
27         <virtualmode>\r
28           <mode>\r
29             <value>-1</value>\r
30             <name>NA</name>\r
31           </mode>\r
32           <mode>\r
33             <value>13</value>\r
34             <name>MCASP2_VIRTUAL1_ASYNC_RX_80M</name>\r
35           </mode>\r
36           <mode>\r
37             <value>12</value>\r
38             <name>MCASP2_VIRTUAL2_ASYNC_RX</name>\r
39           </mode>\r
40           <mode>\r
41             <value>0</value>\r
42             <name>MCASP2_VIRTUAL3_ASYNC_TX</name>\r
43           </mode>\r
44           <mode>\r
45             <value>11</value>\r
46             <name>MCASP2_VIRTUAL4_SYNC_RX</name>\r
47           </mode>\r
48           <mode>\r
49             <value>10</value>\r
50             <name>MCASP2_VIRTUAL5_SYNC_RX_80M</name>\r
51           </mode>\r
52         </virtualmode>\r
53       </muxmode>\r
54       <muxmode>\r
55         <mode>2</mode>\r
56         <signal>mcasp1_axr6</signal>\r
57         <color>0xcd5c5c</color>\r
58         <virtualmode>\r
59           <mode>\r
60             <value>-1</value>\r
61             <name>NA</name>\r
62           </mode>\r
63           <mode>\r
64             <value>5</value>\r
65             <name>MCASP1_VIRTUAL1_ASYNC_TX</name>\r
66           </mode>\r
67           <mode>\r
68             <value>15</value>\r
69             <name>MCASP1_VIRTUAL2_SYNC_RX</name>\r
70           </mode>\r
71           <mode>\r
72             <value>14</value>\r
73             <name>MCASP1_VIRTUAL3_ASYNC_RX</name>\r
74           </mode>\r
75         </virtualmode>\r
76       </muxmode>\r
77       <muxmode>\r
78         <mode>3</mode>\r
79         <signal>mcasp3_ahclkx</signal>\r
80         <color>0xcd5c5c</color>\r
81       </muxmode>\r
82       <muxmode>\r
83         <mode>4</mode>\r
84         <signal>mcasp7_ahclkx</signal>\r
85         <color>0xcd5c5c</color>\r
86       </muxmode>\r
87       <muxmode>\r
88         <mode>5</mode>\r
89         <signal>atl_clk2</signal>\r
90         <color>0xdaa520</color>\r
91       </muxmode>\r
92       <muxmode>\r
93         <mode>6</mode>\r
94         <signal>vout2_clk</signal>\r
95         <color>0xe9967a</color>\r
96         <manualmode>\r
97           <cfgreg>\r
98             <name>CFG_XREF_CLK2_OUT</name>\r
99             <mode>\r
100               <adelay>-1</adelay>\r
101               <gdelay>-1</gdelay>\r
102               <name>NA</name>\r
103             </mode>\r
104             <mode>\r
105               <adelay>0</adelay>\r
106               <gdelay>51</gdelay>\r
107               <name>VOUT2_IOSET2_MANUAL1</name>\r
108             </mode>\r
109             <mode>\r
110               <adelay>2016</adelay>\r
111               <gdelay>507</gdelay>\r
112               <name>VOUT2_IOSET2_MANUAL2</name>\r
113             </mode>\r
114             <mode>\r
115               <adelay>0</adelay>\r
116               <gdelay>0</gdelay>\r
117               <name>VOUT2_IOSET2_MANUAL3</name>\r
118             </mode>\r
119             <mode>\r
120               <adelay>0</adelay>\r
121               <gdelay>0</gdelay>\r
122               <name>VOUT2_IOSET2_MANUAL4</name>\r
123             </mode>\r
124           </cfgreg>\r
125         </manualmode>\r
126         <ioset>\r
127           <name>IOSET2</name>\r
128           <AssociatedInfo>\r
129             <signal>vout2_d23</signal>\r
130             <ball>AA4</ball>\r
131             <mode>6</mode>\r
132           </AssociatedInfo>\r
133           <AssociatedInfo>\r
134             <signal>vout2_d22</signal>\r
135             <ball>AB3</ball>\r
136             <mode>6</mode>\r
137           </AssociatedInfo>\r
138           <AssociatedInfo>\r
139             <signal>vout2_d21</signal>\r
140             <ball>AB6</ball>\r
141             <mode>6</mode>\r
142           </AssociatedInfo>\r
143           <AssociatedInfo>\r
144             <signal>vout2_d20</signal>\r
145             <ball>AA3</ball>\r
146             <mode>6</mode>\r
147           </AssociatedInfo>\r
148           <AssociatedInfo>\r
149             <signal>vout2_d19</signal>\r
150             <ball>D17</ball>\r
151             <mode>6</mode>\r
152           </AssociatedInfo>\r
153           <AssociatedInfo>\r
154             <signal>vout2_d18</signal>\r
155             <ball>D16</ball>\r
156             <mode>6</mode>\r
157           </AssociatedInfo>\r
158           <AssociatedInfo>\r
159             <signal>vout2_d17</signal>\r
160             <ball>A20</ball>\r
161             <mode>6</mode>\r
162           </AssociatedInfo>\r
163           <AssociatedInfo>\r
164             <signal>vout2_d16</signal>\r
165             <ball>C17</ball>\r
166             <mode>6</mode>\r
167           </AssociatedInfo>\r
168           <AssociatedInfo>\r
169             <signal>vout2_d15</signal>\r
170             <ball>A16</ball>\r
171             <mode>6</mode>\r
172           </AssociatedInfo>\r
173           <AssociatedInfo>\r
174             <signal>vout2_d14</signal>\r
175             <ball>B16</ball>\r
176             <mode>6</mode>\r
177           </AssociatedInfo>\r
178           <AssociatedInfo>\r
179             <signal>vout2_d13</signal>\r
180             <ball>B15</ball>\r
181             <mode>6</mode>\r
182           </AssociatedInfo>\r
183           <AssociatedInfo>\r
184             <signal>vout2_d12</signal>\r
185             <ball>D15</ball>\r
186             <mode>6</mode>\r
187           </AssociatedInfo>\r
188           <AssociatedInfo>\r
189             <signal>vout2_d11</signal>\r
190             <ball>A14</ball>\r
191             <mode>6</mode>\r
192           </AssociatedInfo>\r
193           <AssociatedInfo>\r
194             <signal>vout2_d10</signal>\r
195             <ball>B14</ball>\r
196             <mode>6</mode>\r
197           </AssociatedInfo>\r
198           <AssociatedInfo>\r
199             <signal>vout2_d9</signal>\r
200             <ball>A19</ball>\r
201             <mode>6</mode>\r
202           </AssociatedInfo>\r
203           <AssociatedInfo>\r
204             <signal>vout2_d8</signal>\r
205             <ball>E15</ball>\r
206             <mode>6</mode>\r
207           </AssociatedInfo>\r
208           <AssociatedInfo>\r
209             <signal>vout2_d7</signal>\r
210             <ball>D12</ball>\r
211             <mode>6</mode>\r
212           </AssociatedInfo>\r
213           <AssociatedInfo>\r
214             <signal>vout2_d6</signal>\r
215             <ball>C11</ball>\r
216             <mode>6</mode>\r
217           </AssociatedInfo>\r
218           <AssociatedInfo>\r
219             <signal>vout2_d5</signal>\r
220             <ball>D13</ball>\r
221             <mode>6</mode>\r
222           </AssociatedInfo>\r
223           <AssociatedInfo>\r
224             <signal>vout2_d4</signal>\r
225             <ball>E12</ball>\r
226             <mode>6</mode>\r
227           </AssociatedInfo>\r
228           <AssociatedInfo>\r
229             <signal>vout2_d3</signal>\r
230             <ball>E11</ball>\r
231             <mode>6</mode>\r
232           </AssociatedInfo>\r
233           <AssociatedInfo>\r
234             <signal>vout2_d2</signal>\r
235             <ball>E13</ball>\r
236             <mode>6</mode>\r
237           </AssociatedInfo>\r
238           <AssociatedInfo>\r
239             <signal>vout2_d1</signal>\r
240             <ball>F14</ball>\r
241             <mode>6</mode>\r
242           </AssociatedInfo>\r
243           <AssociatedInfo>\r
244             <signal>vout2_d0</signal>\r
245             <ball>A13</ball>\r
246             <mode>6</mode>\r
247           </AssociatedInfo>\r
248           <AssociatedInfo>\r
249             <signal>vout2_vsync</signal>\r
250             <ball>F17</ball>\r
251             <mode>6</mode>\r
252           </AssociatedInfo>\r
253           <AssociatedInfo>\r
254             <signal>vout2_hsync</signal>\r
255             <ball>E21</ball>\r
256             <mode>6</mode>\r
257           </AssociatedInfo>\r
258           <AssociatedInfo>\r
259             <signal>vout2_fld</signal>\r
260             <ball>F18</ball>\r
261             <mode>6</mode>\r
262           </AssociatedInfo>\r
263           <AssociatedInfo>\r
264             <signal>vout2_de</signal>\r
265             <ball>A22</ball>\r
266             <mode>6</mode>\r
267           </AssociatedInfo>\r
268         </ioset>\r
269       </muxmode>\r
270       <muxmode>\r
271         <mode>8</mode>\r
272         <signal>vin4a_clk0</signal>\r
273         <color>0xbc8f8f</color>\r
274         <manualmode>\r
275           <cfgreg>\r
276             <name>CFG_XREF_CLK2_IN</name>\r
277             <mode>\r
278               <adelay>-1</adelay>\r
279               <gdelay>-1</gdelay>\r
280               <name>NA</name>\r
281             </mode>\r
282             <mode>\r
283               <adelay>0</adelay>\r
284               <gdelay>0</gdelay>\r
285               <name>VIP2_4A_IOSET3_MANUAL1</name>\r
286             </mode>\r
287             <mode>\r
288               <adelay>0</adelay>\r
289               <gdelay>0</gdelay>\r
290               <name>VIP2_4A_IOSET3_MANUAL2</name>\r
291             </mode>\r
292           </cfgreg>\r
293         </manualmode>\r
294         <ioset>\r
295           <name>IOSET3</name>\r
296           <AssociatedInfo>\r
297             <signal>vin4a_d0</signal>\r
298             <ball>A13</ball>\r
299             <mode>8</mode>\r
300           </AssociatedInfo>\r
301           <AssociatedInfo>\r
302             <signal>vin4a_d1</signal>\r
303             <ball>F14</ball>\r
304             <mode>8</mode>\r
305           </AssociatedInfo>\r
306           <AssociatedInfo>\r
307             <signal>vin4a_d2</signal>\r
308             <ball>E13</ball>\r
309             <mode>8</mode>\r
310           </AssociatedInfo>\r
311           <AssociatedInfo>\r
312             <signal>vin4a_d3</signal>\r
313             <ball>E11</ball>\r
314             <mode>8</mode>\r
315           </AssociatedInfo>\r
316           <AssociatedInfo>\r
317             <signal>vin4a_d4</signal>\r
318             <ball>E12</ball>\r
319             <mode>8</mode>\r
320           </AssociatedInfo>\r
321           <AssociatedInfo>\r
322             <signal>vin4a_d5</signal>\r
323             <ball>D13</ball>\r
324             <mode>8</mode>\r
325           </AssociatedInfo>\r
326           <AssociatedInfo>\r
327             <signal>vin4a_d6</signal>\r
328             <ball>C11</ball>\r
329             <mode>8</mode>\r
330           </AssociatedInfo>\r
331           <AssociatedInfo>\r
332             <signal>vin4a_d7</signal>\r
333             <ball>D12</ball>\r
334             <mode>8</mode>\r
335           </AssociatedInfo>\r
336           <AssociatedInfo>\r
337             <signal>vin4a_d8</signal>\r
338             <ball>E15</ball>\r
339             <mode>8</mode>\r
340           </AssociatedInfo>\r
341           <AssociatedInfo>\r
342             <signal>vin4a_d9</signal>\r
343             <ball>A19</ball>\r
344             <mode>8</mode>\r
345           </AssociatedInfo>\r
346           <AssociatedInfo>\r
347             <signal>vin4a_d10</signal>\r
348             <ball>B14</ball>\r
349             <mode>8</mode>\r
350           </AssociatedInfo>\r
351           <AssociatedInfo>\r
352             <signal>vin4a_d11</signal>\r
353             <ball>A14</ball>\r
354             <mode>8</mode>\r
355           </AssociatedInfo>\r
356           <AssociatedInfo>\r
357             <signal>vin4a_d12</signal>\r
358             <ball>D15</ball>\r
359             <mode>8</mode>\r
360           </AssociatedInfo>\r
361           <AssociatedInfo>\r
362             <signal>vin4a_d13</signal>\r
363             <ball>B15</ball>\r
364             <mode>8</mode>\r
365           </AssociatedInfo>\r
366           <AssociatedInfo>\r
367             <signal>vin4a_d14</signal>\r
368             <ball>B16</ball>\r
369             <mode>8</mode>\r
370           </AssociatedInfo>\r
371           <AssociatedInfo>\r
372             <signal>vin4a_d15</signal>\r
373             <ball>A16</ball>\r
374             <mode>8</mode>\r
375           </AssociatedInfo>\r
376           <AssociatedInfo>\r
377             <signal>vin4a_d16</signal>\r
378             <ball>C17</ball>\r
379             <mode>8</mode>\r
380           </AssociatedInfo>\r
381           <AssociatedInfo>\r
382             <signal>vin4a_d17</signal>\r
383             <ball>A20</ball>\r
384             <mode>8</mode>\r
385           </AssociatedInfo>\r
386           <AssociatedInfo>\r
387             <signal>vin4a_d18</signal>\r
388             <ball>D16</ball>\r
389             <mode>8</mode>\r
390           </AssociatedInfo>\r
391           <AssociatedInfo>\r
392             <signal>vin4a_d19</signal>\r
393             <ball>D17</ball>\r
394             <mode>8</mode>\r
395           </AssociatedInfo>\r
396           <AssociatedInfo>\r
397             <signal>vin4a_d20</signal>\r
398             <ball>AA3</ball>\r
399             <mode>8</mode>\r
400           </AssociatedInfo>\r
401           <AssociatedInfo>\r
402             <signal>vin4a_d21</signal>\r
403             <ball>AB6</ball>\r
404             <mode>8</mode>\r
405           </AssociatedInfo>\r
406           <AssociatedInfo>\r
407             <signal>vin4a_d22</signal>\r
408             <ball>AB3</ball>\r
409             <mode>8</mode>\r
410           </AssociatedInfo>\r
411           <AssociatedInfo>\r
412             <signal>vin4a_d23</signal>\r
413             <ball>AA4</ball>\r
414             <mode>8</mode>\r
415           </AssociatedInfo>\r
416           <AssociatedInfo>\r
417             <signal>vin4a_hsync0</signal>\r
418             <ball>E21</ball>\r
419             <mode>8</mode>\r
420           </AssociatedInfo>\r
421           <AssociatedInfo>\r
422             <signal>vin4a_vsync0</signal>\r
423             <ball>F17</ball>\r
424             <mode>8</mode>\r
425           </AssociatedInfo>\r
426           <AssociatedInfo>\r
427             <signal>vin4a_de0</signal>\r
428             <ball>A22</ball>\r
429             <mode>8</mode>\r
430           </AssociatedInfo>\r
431           <AssociatedInfo>\r
432             <signal>vin4a_fld0</signal>\r
433             <ball>F18</ball>\r
434             <mode>8</mode>\r
435           </AssociatedInfo>\r
436         </ioset>\r
437       </muxmode>\r
438       <muxmode>\r
439         <mode>10</mode>\r
440         <signal>timer15</signal>\r
441         <color>0xffd700</color>\r
442       </muxmode>\r
443       <muxmode>\r
444         <mode>14</mode>\r
445         <signal>gpio6_19</signal>\r
446         <color>0x8fbc8f</color>\r
447       </muxmode>\r
448       <muxmode>\r
449         <mode>15</mode>\r
450         <signal>Driveroff</signal>\r
451         <color>0xf0fff0</color>\r
452       </muxmode>\r
453       <confregisters>\r
454         <regbit>\r
455           <register>CTRL_CORE_PAD_XREF_CLK2</register>\r
456         </regbit>\r
457       </confregisters>\r
458     </pad>\r
459   </type>\r
460 </clockNode>\r
461 <clockNode>\r
462   <name>resetn</name>\r
463   <type>\r
464     <pad>\r
465       <ballname>D24</ballname>\r
466       <dir>I</dir>\r
467       <numberOfMuxmodes>16</numberOfMuxmodes>\r
468       <muxmode>\r
469         <mode>0</mode>\r
470         <signal>resetn</signal>\r
471         <color>0xCC0033</color>\r
472       </muxmode>\r
473       <confregisters>\r
474         <regbit>\r
475           <register>CTRL_CORE_PAD_RESETN</register>\r
476         </regbit>\r
477       </confregisters>\r
478     </pad>\r
479   </type>\r
480 </clockNode>\r
481 <clockNode>\r
482   <name>mmc3_dat5</name>\r
483   <type>\r
484     <pad>\r
485       <ballname>AB5</ballname>\r
486       <dir>IO</dir>\r
487       <numberOfMuxmodes>16</numberOfMuxmodes>\r
488       <muxmode>\r
489         <mode>0</mode>\r
490         <signal>mmc3_dat5</signal>\r
491         <color>0xff6347</color>\r
492         <manualmode>\r
493           <cfgreg>\r
494             <name>CFG_MMC3_DAT5_IN</name>\r
495             <mode>\r
496               <adelay>-1</adelay>\r
497               <gdelay>-1</gdelay>\r
498               <name>NA</name>\r
499             </mode>\r
500             <mode>\r
501               <adelay>782</adelay>\r
502               <gdelay>0</gdelay>\r
503               <name>MMC3_MANUAL1</name>\r
504             </mode>\r
505             <mode>\r
506               <adelay>355</adelay>\r
507               <gdelay>0</gdelay>\r
508               <name>MMC3_MANUAL2</name>\r
509             </mode>\r
510           </cfgreg>\r
511         </manualmode>\r
512         <manualmode>\r
513           <cfgreg>\r
514             <name>CFG_MMC3_DAT5_OEN</name>\r
515             <mode>\r
516               <adelay>-1</adelay>\r
517               <gdelay>-1</gdelay>\r
518               <name>NA</name>\r
519             </mode>\r
520             <mode>\r
521               <adelay>0</adelay>\r
522               <gdelay>0</gdelay>\r
523               <name>MMC3_MANUAL1</name>\r
524             </mode>\r
525             <mode>\r
526               <adelay>0</adelay>\r
527               <gdelay>0</gdelay>\r
528               <name>MMC3_MANUAL2</name>\r
529             </mode>\r
530           </cfgreg>\r
531         </manualmode>\r
532         <manualmode>\r
533           <cfgreg>\r
534             <name>CFG_MMC3_DAT5_OUT</name>\r
535             <mode>\r
536               <adelay>-1</adelay>\r
537               <gdelay>-1</gdelay>\r
538               <name>NA</name>\r
539             </mode>\r
540             <mode>\r
541               <adelay>0</adelay>\r
542               <gdelay>0</gdelay>\r
543               <name>MMC3_MANUAL1</name>\r
544             </mode>\r
545             <mode>\r
546               <adelay>0</adelay>\r
547               <gdelay>0</gdelay>\r
548               <name>MMC3_MANUAL2</name>\r
549             </mode>\r
550           </cfgreg>\r
551         </manualmode>\r
552       </muxmode>\r
553       <muxmode>\r
554         <mode>1</mode>\r
555         <signal>spi4_d1</signal>\r
556         <color>0x3cb371</color>\r
557         <ioset>\r
558           <name>IOSET5</name>\r
559           <AssociatedInfo>\r
560             <signal>spi4_sclk</signal>\r
561             <ball>AA6</ball>\r
562             <mode>1</mode>\r
563           </AssociatedInfo>\r
564           <AssociatedInfo>\r
565             <signal>spi4_d0</signal>\r
566             <ball>AB7</ball>\r
567             <mode>1</mode>\r
568           </AssociatedInfo>\r
569           <AssociatedInfo>\r
570             <signal>spi4_cs0</signal>\r
571             <ball>AA5</ball>\r
572             <mode>1</mode>\r
573           </AssociatedInfo>\r
574         </ioset>\r
575       </muxmode>\r
576       <muxmode>\r
577         <mode>2</mode>\r
578         <signal>uart10_txd</signal>\r
579         <color>0xffa500</color>\r
580       </muxmode>\r
581       <muxmode>\r
582         <mode>3</mode>\r
583         <signal>usb3_ulpi_dir</signal>\r
584         <color>0xd8bfd8</color>\r
585         <ioset>\r
586           <name>IOSET2</name>\r
587           <AssociatedInfo>\r
588             <signal>usb3_ulpi_d0</signal>\r
589             <ball>AC4</ball>\r
590             <mode>3</mode>\r
591           </AssociatedInfo>\r
592           <AssociatedInfo>\r
593             <signal>usb3_ulpi_d1</signal>\r
594             <ball>AC6</ball>\r
595             <mode>3</mode>\r
596           </AssociatedInfo>\r
597           <AssociatedInfo>\r
598             <signal>usb3_ulpi_d2</signal>\r
599             <ball>W6</ball>\r
600             <mode>3</mode>\r
601           </AssociatedInfo>\r
602           <AssociatedInfo>\r
603             <signal>usb3_ulpi_d3</signal>\r
604             <ball>Y6</ball>\r
605             <mode>3</mode>\r
606           </AssociatedInfo>\r
607           <AssociatedInfo>\r
608             <signal>usb3_ulpi_d4</signal>\r
609             <ball>AC7</ball>\r
610             <mode>3</mode>\r
611           </AssociatedInfo>\r
612           <AssociatedInfo>\r
613             <signal>usb3_ulpi_d5</signal>\r
614             <ball>AC3</ball>\r
615             <mode>3</mode>\r
616           </AssociatedInfo>\r
617           <AssociatedInfo>\r
618             <signal>usb3_ulpi_d6</signal>\r
619             <ball>AB4</ball>\r
620             <mode>3</mode>\r
621           </AssociatedInfo>\r
622           <AssociatedInfo>\r
623             <signal>usb3_ulpi_d7</signal>\r
624             <ball>AC5</ball>\r
625             <mode>3</mode>\r
626           </AssociatedInfo>\r
627           <AssociatedInfo>\r
628             <signal>usb3_ulpi_nxt</signal>\r
629             <ball>AA6</ball>\r
630             <mode>3</mode>\r
631           </AssociatedInfo>\r
632           <AssociatedInfo>\r
633             <signal>usb3_ulpi_stp</signal>\r
634             <ball>AB7</ball>\r
635             <mode>3</mode>\r
636           </AssociatedInfo>\r
637           <AssociatedInfo>\r
638             <signal>usb3_ulpi_clk</signal>\r
639             <ball>AA5</ball>\r
640             <mode>3</mode>\r
641           </AssociatedInfo>\r
642         </ioset>\r
643       </muxmode>\r
644       <muxmode>\r
645         <mode>4</mode>\r
646         <signal>vin2b_d0</signal>\r
647         <color>0xbc8f8f</color>\r
648         <manualmode>\r
649           <cfgreg>\r
650             <name>CFG_MMC3_DAT5_IN</name>\r
651             <mode>\r
652               <adelay>-1</adelay>\r
653               <gdelay>-1</gdelay>\r
654               <name>NA</name>\r
655             </mode>\r
656             <mode>\r
657               <adelay>2163</adelay>\r
658               <gdelay>15</gdelay>\r
659               <name>VIP1_2B_MANUAL1</name>\r
660             </mode>\r
661             <mode>\r
662               <adelay>2361</adelay>\r
663               <gdelay>0</gdelay>\r
664               <name>VIP1_2B_MANUAL2</name>\r
665             </mode>\r
666           </cfgreg>\r
667         </manualmode>\r
668         <ioset>\r
669           <name>IOSET3</name>\r
670           <AssociatedInfo>\r
671             <signal>vin2b_clk1</signal>\r
672             <ball>AA5</ball>\r
673             <mode>4</mode>\r
674           </AssociatedInfo>\r
675           <AssociatedInfo>\r
676             <signal>vin2b_de1</signal>\r
677             <ball>AB7</ball>\r
678             <mode>4</mode>\r
679           </AssociatedInfo>\r
680           <AssociatedInfo>\r
681             <signal>vin2b_d1</signal>\r
682             <ball>AA6</ball>\r
683             <mode>4</mode>\r
684           </AssociatedInfo>\r
685           <AssociatedInfo>\r
686             <signal>vin2b_d2</signal>\r
687             <ball>AC4</ball>\r
688             <mode>4</mode>\r
689           </AssociatedInfo>\r
690           <AssociatedInfo>\r
691             <signal>vin2b_d3</signal>\r
692             <ball>AC6</ball>\r
693             <mode>4</mode>\r
694           </AssociatedInfo>\r
695           <AssociatedInfo>\r
696             <signal>vin2b_d4</signal>\r
697             <ball>W6</ball>\r
698             <mode>4</mode>\r
699           </AssociatedInfo>\r
700           <AssociatedInfo>\r
701             <signal>vin2b_d5</signal>\r
702             <ball>Y6</ball>\r
703             <mode>4</mode>\r
704           </AssociatedInfo>\r
705           <AssociatedInfo>\r
706             <signal>vin2b_d6</signal>\r
707             <ball>AC7</ball>\r
708             <mode>4</mode>\r
709           </AssociatedInfo>\r
710           <AssociatedInfo>\r
711             <signal>vin2b_d7</signal>\r
712             <ball>AC3</ball>\r
713             <mode>4</mode>\r
714           </AssociatedInfo>\r
715           <AssociatedInfo>\r
716             <signal>vin2b_hsync1</signal>\r
717             <ball>AC5</ball>\r
718             <mode>4</mode>\r
719           </AssociatedInfo>\r
720           <AssociatedInfo>\r
721             <signal>vin2b_vsync1</signal>\r
722             <ball>AB4</ball>\r
723             <mode>4</mode>\r
724           </AssociatedInfo>\r
725         </ioset>\r
726       </muxmode>\r
727       <muxmode>\r
728         <mode>10</mode>\r
729         <signal>ehrpwm3B</signal>\r
730         <color>0x4169e1</color>\r
731       </muxmode>\r
732       <muxmode>\r
733         <mode>14</mode>\r
734         <signal>gpio1_23</signal>\r
735         <color>0x8fbc8f</color>\r
736       </muxmode>\r
737       <muxmode>\r
738         <mode>15</mode>\r
739         <signal>Driveroff</signal>\r
740         <color>0xf0fff0</color>\r
741       </muxmode>\r
742       <confregisters>\r
743         <regbit>\r
744           <register>CTRL_CORE_PAD_MMC3_DAT5</register>\r
745         </regbit>\r
746       </confregisters>\r
747     </pad>\r
748   </type>\r
749 </clockNode>\r
750 <clockNode>\r
751   <name>uart1_rxd</name>\r
752   <type>\r
753     <pad>\r
754       <ballname>F22</ballname>\r
755       <dir>IO</dir>\r
756       <numberOfMuxmodes>16</numberOfMuxmodes>\r
757       <muxmode>\r
758         <mode>0</mode>\r
759         <signal>uart1_rxd</signal>\r
760         <color>0xffa500</color>\r
761       </muxmode>\r
762       <muxmode>\r
763         <mode>3</mode>\r
764         <signal>mmc4_sdcd</signal>\r
765         <color>0xff6347</color>\r
766       </muxmode>\r
767       <muxmode>\r
768         <mode>14</mode>\r
769         <signal>gpio7_22</signal>\r
770         <color>0x8fbc8f</color>\r
771       </muxmode>\r
772       <muxmode>\r
773         <mode>15</mode>\r
774         <signal>Driveroff</signal>\r
775         <color>0xf0fff0</color>\r
776       </muxmode>\r
777       <confregisters>\r
778         <regbit>\r
779           <register>CTRL_CORE_PAD_UART1_RXD</register>\r
780         </regbit>\r
781       </confregisters>\r
782     </pad>\r
783   </type>\r
784 </clockNode>\r
785 <clockNode>\r
786   <name>uart1_ctsn</name>\r
787   <type>\r
788     <pad>\r
789       <ballname>F21</ballname>\r
790       <dir>IO</dir>\r
791       <numberOfMuxmodes>16</numberOfMuxmodes>\r
792       <muxmode>\r
793         <mode>0</mode>\r
794         <signal>uart1_ctsn</signal>\r
795         <color>0xffa500</color>\r
796       </muxmode>\r
797       <muxmode>\r
798         <mode>2</mode>\r
799         <signal>uart9_rxd</signal>\r
800         <color>0xffa500</color>\r
801       </muxmode>\r
802       <muxmode>\r
803         <mode>3</mode>\r
804         <signal>mmc4_clk</signal>\r
805         <color>0xff6347</color>\r
806         <manualmode>\r
807           <cfgreg>\r
808             <name>CFG_UART1_CTSN_IN</name>\r
809             <mode>\r
810               <adelay>-1</adelay>\r
811               <gdelay>-1</gdelay>\r
812               <name>NA</name>\r
813             </mode>\r
814             <mode>\r
815               <adelay>0</adelay>\r
816               <gdelay>0</gdelay>\r
817               <name>MMC4_MANUAL1</name>\r
818             </mode>\r
819             <mode>\r
820               <adelay>0</adelay>\r
821               <gdelay>0</gdelay>\r
822               <name>MMC4_DS_MANUAL1</name>\r
823             </mode>\r
824           </cfgreg>\r
825         </manualmode>\r
826         <manualmode>\r
827           <cfgreg>\r
828             <name>CFG_UART1_CTSN_OUT</name>\r
829             <mode>\r
830               <adelay>-1</adelay>\r
831               <gdelay>-1</gdelay>\r
832               <name>NA</name>\r
833             </mode>\r
834             <mode>\r
835               <adelay>1147</adelay>\r
836               <gdelay>0</gdelay>\r
837               <name>MMC4_MANUAL1</name>\r
838             </mode>\r
839             <mode>\r
840               <adelay>0</adelay>\r
841               <gdelay>0</gdelay>\r
842               <name>MMC4_DS_MANUAL1</name>\r
843             </mode>\r
844           </cfgreg>\r
845         </manualmode>\r
846       </muxmode>\r
847       <muxmode>\r
848         <mode>14</mode>\r
849         <signal>gpio7_24</signal>\r
850         <color>0x8fbc8f</color>\r
851       </muxmode>\r
852       <muxmode>\r
853         <mode>15</mode>\r
854         <signal>Driveroff</signal>\r
855         <color>0xf0fff0</color>\r
856       </muxmode>\r
857       <confregisters>\r
858         <regbit>\r
859           <register>CTRL_CORE_PAD_UART1_CTSN</register>\r
860         </regbit>\r
861       </confregisters>\r
862     </pad>\r
863   </type>\r
864 </clockNode>\r
865 <clockNode>\r
866   <name>uart2_ctsn</name>\r
867   <type>\r
868     <pad>\r
869       <ballname>F20</ballname>\r
870       <dir>IO</dir>\r
871       <numberOfMuxmodes>16</numberOfMuxmodes>\r
872       <muxmode>\r
873         <mode>0</mode>\r
874         <signal>uart2_ctsn</signal>\r
875         <color>0xffa500</color>\r
876       </muxmode>\r
877       <muxmode>\r
878         <mode>2</mode>\r
879         <signal>uart3_rxd</signal>\r
880         <color>0xffa500</color>\r
881       </muxmode>\r
882       <muxmode>\r
883         <mode>3</mode>\r
884         <signal>mmc4_dat2</signal>\r
885         <color>0xff6347</color>\r
886         <manualmode>\r
887           <cfgreg>\r
888             <name>CFG_UART2_CTSN_IN</name>\r
889             <mode>\r
890               <adelay>-1</adelay>\r
891               <gdelay>-1</gdelay>\r
892               <name>NA</name>\r
893             </mode>\r
894             <mode>\r
895               <adelay>2165</adelay>\r
896               <gdelay>0</gdelay>\r
897               <name>MMC4_MANUAL1</name>\r
898             </mode>\r
899             <mode>\r
900               <adelay>785</adelay>\r
901               <gdelay>0</gdelay>\r
902               <name>MMC4_DS_MANUAL1</name>\r
903             </mode>\r
904           </cfgreg>\r
905         </manualmode>\r
906         <manualmode>\r
907           <cfgreg>\r
908             <name>CFG_UART2_CTSN_OEN</name>\r
909             <mode>\r
910               <adelay>-1</adelay>\r
911               <gdelay>-1</gdelay>\r
912               <name>NA</name>\r
913             </mode>\r
914             <mode>\r
915               <adelay>0</adelay>\r
916               <gdelay>0</gdelay>\r
917               <name>MMC4_MANUAL1</name>\r
918             </mode>\r
919             <mode>\r
920               <adelay>0</adelay>\r
921               <gdelay>0</gdelay>\r
922               <name>MMC4_DS_MANUAL1</name>\r
923             </mode>\r
924           </cfgreg>\r
925         </manualmode>\r
926         <manualmode>\r
927           <cfgreg>\r
928             <name>CFG_UART2_CTSN_OUT</name>\r
929             <mode>\r
930               <adelay>-1</adelay>\r
931               <gdelay>-1</gdelay>\r
932               <name>NA</name>\r
933             </mode>\r
934             <mode>\r
935               <adelay>0</adelay>\r
936               <gdelay>0</gdelay>\r
937               <name>MMC4_MANUAL1</name>\r
938             </mode>\r
939             <mode>\r
940               <adelay>0</adelay>\r
941               <gdelay>0</gdelay>\r
942               <name>MMC4_DS_MANUAL1</name>\r
943             </mode>\r
944           </cfgreg>\r
945         </manualmode>\r
946       </muxmode>\r
947       <muxmode>\r
948         <mode>4</mode>\r
949         <signal>uart10_rxd</signal>\r
950         <color>0xffa500</color>\r
951       </muxmode>\r
952       <muxmode>\r
953         <mode>5</mode>\r
954         <signal>uart1_dtrn</signal>\r
955         <color>0xffa500</color>\r
956       </muxmode>\r
957       <muxmode>\r
958         <mode>14</mode>\r
959         <signal>gpio1_16</signal>\r
960         <color>0x8fbc8f</color>\r
961       </muxmode>\r
962       <muxmode>\r
963         <mode>15</mode>\r
964         <signal>Driveroff</signal>\r
965         <color>0xf0fff0</color>\r
966       </muxmode>\r
967       <confregisters>\r
968         <regbit>\r
969           <register>CTRL_CORE_PAD_UART2_CTSN</register>\r
970         </regbit>\r
971       </confregisters>\r
972     </pad>\r
973   </type>\r
974 </clockNode>\r
975 <clockNode>\r
976   <name>emu1</name>\r
977   <type>\r
978     <pad>\r
979       <ballname>C23</ballname>\r
980       <dir>IO</dir>\r
981       <numberOfMuxmodes>16</numberOfMuxmodes>\r
982       <muxmode>\r
983         <mode>0</mode>\r
984         <signal>emu1</signal>\r
985         <color>0x778899</color>\r
986       </muxmode>\r
987       <muxmode>\r
988         <mode>14</mode>\r
989         <signal>gpio8_31</signal>\r
990         <color>0x8fbc8f</color>\r
991       </muxmode>\r
992       <confregisters>\r
993         <regbit>\r
994           <register>CTRL_CORE_PAD_EMU1</register>\r
995         </regbit>\r
996       </confregisters>\r
997     </pad>\r
998   </type>\r
999 </clockNode>\r
1000 <clockNode>\r
1001   <name>rgmii0_rxd3</name>\r
1002   <type>\r
1003     <pad>\r
1004       <ballname>W2</ballname>\r
1005       <dir>IO</dir>\r
1006       <numberOfMuxmodes>16</numberOfMuxmodes>\r
1007       <muxmode>\r
1008         <mode>0</mode>\r
1009         <signal>rgmii0_rxd3</signal>\r
1010         <color>0x2e8b57</color>\r
1011         <manualmode>\r
1012           <cfgreg>\r
1013             <name>CFG_RGMII0_RXD3_IN</name>\r
1014             <mode>\r
1015               <adelay>-1</adelay>\r
1016               <gdelay>-1</gdelay>\r
1017               <name>NA</name>\r
1018             </mode>\r
1019             <mode>\r
1020               <adelay>28</adelay>\r
1021               <gdelay>1690</gdelay>\r
1022               <name>GMAC_RGMII0_MANUAL1</name>\r
1023             </mode>\r
1024           </cfgreg>\r
1025         </manualmode>\r
1026         <ioset>\r
1027           <name>IOSET4</name>\r
1028           <AssociatedInfo>\r
1029             <signal>rgmii0_txd3</signal>\r
1030             <ball>T4</ball>\r
1031             <mode>0</mode>\r
1032           </AssociatedInfo>\r
1033           <AssociatedInfo>\r
1034             <signal>rgmii0_txd2</signal>\r
1035             <ball>T3</ball>\r
1036             <mode>0</mode>\r
1037           </AssociatedInfo>\r
1038           <AssociatedInfo>\r
1039             <signal>rgmii0_txd1</signal>\r
1040             <ball>U6</ball>\r
1041             <mode>0</mode>\r
1042           </AssociatedInfo>\r
1043           <AssociatedInfo>\r
1044             <signal>rgmii0_txd0</signal>\r
1045             <ball>T5</ball>\r
1046             <mode>0</mode>\r
1047           </AssociatedInfo>\r
1048           <AssociatedInfo>\r
1049             <signal>rgmii0_rxd2</signal>\r
1050             <ball>V3</ball>\r
1051             <mode>0</mode>\r
1052           </AssociatedInfo>\r
1053           <AssociatedInfo>\r
1054             <signal>rgmii0_rxd1</signal>\r
1055             <ball>Y2</ball>\r
1056             <mode>0</mode>\r
1057           </AssociatedInfo>\r
1058           <AssociatedInfo>\r
1059             <signal>rgmii0_rxd0</signal>\r
1060             <ball>W1</ball>\r
1061             <mode>0</mode>\r
1062           </AssociatedInfo>\r
1063           <AssociatedInfo>\r
1064             <signal>rgmii0_txc</signal>\r
1065             <ball>T6</ball>\r
1066             <mode>0</mode>\r
1067           </AssociatedInfo>\r
1068           <AssociatedInfo>\r
1069             <signal>rgmii0_rxctl</signal>\r
1070             <ball>V4</ball>\r
1071             <mode>0</mode>\r
1072           </AssociatedInfo>\r
1073           <AssociatedInfo>\r
1074             <signal>rgmii0_rxc</signal>\r
1075             <ball>U4</ball>\r
1076             <mode>0</mode>\r
1077           </AssociatedInfo>\r
1078           <AssociatedInfo>\r
1079             <signal>rgmii0_txctl</signal>\r
1080             <ball>U5</ball>\r
1081             <mode>0</mode>\r
1082           </AssociatedInfo>\r
1083         </ioset>\r
1084       </muxmode>\r
1085       <muxmode>\r
1086         <mode>2</mode>\r
1087         <signal>rmii1_txd0</signal>\r
1088         <color>0x2e8b57</color>\r
1089         <ioset>\r
1090           <name>IOSET1</name>\r
1091           <AssociatedInfo>\r
1092             <signal>RMII_MHZ_50_CLK</signal>\r
1093             <ball>U2</ball>\r
1094             <mode>0</mode>\r
1095           </AssociatedInfo>\r
1096           <AssociatedInfo>\r
1097             <signal>rmii1_txd1</signal>\r
1098             <ball>V4</ball>\r
1099             <mode>2</mode>\r
1100           </AssociatedInfo>\r
1101           <AssociatedInfo>\r
1102             <signal>rmii1_rxd1</signal>\r
1103             <ball>T6</ball>\r
1104             <mode>2</mode>\r
1105           </AssociatedInfo>\r
1106           <AssociatedInfo>\r
1107             <signal>rmii1_rxd0</signal>\r
1108             <ball>U5</ball>\r
1109             <mode>2</mode>\r
1110           </AssociatedInfo>\r
1111           <AssociatedInfo>\r
1112             <signal>rmii1_rxer</signal>\r
1113             <ball>Y1</ball>\r
1114             <mode>2</mode>\r
1115           </AssociatedInfo>\r
1116           <AssociatedInfo>\r
1117             <signal>rmii1_txen</signal>\r
1118             <ball>U4</ball>\r
1119             <mode>2</mode>\r
1120           </AssociatedInfo>\r
1121           <AssociatedInfo>\r
1122             <signal>rmii1_crs</signal>\r
1123             <ball>V2</ball>\r
1124             <mode>2</mode>\r
1125           </AssociatedInfo>\r
1126         </ioset>\r
1127       </muxmode>\r
1128       <muxmode>\r
1129         <mode>3</mode>\r
1130         <signal>mii0_txd2</signal>\r
1131         <color>0x2e8b57</color>\r
1132         <ioset>\r
1133           <name>IOSET6</name>\r
1134           <AssociatedInfo>\r
1135             <signal>mii0_txd3</signal>\r
1136             <ball>V4</ball>\r
1137             <mode>3</mode>\r
1138           </AssociatedInfo>\r
1139           <AssociatedInfo>\r
1140             <signal>mii0_txd1</signal>\r
1141             <ball>Y2</ball>\r
1142             <mode>3</mode>\r
1143           </AssociatedInfo>\r
1144           <AssociatedInfo>\r
1145             <signal>mii0_txd0</signal>\r
1146             <ball>W1</ball>\r
1147             <mode>3</mode>\r
1148           </AssociatedInfo>\r
1149           <AssociatedInfo>\r
1150             <signal>mii0_rxd3</signal>\r
1151             <ball>T6</ball>\r
1152             <mode>3</mode>\r
1153           </AssociatedInfo>\r
1154           <AssociatedInfo>\r
1155             <signal>mii0_rxd2</signal>\r
1156             <ball>U5</ball>\r
1157             <mode>3</mode>\r
1158           </AssociatedInfo>\r
1159           <AssociatedInfo>\r
1160             <signal>mii0_rxd1</signal>\r
1161             <ball>U6</ball>\r
1162             <mode>3</mode>\r
1163           </AssociatedInfo>\r
1164           <AssociatedInfo>\r
1165             <signal>mii0_rxd0</signal>\r
1166             <ball>T5</ball>\r
1167             <mode>3</mode>\r
1168           </AssociatedInfo>\r
1169           <AssociatedInfo>\r
1170             <signal>mii0_txclk</signal>\r
1171             <ball>U4</ball>\r
1172             <mode>3</mode>\r
1173           </AssociatedInfo>\r
1174           <AssociatedInfo>\r
1175             <signal>mii0_txer</signal>\r
1176             <ball>U3</ball>\r
1177             <mode>3</mode>\r
1178           </AssociatedInfo>\r
1179           <AssociatedInfo>\r
1180             <signal>mii0_rxer</signal>\r
1181             <ball>T3</ball>\r
1182             <mode>3</mode>\r
1183           </AssociatedInfo>\r
1184           <AssociatedInfo>\r
1185             <signal>mii0_rxdv</signal>\r
1186             <ball>V2</ball>\r
1187             <mode>3</mode>\r
1188           </AssociatedInfo>\r
1189           <AssociatedInfo>\r
1190             <signal>mii0_crs</signal>\r
1191             <ball>T4</ball>\r
1192             <mode>3</mode>\r
1193           </AssociatedInfo>\r
1194           <AssociatedInfo>\r
1195             <signal>mii0_col</signal>\r
1196             <ball>V1</ball>\r
1197             <mode>3</mode>\r
1198           </AssociatedInfo>\r
1199           <AssociatedInfo>\r
1200             <signal>mii0_rxclk</signal>\r
1201             <ball>Y1</ball>\r
1202             <mode>3</mode>\r
1203           </AssociatedInfo>\r
1204           <AssociatedInfo>\r
1205             <signal>mii0_txen</signal>\r
1206             <ball>V3</ball>\r
1207             <mode>3</mode>\r
1208           </AssociatedInfo>\r
1209         </ioset>\r
1210       </muxmode>\r
1211       <muxmode>\r
1212         <mode>4</mode>\r
1213         <signal>vin2a_d7</signal>\r
1214         <color>0xbc8f8f</color>\r
1215         <manualmode>\r
1216           <cfgreg>\r
1217             <name>CFG_RGMII0_RXD3_IN</name>\r
1218             <mode>\r
1219               <adelay>-1</adelay>\r
1220               <gdelay>-1</gdelay>\r
1221               <name>NA</name>\r
1222             </mode>\r
1223             <mode>\r
1224               <adelay>1972</adelay>\r
1225               <gdelay>637</gdelay>\r
1226               <name>VIP1_MANUAL1</name>\r
1227             </mode>\r
1228             <mode>\r
1229               <adelay>2331</adelay>\r
1230               <gdelay>362</gdelay>\r
1231               <name>VIP1_MANUAL2</name>\r
1232             </mode>\r
1233           </cfgreg>\r
1234         </manualmode>\r
1235         <ioset>\r
1236           <name>IOSET3</name>\r
1237           <AssociatedInfo>\r
1238             <signal>vin2a_d0</signal>\r
1239             <ball>U3</ball>\r
1240             <mode>4</mode>\r
1241           </AssociatedInfo>\r
1242           <AssociatedInfo>\r
1243             <signal>vin2a_d1</signal>\r
1244             <ball>V2</ball>\r
1245             <mode>4</mode>\r
1246           </AssociatedInfo>\r
1247           <AssociatedInfo>\r
1248             <signal>vin2a_d2</signal>\r
1249             <ball>Y1</ball>\r
1250             <mode>4</mode>\r
1251           </AssociatedInfo>\r
1252           <AssociatedInfo>\r
1253             <signal>vin2a_d3</signal>\r
1254             <ball>T6</ball>\r
1255             <mode>4</mode>\r
1256           </AssociatedInfo>\r
1257           <AssociatedInfo>\r
1258             <signal>vin2a_d4</signal>\r
1259             <ball>U5</ball>\r
1260             <mode>4</mode>\r
1261           </AssociatedInfo>\r
1262           <AssociatedInfo>\r
1263             <signal>vin2a_d5</signal>\r
1264             <ball>U4</ball>\r
1265             <mode>4</mode>\r
1266           </AssociatedInfo>\r
1267           <AssociatedInfo>\r
1268             <signal>vin2a_d6</signal>\r
1269             <ball>V4</ball>\r
1270             <mode>4</mode>\r
1271           </AssociatedInfo>\r
1272           <AssociatedInfo>\r
1273             <signal>vin2a_d8</signal>\r
1274             <ball>V3</ball>\r
1275             <mode>4</mode>\r
1276           </AssociatedInfo>\r
1277           <AssociatedInfo>\r
1278             <signal>vin2a_d9</signal>\r
1279             <ball>Y2</ball>\r
1280             <mode>4</mode>\r
1281           </AssociatedInfo>\r
1282           <AssociatedInfo>\r
1283             <signal>vin2a_d10</signal>\r
1284             <ball>T5</ball>\r
1285             <mode>4</mode>\r
1286           </AssociatedInfo>\r
1287           <AssociatedInfo>\r
1288             <signal>vin2a_d11</signal>\r
1289             <ball>U2</ball>\r
1290             <mode>4</mode>\r
1291           </AssociatedInfo>\r
1292           <AssociatedInfo>\r
1293             <signal>vin2a_hsync0</signal>\r
1294             <ball>T3</ball>\r
1295             <mode>4</mode>\r
1296           </AssociatedInfo>\r
1297           <AssociatedInfo>\r
1298             <signal>vin2a_vsync0</signal>\r
1299             <ball>U6</ball>\r
1300             <mode>4</mode>\r
1301           </AssociatedInfo>\r
1302           <AssociatedInfo>\r
1303             <signal>vin2a_de0</signal>\r
1304             <ball>T4</ball>\r
1305             <mode>4</mode>\r
1306           </AssociatedInfo>\r
1307           <AssociatedInfo>\r
1308             <signal>vin2a_fld0</signal>\r
1309             <ball>W1</ball>\r
1310             <mode>4</mode>\r
1311           </AssociatedInfo>\r
1312           <AssociatedInfo>\r
1313             <signal>vin2a_clk0</signal>\r
1314             <ball>V1</ball>\r
1315             <mode>4</mode>\r
1316           </AssociatedInfo>\r
1317         </ioset>\r
1318       </muxmode>\r
1319       <muxmode>\r
1320         <mode>5</mode>\r
1321         <signal>vin4b_d7</signal>\r
1322         <color>0xbc8f8f</color>\r
1323         <manualmode>\r
1324           <cfgreg>\r
1325             <name>CFG_RGMII0_RXD3_IN</name>\r
1326             <mode>\r
1327               <adelay>-1</adelay>\r
1328               <gdelay>-1</gdelay>\r
1329               <name>NA</name>\r
1330             </mode>\r
1331             <mode>\r
1332               <adelay>1925</adelay>\r
1333               <gdelay>835</gdelay>\r
1334               <name>VIP2_4B_MANUAL1</name>\r
1335             </mode>\r
1336             <mode>\r
1337               <adelay>2252</adelay>\r
1338               <gdelay>613</gdelay>\r
1339               <name>VIP2_4B_MANUAL2</name>\r
1340             </mode>\r
1341           </cfgreg>\r
1342         </manualmode>\r
1343         <ioset>\r
1344           <name>IOSET2</name>\r
1345           <AssociatedInfo>\r
1346             <signal>vin4b_clk1</signal>\r
1347             <ball>V1</ball>\r
1348             <mode>5</mode>\r
1349           </AssociatedInfo>\r
1350           <AssociatedInfo>\r
1351             <signal>vin4b_de1</signal>\r
1352             <ball>T4</ball>\r
1353             <mode>5</mode>\r
1354           </AssociatedInfo>\r
1355           <AssociatedInfo>\r
1356             <signal>vin4b_fld1</signal>\r
1357             <ball>W1</ball>\r
1358             <mode>5</mode>\r
1359           </AssociatedInfo>\r
1360           <AssociatedInfo>\r
1361             <signal>vin4b_d0</signal>\r
1362             <ball>U3</ball>\r
1363             <mode>5</mode>\r
1364           </AssociatedInfo>\r
1365           <AssociatedInfo>\r
1366             <signal>vin4b_d1</signal>\r
1367             <ball>V2</ball>\r
1368             <mode>5</mode>\r
1369           </AssociatedInfo>\r
1370           <AssociatedInfo>\r
1371             <signal>vin4b_d2</signal>\r
1372             <ball>Y1</ball>\r
1373             <mode>5</mode>\r
1374           </AssociatedInfo>\r
1375           <AssociatedInfo>\r
1376             <signal>vin4b_d3</signal>\r
1377             <ball>T6</ball>\r
1378             <mode>5</mode>\r
1379           </AssociatedInfo>\r
1380           <AssociatedInfo>\r
1381             <signal>vin4b_d4</signal>\r
1382             <ball>U5</ball>\r
1383             <mode>5</mode>\r
1384           </AssociatedInfo>\r
1385           <AssociatedInfo>\r
1386             <signal>vin4b_d5</signal>\r
1387             <ball>U4</ball>\r
1388             <mode>5</mode>\r
1389           </AssociatedInfo>\r
1390           <AssociatedInfo>\r
1391             <signal>vin4b_d6</signal>\r
1392             <ball>V4</ball>\r
1393             <mode>5</mode>\r
1394           </AssociatedInfo>\r
1395           <AssociatedInfo>\r
1396             <signal>vin4b_hsync1</signal>\r
1397             <ball>T3</ball>\r
1398             <mode>5</mode>\r
1399           </AssociatedInfo>\r
1400           <AssociatedInfo>\r
1401             <signal>vin4b_vsync1</signal>\r
1402             <ball>U6</ball>\r
1403             <mode>5</mode>\r
1404           </AssociatedInfo>\r
1405         </ioset>\r
1406       </muxmode>\r
1407       <muxmode>\r
1408         <mode>6</mode>\r
1409         <signal>usb4_ulpi_d4</signal>\r
1410         <color>0xd8bfd8</color>\r
1411         <ioset>\r
1412           <name>IOSET2</name>\r
1413           <AssociatedInfo>\r
1414             <signal>usb4_ulpi_d0</signal>\r
1415             <ball>U6</ball>\r
1416             <mode>6</mode>\r
1417           </AssociatedInfo>\r
1418           <AssociatedInfo>\r
1419             <signal>usb4_ulpi_d1</signal>\r
1420             <ball>T5</ball>\r
1421             <mode>6</mode>\r
1422           </AssociatedInfo>\r
1423           <AssociatedInfo>\r
1424             <signal>usb4_ulpi_d2</signal>\r
1425             <ball>U4</ball>\r
1426             <mode>6</mode>\r
1427           </AssociatedInfo>\r
1428           <AssociatedInfo>\r
1429             <signal>usb4_ulpi_d3</signal>\r
1430             <ball>V4</ball>\r
1431             <mode>6</mode>\r
1432           </AssociatedInfo>\r
1433           <AssociatedInfo>\r
1434             <signal>usb4_ulpi_d5</signal>\r
1435             <ball>V3</ball>\r
1436             <mode>6</mode>\r
1437           </AssociatedInfo>\r
1438           <AssociatedInfo>\r
1439             <signal>usb4_ulpi_d6</signal>\r
1440             <ball>Y2</ball>\r
1441             <mode>6</mode>\r
1442           </AssociatedInfo>\r
1443           <AssociatedInfo>\r
1444             <signal>usb4_ulpi_d7</signal>\r
1445             <ball>W1</ball>\r
1446             <mode>6</mode>\r
1447           </AssociatedInfo>\r
1448           <AssociatedInfo>\r
1449             <signal>usb4_ulpi_stp</signal>\r
1450             <ball>U5</ball>\r
1451             <mode>6</mode>\r
1452           </AssociatedInfo>\r
1453           <AssociatedInfo>\r
1454             <signal>usb4_ulpi_clk</signal>\r
1455             <ball>T6</ball>\r
1456             <mode>6</mode>\r
1457           </AssociatedInfo>\r
1458           <AssociatedInfo>\r
1459             <signal>usb4_ulpi_dir</signal>\r
1460             <ball>T4</ball>\r
1461             <mode>6</mode>\r
1462           </AssociatedInfo>\r
1463           <AssociatedInfo>\r
1464             <signal>usb4_ulpi_nxt</signal>\r
1465             <ball>T3</ball>\r
1466             <mode>6</mode>\r
1467           </AssociatedInfo>\r
1468         </ioset>\r
1469       </muxmode>\r
1470       <muxmode>\r
1471         <mode>14</mode>\r
1472         <signal>gpio5_28</signal>\r
1473         <color>0x8fbc8f</color>\r
1474       </muxmode>\r
1475       <muxmode>\r
1476         <mode>15</mode>\r
1477         <signal>Driveroff</signal>\r
1478         <color>0xf0fff0</color>\r
1479       </muxmode>\r
1480       <confregisters>\r
1481         <regbit>\r
1482           <register>CTRL_CORE_PAD_RGMII0_RXD3</register>\r
1483         </regbit>\r
1484       </confregisters>\r
1485     </pad>\r
1486   </type>\r
1487 </clockNode>\r
1488 <clockNode>\r
1489   <name>gpmc_a20</name>\r
1490   <type>\r
1491     <pad>\r
1492       <ballname>G6</ballname>\r
1493       <dir>IO</dir>\r
1494       <numberOfMuxmodes>16</numberOfMuxmodes>\r
1495       <muxmode>\r
1496         <mode>0</mode>\r
1497         <signal>gpmc_a20</signal>\r
1498         <color>0x98fb98</color>\r
1499         <virtualmode>\r
1500           <mode>\r
1501             <value>-1</value>\r
1502             <name>NA</name>\r
1503           </mode>\r
1504           <mode>\r
1505             <value>11</value>\r
1506             <name>GPMC_VIRTUAL1</name>\r
1507           </mode>\r
1508         </virtualmode>\r
1509       </muxmode>\r
1510       <muxmode>\r
1511         <mode>1</mode>\r
1512         <signal>mmc2_dat5</signal>\r
1513         <color>0xff6347</color>\r
1514         <manualmode>\r
1515           <cfgreg>\r
1516             <name>CFG_GPMC_A20_IN</name>\r
1517             <mode>\r
1518               <adelay>-1</adelay>\r
1519               <gdelay>-1</gdelay>\r
1520               <name>NA</name>\r
1521             </mode>\r
1522             <mode>\r
1523               <adelay>62</adelay>\r
1524               <gdelay>0</gdelay>\r
1525               <name>MMC2_DDR_LB_MANUAL1</name>\r
1526             </mode>\r
1527             <mode>\r
1528               <adelay>1264</adelay>\r
1529               <gdelay>0</gdelay>\r
1530               <name>MMC2_STD_HS_LB_MANUAL1</name>\r
1531             </mode>\r
1532           </cfgreg>\r
1533         </manualmode>\r
1534         <manualmode>\r
1535           <cfgreg>\r
1536             <name>CFG_GPMC_A20_OEN</name>\r
1537             <mode>\r
1538               <adelay>-1</adelay>\r
1539               <gdelay>-1</gdelay>\r
1540               <name>NA</name>\r
1541             </mode>\r
1542             <mode>\r
1543               <adelay>0</adelay>\r
1544               <gdelay>0</gdelay>\r
1545               <name>MMC2_DDR_LB_MANUAL1</name>\r
1546             </mode>\r
1547             <mode>\r
1548               <adelay>0</adelay>\r
1549               <gdelay>0</gdelay>\r
1550               <name>MMC2_STD_HS_LB_MANUAL1</name>\r
1551             </mode>\r
1552             <mode>\r
1553               <adelay>410</adelay>\r
1554               <gdelay>0</gdelay>\r
1555               <name>MMC2_HS200_MANUAL1</name>\r
1556             </mode>\r
1557           </cfgreg>\r
1558         </manualmode>\r
1559         <manualmode>\r
1560           <cfgreg>\r
1561             <name>CFG_GPMC_A20_OUT</name>\r
1562             <mode>\r
1563               <adelay>-1</adelay>\r
1564               <gdelay>-1</gdelay>\r
1565               <name>NA</name>\r
1566             </mode>\r
1567             <mode>\r
1568               <adelay>47</adelay>\r
1569               <gdelay>0</gdelay>\r
1570               <name>MMC2_DDR_LB_MANUAL1</name>\r
1571             </mode>\r
1572             <mode>\r
1573               <adelay>0</adelay>\r
1574               <gdelay>0</gdelay>\r
1575               <name>MMC2_STD_HS_LB_MANUAL1</name>\r
1576             </mode>\r
1577             <mode>\r
1578               <adelay>85</adelay>\r
1579               <gdelay>0</gdelay>\r
1580               <name>MMC2_HS200_MANUAL1</name>\r
1581             </mode>\r
1582           </cfgreg>\r
1583         </manualmode>\r
1584       </muxmode>\r
1585       <muxmode>\r
1586         <mode>2</mode>\r
1587         <signal>gpmc_a14</signal>\r
1588         <color>0x98fb98</color>\r
1589         <virtualmode>\r
1590           <mode>\r
1591             <value>-1</value>\r
1592             <name>NA</name>\r
1593           </mode>\r
1594           <mode>\r
1595             <value>11</value>\r
1596             <name>GPMC_VIRTUAL1</name>\r
1597           </mode>\r
1598         </virtualmode>\r
1599       </muxmode>\r
1600       <muxmode>\r
1601         <mode>4</mode>\r
1602         <signal>vin4a_d13</signal>\r
1603         <color>0xbc8f8f</color>\r
1604         <manualmode>\r
1605           <cfgreg>\r
1606             <name>CFG_GPMC_A20_IN</name>\r
1607             <mode>\r
1608               <adelay>-1</adelay>\r
1609               <gdelay>-1</gdelay>\r
1610               <name>NA</name>\r
1611             </mode>\r
1612             <mode>\r
1613               <adelay>1670</adelay>\r
1614               <gdelay>0</gdelay>\r
1615               <name>VIP2_MANUAL1</name>\r
1616             </mode>\r
1617             <mode>\r
1618               <adelay>1508</adelay>\r
1619               <gdelay>0</gdelay>\r
1620               <name>VIP2_MANUAL2</name>\r
1621             </mode>\r
1622             <mode>\r
1623               <adelay>1561</adelay>\r
1624               <gdelay>0</gdelay>\r
1625               <name>VIP2_4A_MANUAL1</name>\r
1626             </mode>\r
1627             <mode>\r
1628               <adelay>1394</adelay>\r
1629               <gdelay>0</gdelay>\r
1630               <name>VIP2_4A_MANUAL2</name>\r
1631             </mode>\r
1632           </cfgreg>\r
1633         </manualmode>\r
1634         <ioset>\r
1635           <name>IOSET1</name>\r
1636           <AssociatedInfo>\r
1637             <signal>vin4a_d0</signal>\r
1638             <ball>P6</ball>\r
1639             <mode>4</mode>\r
1640           </AssociatedInfo>\r
1641           <AssociatedInfo>\r
1642             <signal>vin4a_d1</signal>\r
1643             <ball>J6</ball>\r
1644             <mode>4</mode>\r
1645           </AssociatedInfo>\r
1646           <AssociatedInfo>\r
1647             <signal>vin4a_d2</signal>\r
1648             <ball>R4</ball>\r
1649             <mode>4</mode>\r
1650           </AssociatedInfo>\r
1651           <AssociatedInfo>\r
1652             <signal>vin4a_d3</signal>\r
1653             <ball>R5</ball>\r
1654             <mode>4</mode>\r
1655           </AssociatedInfo>\r
1656           <AssociatedInfo>\r
1657             <signal>vin4a_d4</signal>\r
1658             <ball>M6</ball>\r
1659             <mode>4</mode>\r
1660           </AssociatedInfo>\r
1661           <AssociatedInfo>\r
1662             <signal>vin4a_d5</signal>\r
1663             <ball>K4</ball>\r
1664             <mode>4</mode>\r
1665           </AssociatedInfo>\r
1666           <AssociatedInfo>\r
1667             <signal>vin4a_d6</signal>\r
1668             <ball>P5</ball>\r
1669             <mode>4</mode>\r
1670           </AssociatedInfo>\r
1671           <AssociatedInfo>\r
1672             <signal>vin4a_d7</signal>\r
1673             <ball>N6</ball>\r
1674             <mode>4</mode>\r
1675           </AssociatedInfo>\r
1676           <AssociatedInfo>\r
1677             <signal>vin4a_d8</signal>\r
1678             <ball>T2</ball>\r
1679             <mode>4</mode>\r
1680           </AssociatedInfo>\r
1681           <AssociatedInfo>\r
1682             <signal>vin4a_d9</signal>\r
1683             <ball>U1</ball>\r
1684             <mode>4</mode>\r
1685           </AssociatedInfo>\r
1686           <AssociatedInfo>\r
1687             <signal>vin4a_d10</signal>\r
1688             <ball>P3</ball>\r
1689             <mode>4</mode>\r
1690           </AssociatedInfo>\r
1691           <AssociatedInfo>\r
1692             <signal>vin4a_d11</signal>\r
1693             <ball>R1</ball>\r
1694             <mode>4</mode>\r
1695           </AssociatedInfo>\r
1696           <AssociatedInfo>\r
1697             <signal>vin4a_d12</signal>\r
1698             <ball>H6</ball>\r
1699             <mode>4</mode>\r
1700           </AssociatedInfo>\r
1701           <AssociatedInfo>\r
1702             <signal>vin4a_d14</signal>\r
1703             <ball>J4</ball>\r
1704             <mode>4</mode>\r
1705           </AssociatedInfo>\r
1706           <AssociatedInfo>\r
1707             <signal>vin4a_d15</signal>\r
1708             <ball>F5</ball>\r
1709             <mode>4</mode>\r
1710           </AssociatedInfo>\r
1711           <AssociatedInfo>\r
1712             <signal>vin4a_hsync0</signal>\r
1713             <ball1>R2</ball1>\r
1714             <mode1>4</mode1>\r
1715             <ball2>L6</ball2>\r
1716             <mode2>4</mode2>\r
1717           </AssociatedInfo>\r
1718           <AssociatedInfo>\r
1719             <signal>vin4a_vsync0</signal>\r
1720             <ball1>R6</ball1>\r
1721             <mode1>4</mode1>\r
1722             <ball2>N1</ball2>\r
1723             <mode2>4</mode2>\r
1724           </AssociatedInfo>\r
1725           <AssociatedInfo>\r
1726             <signal>vin4a_de0</signal>\r
1727             <ball1>G4</ball1>\r
1728             <mode1>4</mode1>\r
1729             <ball2>L6</ball2>\r
1730             <mode2>5</mode2>\r
1731           </AssociatedInfo>\r
1732           <AssociatedInfo>\r
1733             <signal>vin4a_fld0</signal>\r
1734             <ball1>K5</ball1>\r
1735             <mode1>4</mode1>\r
1736             <ball2>G5</ball2>\r
1737             <mode2>4</mode2>\r
1738           </AssociatedInfo>\r
1739           <AssociatedInfo>\r
1740             <signal>vin4a_clk0</signal>\r
1741             <ball>P4</ball>\r
1742             <mode>4</mode>\r
1743           </AssociatedInfo>\r
1744         </ioset>\r
1745       </muxmode>\r
1746       <muxmode>\r
1747         <mode>6</mode>\r
1748         <signal>vin3b_d1</signal>\r
1749         <color>0xbc8f8f</color>\r
1750         <manualmode>\r
1751           <cfgreg>\r
1752             <name>CFG_GPMC_A20_IN</name>\r
1753             <mode>\r
1754               <adelay>-1</adelay>\r
1755               <gdelay>-1</gdelay>\r
1756               <name>NA</name>\r
1757             </mode>\r
1758             <mode>\r
1759               <adelay>1670</adelay>\r
1760               <gdelay>0</gdelay>\r
1761               <name>VIP2_MANUAL1</name>\r
1762             </mode>\r
1763             <mode>\r
1764               <adelay>1508</adelay>\r
1765               <gdelay>0</gdelay>\r
1766               <name>VIP2_MANUAL2</name>\r
1767             </mode>\r
1768             <mode>\r
1769               <adelay>1706</adelay>\r
1770               <gdelay>697</gdelay>\r
1771               <name>VIP2_3B_IOSET2_MANUAL1</name>\r
1772             </mode>\r
1773             <mode>\r
1774               <adelay>2037</adelay>\r
1775               <gdelay>373</gdelay>\r
1776               <name>VIP2_3B_IOSET2_MANUAL2</name>\r
1777             </mode>\r
1778           </cfgreg>\r
1779         </manualmode>\r
1780         <ioset>\r
1781           <name>IOSET1</name>\r
1782           <AssociatedInfo>\r
1783             <signal>vin3b_clk1</signal>\r
1784             <ball>L6</ball>\r
1785             <mode>6</mode>\r
1786           </AssociatedInfo>\r
1787           <AssociatedInfo>\r
1788             <signal>vin3b_de1</signal>\r
1789             <ball>N3</ball>\r
1790             <mode>6</mode>\r
1791           </AssociatedInfo>\r
1792           <AssociatedInfo>\r
1793             <signal>vin3b_fld1</signal>\r
1794             <ball>M4</ball>\r
1795             <mode>6</mode>\r
1796           </AssociatedInfo>\r
1797           <AssociatedInfo>\r
1798             <signal>vin3b_d0</signal>\r
1799             <ball>H6</ball>\r
1800             <mode>6</mode>\r
1801           </AssociatedInfo>\r
1802           <AssociatedInfo>\r
1803             <signal>vin3b_d2</signal>\r
1804             <ball>J4</ball>\r
1805             <mode>6</mode>\r
1806           </AssociatedInfo>\r
1807           <AssociatedInfo>\r
1808             <signal>vin3b_d3</signal>\r
1809             <ball>F5</ball>\r
1810             <mode>6</mode>\r
1811           </AssociatedInfo>\r
1812           <AssociatedInfo>\r
1813             <signal>vin3b_d4</signal>\r
1814             <ball>G5</ball>\r
1815             <mode>6</mode>\r
1816           </AssociatedInfo>\r
1817           <AssociatedInfo>\r
1818             <signal>vin3b_d5</signal>\r
1819             <ball>J3</ball>\r
1820             <mode>6</mode>\r
1821           </AssociatedInfo>\r
1822           <AssociatedInfo>\r
1823             <signal>vin3b_d6</signal>\r
1824             <ball>H4</ball>\r
1825             <mode>6</mode>\r
1826           </AssociatedInfo>\r
1827           <AssociatedInfo>\r
1828             <signal>vin3b_d7</signal>\r
1829             <ball>H3</ball>\r
1830             <mode>6</mode>\r
1831           </AssociatedInfo>\r
1832           <AssociatedInfo>\r
1833             <signal>vin3b_hsync1</signal>\r
1834             <ball>H5</ball>\r
1835             <mode>6</mode>\r
1836           </AssociatedInfo>\r
1837           <AssociatedInfo>\r
1838             <signal>vin3b_vsync1</signal>\r
1839             <ball>G4</ball>\r
1840             <mode>6</mode>\r
1841           </AssociatedInfo>\r
1842         </ioset>\r
1843         <ioset>\r
1844           <name>IOSET2</name>\r
1845           <AssociatedInfo>\r
1846             <signal>vin3b_clk1</signal>\r
1847             <ball>M4</ball>\r
1848             <mode>4</mode>\r
1849           </AssociatedInfo>\r
1850           <AssociatedInfo>\r
1851             <signal>vin3b_de1</signal>\r
1852             <ball>N3</ball>\r
1853             <mode>6</mode>\r
1854           </AssociatedInfo>\r
1855           <AssociatedInfo>\r
1856             <signal>vin3b_d0</signal>\r
1857             <ball>H6</ball>\r
1858             <mode>6</mode>\r
1859           </AssociatedInfo>\r
1860           <AssociatedInfo>\r
1861             <signal>vin3b_d2</signal>\r
1862             <ball>J4</ball>\r
1863             <mode>6</mode>\r
1864           </AssociatedInfo>\r
1865           <AssociatedInfo>\r
1866             <signal>vin3b_d3</signal>\r
1867             <ball>F5</ball>\r
1868             <mode>6</mode>\r
1869           </AssociatedInfo>\r
1870           <AssociatedInfo>\r
1871             <signal>vin3b_d4</signal>\r
1872             <ball>G5</ball>\r
1873             <mode>6</mode>\r
1874           </AssociatedInfo>\r
1875           <AssociatedInfo>\r
1876             <signal>vin3b_d5</signal>\r
1877             <ball>J3</ball>\r
1878             <mode>6</mode>\r
1879           </AssociatedInfo>\r
1880           <AssociatedInfo>\r
1881             <signal>vin3b_d6</signal>\r
1882             <ball>H4</ball>\r
1883             <mode>6</mode>\r
1884           </AssociatedInfo>\r
1885           <AssociatedInfo>\r
1886             <signal>vin3b_d7</signal>\r
1887             <ball>H3</ball>\r
1888             <mode>6</mode>\r
1889           </AssociatedInfo>\r
1890           <AssociatedInfo>\r
1891             <signal>vin3b_hsync1</signal>\r
1892             <ball>H5</ball>\r
1893             <mode>6</mode>\r
1894           </AssociatedInfo>\r
1895           <AssociatedInfo>\r
1896             <signal>vin3b_vsync1</signal>\r
1897             <ball>G4</ball>\r
1898             <mode>6</mode>\r
1899           </AssociatedInfo>\r
1900         </ioset>\r
1901       </muxmode>\r
1902       <muxmode>\r
1903         <mode>14</mode>\r
1904         <signal>gpio2_10</signal>\r
1905         <color>0x8fbc8f</color>\r
1906       </muxmode>\r
1907       <muxmode>\r
1908         <mode>15</mode>\r
1909         <signal>Driveroff</signal>\r
1910         <color>0xf0fff0</color>\r
1911       </muxmode>\r
1912       <confregisters>\r
1913         <regbit>\r
1914           <register>CTRL_CORE_PAD_GPMC_A20</register>\r
1915         </regbit>\r
1916       </confregisters>\r
1917     </pad>\r
1918   </type>\r
1919 </clockNode>\r
1920 <clockNode>\r
1921   <name>gpmc_a23</name>\r
1922   <type>\r
1923     <pad>\r
1924       <ballname>G5</ballname>\r
1925       <dir>IO</dir>\r
1926       <numberOfMuxmodes>16</numberOfMuxmodes>\r
1927       <muxmode>\r
1928         <mode>0</mode>\r
1929         <signal>gpmc_a23</signal>\r
1930         <color>0x98fb98</color>\r
1931         <virtualmode>\r
1932           <mode>\r
1933             <value>-1</value>\r
1934             <name>NA</name>\r
1935           </mode>\r
1936           <mode>\r
1937             <value>11</value>\r
1938             <name>GPMC_VIRTUAL1</name>\r
1939           </mode>\r
1940         </virtualmode>\r
1941       </muxmode>\r
1942       <muxmode>\r
1943         <mode>1</mode>\r
1944         <signal>mmc2_clk</signal>\r
1945         <color>0xff6347</color>\r
1946         <manualmode>\r
1947           <cfgreg>\r
1948             <name>CFG_GPMC_A23_IN</name>\r
1949             <mode>\r
1950               <adelay>-1</adelay>\r
1951               <gdelay>-1</gdelay>\r
1952               <name>NA</name>\r
1953             </mode>\r
1954             <mode>\r
1955               <adelay>1145</adelay>\r
1956               <gdelay>3054</gdelay>\r
1957               <name>MMC2_DDR_LB_MANUAL1</name>\r
1958             </mode>\r
1959             <mode>\r
1960               <adelay>0</adelay>\r
1961               <gdelay>2764</gdelay>\r
1962               <name>MMC2_STD_HS_LB_MANUAL1</name>\r
1963             </mode>\r
1964           </cfgreg>\r
1965         </manualmode>\r
1966         <manualmode>\r
1967           <cfgreg>\r
1968             <name>CFG_GPMC_A23_OUT</name>\r
1969             <mode>\r
1970               <adelay>-1</adelay>\r
1971               <gdelay>-1</gdelay>\r
1972               <name>NA</name>\r
1973             </mode>\r
1974             <mode>\r
1975               <adelay>423</adelay>\r
1976               <gdelay>0</gdelay>\r
1977               <name>MMC2_DDR_LB_MANUAL1</name>\r
1978             </mode>\r
1979             <mode>\r
1980               <adelay>0</adelay>\r
1981               <gdelay>0</gdelay>\r
1982               <name>MMC2_STD_HS_LB_MANUAL1</name>\r
1983             </mode>\r
1984             <mode>\r
1985               <adelay>1062</adelay>\r
1986               <gdelay>154</gdelay>\r
1987               <name>MMC2_HS200_MANUAL1</name>\r
1988             </mode>\r
1989           </cfgreg>\r
1990         </manualmode>\r
1991       </muxmode>\r
1992       <muxmode>\r
1993         <mode>2</mode>\r
1994         <signal>gpmc_a17</signal>\r
1995         <color>0x98fb98</color>\r
1996         <virtualmode>\r
1997           <mode>\r
1998             <value>-1</value>\r
1999             <name>NA</name>\r
2000           </mode>\r
2001           <mode>\r
2002             <value>11</value>\r
2003             <name>GPMC_VIRTUAL1</name>\r
2004           </mode>\r
2005         </virtualmode>\r
2006       </muxmode>\r
2007       <muxmode>\r
2008         <mode>4</mode>\r
2009         <signal>vin4a_fld0</signal>\r
2010         <color>0xbc8f8f</color>\r
2011         <manualmode>\r
2012           <cfgreg>\r
2013             <name>CFG_GPMC_A23_IN</name>\r
2014             <mode>\r
2015               <adelay>-1</adelay>\r
2016               <gdelay>-1</gdelay>\r
2017               <name>NA</name>\r
2018             </mode>\r
2019             <mode>\r
2020               <adelay>1716</adelay>\r
2021               <gdelay>0</gdelay>\r
2022               <name>VIP2_MANUAL1</name>\r
2023             </mode>\r
2024             <mode>\r
2025               <adelay>1717</adelay>\r
2026               <gdelay>0</gdelay>\r
2027               <name>VIP2_MANUAL2</name>\r
2028             </mode>\r
2029             <mode>\r
2030               <adelay>1489</adelay>\r
2031               <gdelay>0</gdelay>\r
2032               <name>VIP2_4A_MANUAL1</name>\r
2033             </mode>\r
2034             <mode>\r
2035               <adelay>1492</adelay>\r
2036               <gdelay>0</gdelay>\r
2037               <name>VIP2_4A_MANUAL2</name>\r
2038             </mode>\r
2039           </cfgreg>\r
2040         </manualmode>\r
2041         <ioset>\r
2042           <name>IOSET1</name>\r
2043           <AssociatedInfo>\r
2044             <signal>vin4a_d0</signal>\r
2045             <ball>P6</ball>\r
2046             <mode>4</mode>\r
2047           </AssociatedInfo>\r
2048           <AssociatedInfo>\r
2049             <signal>vin4a_d1</signal>\r
2050             <ball>J6</ball>\r
2051             <mode>4</mode>\r
2052           </AssociatedInfo>\r
2053           <AssociatedInfo>\r
2054             <signal>vin4a_d2</signal>\r
2055             <ball>R4</ball>\r
2056             <mode>4</mode>\r
2057           </AssociatedInfo>\r
2058           <AssociatedInfo>\r
2059             <signal>vin4a_d3</signal>\r
2060             <ball>R5</ball>\r
2061             <mode>4</mode>\r
2062           </AssociatedInfo>\r
2063           <AssociatedInfo>\r
2064             <signal>vin4a_d4</signal>\r
2065             <ball>M6</ball>\r
2066             <mode>4</mode>\r
2067           </AssociatedInfo>\r
2068           <AssociatedInfo>\r
2069             <signal>vin4a_d5</signal>\r
2070             <ball>K4</ball>\r
2071             <mode>4</mode>\r
2072           </AssociatedInfo>\r
2073           <AssociatedInfo>\r
2074             <signal>vin4a_d6</signal>\r
2075             <ball>P5</ball>\r
2076             <mode>4</mode>\r
2077           </AssociatedInfo>\r
2078           <AssociatedInfo>\r
2079             <signal>vin4a_d7</signal>\r
2080             <ball>N6</ball>\r
2081             <mode>4</mode>\r
2082           </AssociatedInfo>\r
2083           <AssociatedInfo>\r
2084             <signal>vin4a_d8</signal>\r
2085             <ball>T2</ball>\r
2086             <mode>4</mode>\r
2087           </AssociatedInfo>\r
2088           <AssociatedInfo>\r
2089             <signal>vin4a_d9</signal>\r
2090             <ball>U1</ball>\r
2091             <mode>4</mode>\r
2092           </AssociatedInfo>\r
2093           <AssociatedInfo>\r
2094             <signal>vin4a_d10</signal>\r
2095             <ball>P3</ball>\r
2096             <mode>4</mode>\r
2097           </AssociatedInfo>\r
2098           <AssociatedInfo>\r
2099             <signal>vin4a_d11</signal>\r
2100             <ball>R1</ball>\r
2101             <mode>4</mode>\r
2102           </AssociatedInfo>\r
2103           <AssociatedInfo>\r
2104             <signal>vin4a_d12</signal>\r
2105             <ball>H6</ball>\r
2106             <mode>4</mode>\r
2107           </AssociatedInfo>\r
2108           <AssociatedInfo>\r
2109             <signal>vin4a_d13</signal>\r
2110             <ball>G6</ball>\r
2111             <mode>4</mode>\r
2112           </AssociatedInfo>\r
2113           <AssociatedInfo>\r
2114             <signal>vin4a_d14</signal>\r
2115             <ball>J4</ball>\r
2116             <mode>4</mode>\r
2117           </AssociatedInfo>\r
2118           <AssociatedInfo>\r
2119             <signal>vin4a_d15</signal>\r
2120             <ball>F5</ball>\r
2121             <mode>4</mode>\r
2122           </AssociatedInfo>\r
2123           <AssociatedInfo>\r
2124             <signal>vin4a_hsync0</signal>\r
2125             <ball1>R2</ball1>\r
2126             <mode1>4</mode1>\r
2127             <ball2>L6</ball2>\r
2128             <mode2>4</mode2>\r
2129           </AssociatedInfo>\r
2130           <AssociatedInfo>\r
2131             <signal>vin4a_vsync0</signal>\r
2132             <ball1>R6</ball1>\r
2133             <mode1>4</mode1>\r
2134             <ball2>N1</ball2>\r
2135             <mode2>4</mode2>\r
2136           </AssociatedInfo>\r
2137           <AssociatedInfo>\r
2138             <signal>vin4a_de0</signal>\r
2139             <ball1>G4</ball1>\r
2140             <mode1>4</mode1>\r
2141             <ball2>L6</ball2>\r
2142             <mode2>5</mode2>\r
2143           </AssociatedInfo>\r
2144           <AssociatedInfo>\r
2145             <signal>vin4a_clk0</signal>\r
2146             <ball>P4</ball>\r
2147             <mode>4</mode>\r
2148           </AssociatedInfo>\r
2149         </ioset>\r
2150       </muxmode>\r
2151       <muxmode>\r
2152         <mode>6</mode>\r
2153         <signal>vin3b_d4</signal>\r
2154         <color>0xbc8f8f</color>\r
2155         <manualmode>\r
2156           <cfgreg>\r
2157             <name>CFG_GPMC_A23_IN</name>\r
2158             <mode>\r
2159               <adelay>-1</adelay>\r
2160               <gdelay>-1</gdelay>\r
2161               <name>NA</name>\r
2162             </mode>\r
2163             <mode>\r
2164               <adelay>1716</adelay>\r
2165               <gdelay>0</gdelay>\r
2166               <name>VIP2_MANUAL1</name>\r
2167             </mode>\r
2168             <mode>\r
2169               <adelay>1717</adelay>\r
2170               <gdelay>0</gdelay>\r
2171               <name>VIP2_MANUAL2</name>\r
2172             </mode>\r
2173             <mode>\r
2174               <adelay>1680</adelay>\r
2175               <gdelay>769</gdelay>\r
2176               <name>VIP2_3B_IOSET2_MANUAL1</name>\r
2177             </mode>\r
2178             <mode>\r
2179               <adelay>2016</adelay>\r
2180               <gdelay>619</gdelay>\r
2181               <name>VIP2_3B_IOSET2_MANUAL2</name>\r
2182             </mode>\r
2183           </cfgreg>\r
2184         </manualmode>\r
2185         <ioset>\r
2186           <name>IOSET1</name>\r
2187           <AssociatedInfo>\r
2188             <signal>vin3b_clk1</signal>\r
2189             <ball>L6</ball>\r
2190             <mode>6</mode>\r
2191           </AssociatedInfo>\r
2192           <AssociatedInfo>\r
2193             <signal>vin3b_de1</signal>\r
2194             <ball>N3</ball>\r
2195             <mode>6</mode>\r
2196           </AssociatedInfo>\r
2197           <AssociatedInfo>\r
2198             <signal>vin3b_fld1</signal>\r
2199             <ball>M4</ball>\r
2200             <mode>6</mode>\r
2201           </AssociatedInfo>\r
2202           <AssociatedInfo>\r
2203             <signal>vin3b_d0</signal>\r
2204             <ball>H6</ball>\r
2205             <mode>6</mode>\r
2206           </AssociatedInfo>\r
2207           <AssociatedInfo>\r
2208             <signal>vin3b_d1</signal>\r
2209             <ball>G6</ball>\r
2210             <mode>6</mode>\r
2211           </AssociatedInfo>\r
2212           <AssociatedInfo>\r
2213             <signal>vin3b_d2</signal>\r
2214             <ball>J4</ball>\r
2215             <mode>6</mode>\r
2216           </AssociatedInfo>\r
2217           <AssociatedInfo>\r
2218             <signal>vin3b_d3</signal>\r
2219             <ball>F5</ball>\r
2220             <mode>6</mode>\r
2221           </AssociatedInfo>\r
2222           <AssociatedInfo>\r
2223             <signal>vin3b_d5</signal>\r
2224             <ball>J3</ball>\r
2225             <mode>6</mode>\r
2226           </AssociatedInfo>\r
2227           <AssociatedInfo>\r
2228             <signal>vin3b_d6</signal>\r
2229             <ball>H4</ball>\r
2230             <mode>6</mode>\r
2231           </AssociatedInfo>\r
2232           <AssociatedInfo>\r
2233             <signal>vin3b_d7</signal>\r
2234             <ball>H3</ball>\r
2235             <mode>6</mode>\r
2236           </AssociatedInfo>\r
2237           <AssociatedInfo>\r
2238             <signal>vin3b_hsync1</signal>\r
2239             <ball>H5</ball>\r
2240             <mode>6</mode>\r
2241           </AssociatedInfo>\r
2242           <AssociatedInfo>\r
2243             <signal>vin3b_vsync1</signal>\r
2244             <ball>G4</ball>\r
2245             <mode>6</mode>\r
2246           </AssociatedInfo>\r
2247         </ioset>\r
2248         <ioset>\r
2249           <name>IOSET2</name>\r
2250           <AssociatedInfo>\r
2251             <signal>vin3b_clk1</signal>\r
2252             <ball>M4</ball>\r
2253             <mode>4</mode>\r
2254           </AssociatedInfo>\r
2255           <AssociatedInfo>\r
2256             <signal>vin3b_de1</signal>\r
2257             <ball>N3</ball>\r
2258             <mode>6</mode>\r
2259           </AssociatedInfo>\r
2260           <AssociatedInfo>\r
2261             <signal>vin3b_d0</signal>\r
2262             <ball>H6</ball>\r
2263             <mode>6</mode>\r
2264           </AssociatedInfo>\r
2265           <AssociatedInfo>\r
2266             <signal>vin3b_d1</signal>\r
2267             <ball>G6</ball>\r
2268             <mode>6</mode>\r
2269           </AssociatedInfo>\r
2270           <AssociatedInfo>\r
2271             <signal>vin3b_d2</signal>\r
2272             <ball>J4</ball>\r
2273             <mode>6</mode>\r
2274           </AssociatedInfo>\r
2275           <AssociatedInfo>\r
2276             <signal>vin3b_d3</signal>\r
2277             <ball>F5</ball>\r
2278             <mode>6</mode>\r
2279           </AssociatedInfo>\r
2280           <AssociatedInfo>\r
2281             <signal>vin3b_d5</signal>\r
2282             <ball>J3</ball>\r
2283             <mode>6</mode>\r
2284           </AssociatedInfo>\r
2285           <AssociatedInfo>\r
2286             <signal>vin3b_d6</signal>\r
2287             <ball>H4</ball>\r
2288             <mode>6</mode>\r
2289           </AssociatedInfo>\r
2290           <AssociatedInfo>\r
2291             <signal>vin3b_d7</signal>\r
2292             <ball>H3</ball>\r
2293             <mode>6</mode>\r
2294           </AssociatedInfo>\r
2295           <AssociatedInfo>\r
2296             <signal>vin3b_hsync1</signal>\r
2297             <ball>H5</ball>\r
2298             <mode>6</mode>\r
2299           </AssociatedInfo>\r
2300           <AssociatedInfo>\r
2301             <signal>vin3b_vsync1</signal>\r
2302             <ball>G4</ball>\r
2303             <mode>6</mode>\r
2304           </AssociatedInfo>\r
2305         </ioset>\r
2306       </muxmode>\r
2307       <muxmode>\r
2308         <mode>14</mode>\r
2309         <signal>gpio2_13</signal>\r
2310         <color>0x8fbc8f</color>\r
2311       </muxmode>\r
2312       <muxmode>\r
2313         <mode>15</mode>\r
2314         <signal>Driveroff</signal>\r
2315         <color>0xf0fff0</color>\r
2316       </muxmode>\r
2317       <confregisters>\r
2318         <regbit>\r
2319           <register>CTRL_CORE_PAD_GPMC_A23</register>\r
2320         </regbit>\r
2321       </confregisters>\r
2322     </pad>\r
2323   </type>\r
2324 </clockNode>\r
2325 <clockNode>\r
2326   <name>gpmc_cs1</name>\r
2327   <type>\r
2328     <pad>\r
2329       <ballname>G4</ballname>\r
2330       <dir>IO</dir>\r
2331       <numberOfMuxmodes>16</numberOfMuxmodes>\r
2332       <muxmode>\r
2333         <mode>0</mode>\r
2334         <signal>gpmc_cs1</signal>\r
2335         <color>0x98fb98</color>\r
2336         <virtualmode>\r
2337           <mode>\r
2338             <value>-1</value>\r
2339             <name>NA</name>\r
2340           </mode>\r
2341           <mode>\r
2342             <value>11</value>\r
2343             <name>GPMC_VIRTUAL1</name>\r
2344           </mode>\r
2345         </virtualmode>\r
2346       </muxmode>\r
2347       <muxmode>\r
2348         <mode>1</mode>\r
2349         <signal>mmc2_cmd</signal>\r
2350         <color>0xff6347</color>\r
2351         <manualmode>\r
2352           <cfgreg>\r
2353             <name>CFG_GPMC_CS1_IN</name>\r
2354             <mode>\r
2355               <adelay>-1</adelay>\r
2356               <gdelay>-1</gdelay>\r
2357               <name>NA</name>\r
2358             </mode>\r
2359             <mode>\r
2360               <adelay>0</adelay>\r
2361               <gdelay>0</gdelay>\r
2362               <name>MMC2_DDR_LB_MANUAL1</name>\r
2363             </mode>\r
2364             <mode>\r
2365               <adelay>250</adelay>\r
2366               <gdelay>0</gdelay>\r
2367               <name>MMC2_STD_HS_LB_MANUAL1</name>\r
2368             </mode>\r
2369           </cfgreg>\r
2370         </manualmode>\r
2371         <manualmode>\r
2372           <cfgreg>\r
2373             <name>CFG_GPMC_CS1_OEN</name>\r
2374             <mode>\r
2375               <adelay>-1</adelay>\r
2376               <gdelay>-1</gdelay>\r
2377               <name>NA</name>\r
2378             </mode>\r
2379             <mode>\r
2380               <adelay>0</adelay>\r
2381               <gdelay>0</gdelay>\r
2382               <name>MMC2_DDR_LB_MANUAL1</name>\r
2383             </mode>\r
2384             <mode>\r
2385               <adelay>0</adelay>\r
2386               <gdelay>0</gdelay>\r
2387               <name>MMC2_STD_HS_LB_MANUAL1</name>\r
2388             </mode>\r
2389             <mode>\r
2390               <adelay>759</adelay>\r
2391               <gdelay>0</gdelay>\r
2392               <name>MMC2_HS200_MANUAL1</name>\r
2393             </mode>\r
2394           </cfgreg>\r
2395         </manualmode>\r
2396         <manualmode>\r
2397           <cfgreg>\r
2398             <name>CFG_GPMC_CS1_OUT</name>\r
2399             <mode>\r
2400               <adelay>-1</adelay>\r
2401               <gdelay>-1</gdelay>\r
2402               <name>NA</name>\r
2403             </mode>\r
2404             <mode>\r
2405               <adelay>0</adelay>\r
2406               <gdelay>0</gdelay>\r
2407               <name>MMC2_DDR_LB_MANUAL1</name>\r
2408             </mode>\r
2409             <mode>\r
2410               <adelay>0</adelay>\r
2411               <gdelay>0</gdelay>\r
2412               <name>MMC2_STD_HS_LB_MANUAL1</name>\r
2413             </mode>\r
2414             <mode>\r
2415               <adelay>72</adelay>\r
2416               <gdelay>0</gdelay>\r
2417               <name>MMC2_HS200_MANUAL1</name>\r
2418             </mode>\r
2419           </cfgreg>\r
2420         </manualmode>\r
2421       </muxmode>\r
2422       <muxmode>\r
2423         <mode>2</mode>\r
2424         <signal>gpmc_a22</signal>\r
2425         <color>0x98fb98</color>\r
2426         <virtualmode>\r
2427           <mode>\r
2428             <value>-1</value>\r
2429             <name>NA</name>\r
2430           </mode>\r
2431           <mode>\r
2432             <value>11</value>\r
2433             <name>GPMC_VIRTUAL1</name>\r
2434           </mode>\r
2435         </virtualmode>\r
2436       </muxmode>\r
2437       <muxmode>\r
2438         <mode>4</mode>\r
2439         <signal>vin4a_de0</signal>\r
2440         <color>0xbc8f8f</color>\r
2441         <manualmode>\r
2442           <cfgreg>\r
2443             <name>CFG_GPMC_CS1_IN</name>\r
2444             <mode>\r
2445               <adelay>-1</adelay>\r
2446               <gdelay>-1</gdelay>\r
2447               <name>NA</name>\r
2448             </mode>\r
2449             <mode>\r
2450               <adelay>1611</adelay>\r
2451               <gdelay>0</gdelay>\r
2452               <name>VIP2_MANUAL1</name>\r
2453             </mode>\r
2454             <mode>\r
2455               <adelay>1450</adelay>\r
2456               <gdelay>0</gdelay>\r
2457               <name>VIP2_MANUAL2</name>\r
2458             </mode>\r
2459             <mode>\r
2460               <adelay>1412</adelay>\r
2461               <gdelay>0</gdelay>\r
2462               <name>VIP2_4A_MANUAL1</name>\r
2463             </mode>\r
2464             <mode>\r
2465               <adelay>1282</adelay>\r
2466               <gdelay>0</gdelay>\r
2467               <name>VIP2_4A_MANUAL2</name>\r
2468             </mode>\r
2469           </cfgreg>\r
2470         </manualmode>\r
2471         <ioset>\r
2472           <name>IOSET1</name>\r
2473           <AssociatedInfo>\r
2474             <signal>vin4a_d0</signal>\r
2475             <ball>P6</ball>\r
2476             <mode>4</mode>\r
2477           </AssociatedInfo>\r
2478           <AssociatedInfo>\r
2479             <signal>vin4a_d1</signal>\r
2480             <ball>J6</ball>\r
2481             <mode>4</mode>\r
2482           </AssociatedInfo>\r
2483           <AssociatedInfo>\r
2484             <signal>vin4a_d2</signal>\r
2485             <ball>R4</ball>\r
2486             <mode>4</mode>\r
2487           </AssociatedInfo>\r
2488           <AssociatedInfo>\r
2489             <signal>vin4a_d3</signal>\r
2490             <ball>R5</ball>\r
2491             <mode>4</mode>\r
2492           </AssociatedInfo>\r
2493           <AssociatedInfo>\r
2494             <signal>vin4a_d4</signal>\r
2495             <ball>M6</ball>\r
2496             <mode>4</mode>\r
2497           </AssociatedInfo>\r
2498           <AssociatedInfo>\r
2499             <signal>vin4a_d5</signal>\r
2500             <ball>K4</ball>\r
2501             <mode>4</mode>\r
2502           </AssociatedInfo>\r
2503           <AssociatedInfo>\r
2504             <signal>vin4a_d6</signal>\r
2505             <ball>P5</ball>\r
2506             <mode>4</mode>\r
2507           </AssociatedInfo>\r
2508           <AssociatedInfo>\r
2509             <signal>vin4a_d7</signal>\r
2510             <ball>N6</ball>\r
2511             <mode>4</mode>\r
2512           </AssociatedInfo>\r
2513           <AssociatedInfo>\r
2514             <signal>vin4a_d8</signal>\r
2515             <ball>T2</ball>\r
2516             <mode>4</mode>\r
2517           </AssociatedInfo>\r
2518           <AssociatedInfo>\r
2519             <signal>vin4a_d9</signal>\r
2520             <ball>U1</ball>\r
2521             <mode>4</mode>\r
2522           </AssociatedInfo>\r
2523           <AssociatedInfo>\r
2524             <signal>vin4a_d10</signal>\r
2525             <ball>P3</ball>\r
2526             <mode>4</mode>\r
2527           </AssociatedInfo>\r
2528           <AssociatedInfo>\r
2529             <signal>vin4a_d11</signal>\r
2530             <ball>R1</ball>\r
2531             <mode>4</mode>\r
2532           </AssociatedInfo>\r
2533           <AssociatedInfo>\r
2534             <signal>vin4a_d12</signal>\r
2535             <ball>H6</ball>\r
2536             <mode>4</mode>\r
2537           </AssociatedInfo>\r
2538           <AssociatedInfo>\r
2539             <signal>vin4a_d13</signal>\r
2540             <ball>G6</ball>\r
2541             <mode>4</mode>\r
2542           </AssociatedInfo>\r
2543           <AssociatedInfo>\r
2544             <signal>vin4a_d14</signal>\r
2545             <ball>J4</ball>\r
2546             <mode>4</mode>\r
2547           </AssociatedInfo>\r
2548           <AssociatedInfo>\r
2549             <signal>vin4a_d15</signal>\r
2550             <ball>F5</ball>\r
2551             <mode>4</mode>\r
2552           </AssociatedInfo>\r
2553           <AssociatedInfo>\r
2554             <signal>vin4a_hsync0</signal>\r
2555             <ball1>R2</ball1>\r
2556             <mode1>4</mode1>\r
2557             <ball2>L6</ball2>\r
2558             <mode2>4</mode2>\r
2559           </AssociatedInfo>\r
2560           <AssociatedInfo>\r
2561             <signal>vin4a_vsync0</signal>\r
2562             <ball1>R6</ball1>\r
2563             <mode1>4</mode1>\r
2564             <ball2>N1</ball2>\r
2565             <mode2>4</mode2>\r
2566           </AssociatedInfo>\r
2567           <AssociatedInfo>\r
2568             <signal>vin4a_fld0</signal>\r
2569             <ball1>K5</ball1>\r
2570             <mode1>4</mode1>\r
2571             <ball2>G5</ball2>\r
2572             <mode2>4</mode2>\r
2573           </AssociatedInfo>\r
2574           <AssociatedInfo>\r
2575             <signal>vin4a_clk0</signal>\r
2576             <ball>P4</ball>\r
2577             <mode>4</mode>\r
2578           </AssociatedInfo>\r
2579         </ioset>\r
2580       </muxmode>\r
2581       <muxmode>\r
2582         <mode>6</mode>\r
2583         <signal>vin3b_vsync1</signal>\r
2584         <color>0xbc8f8f</color>\r
2585         <manualmode>\r
2586           <cfgreg>\r
2587             <name>CFG_GPMC_CS1_IN</name>\r
2588             <mode>\r
2589               <adelay>-1</adelay>\r
2590               <gdelay>-1</gdelay>\r
2591               <name>NA</name>\r
2592             </mode>\r
2593             <mode>\r
2594               <adelay>1611</adelay>\r
2595               <gdelay>0</gdelay>\r
2596               <name>VIP2_MANUAL1</name>\r
2597             </mode>\r
2598             <mode>\r
2599               <adelay>1450</adelay>\r
2600               <gdelay>0</gdelay>\r
2601               <name>VIP2_MANUAL2</name>\r
2602             </mode>\r
2603             <mode>\r
2604               <adelay>1492</adelay>\r
2605               <gdelay>850</gdelay>\r
2606               <name>VIP2_3B_IOSET2_MANUAL1</name>\r
2607             </mode>\r
2608             <mode>\r
2609               <adelay>1829</adelay>\r
2610               <gdelay>486</gdelay>\r
2611               <name>VIP2_3B_IOSET2_MANUAL2</name>\r
2612             </mode>\r
2613           </cfgreg>\r
2614         </manualmode>\r
2615         <ioset>\r
2616           <name>IOSET1</name>\r
2617           <AssociatedInfo>\r
2618             <signal>vin3b_clk1</signal>\r
2619             <ball>L6</ball>\r
2620             <mode>6</mode>\r
2621           </AssociatedInfo>\r
2622           <AssociatedInfo>\r
2623             <signal>vin3b_de1</signal>\r
2624             <ball>N3</ball>\r
2625             <mode>6</mode>\r
2626           </AssociatedInfo>\r
2627           <AssociatedInfo>\r
2628             <signal>vin3b_fld1</signal>\r
2629             <ball>M4</ball>\r
2630             <mode>6</mode>\r
2631           </AssociatedInfo>\r
2632           <AssociatedInfo>\r
2633             <signal>vin3b_d0</signal>\r
2634             <ball>H6</ball>\r
2635             <mode>6</mode>\r
2636           </AssociatedInfo>\r
2637           <AssociatedInfo>\r
2638             <signal>vin3b_d1</signal>\r
2639             <ball>G6</ball>\r
2640             <mode>6</mode>\r
2641           </AssociatedInfo>\r
2642           <AssociatedInfo>\r
2643             <signal>vin3b_d2</signal>\r
2644             <ball>J4</ball>\r
2645             <mode>6</mode>\r
2646           </AssociatedInfo>\r
2647           <AssociatedInfo>\r
2648             <signal>vin3b_d3</signal>\r
2649             <ball>F5</ball>\r
2650             <mode>6</mode>\r
2651           </AssociatedInfo>\r
2652           <AssociatedInfo>\r
2653             <signal>vin3b_d4</signal>\r
2654             <ball>G5</ball>\r
2655             <mode>6</mode>\r
2656           </AssociatedInfo>\r
2657           <AssociatedInfo>\r
2658             <signal>vin3b_d5</signal>\r
2659             <ball>J3</ball>\r
2660             <mode>6</mode>\r
2661           </AssociatedInfo>\r
2662           <AssociatedInfo>\r
2663             <signal>vin3b_d6</signal>\r
2664             <ball>H4</ball>\r
2665             <mode>6</mode>\r
2666           </AssociatedInfo>\r
2667           <AssociatedInfo>\r
2668             <signal>vin3b_d7</signal>\r
2669             <ball>H3</ball>\r
2670             <mode>6</mode>\r
2671           </AssociatedInfo>\r
2672           <AssociatedInfo>\r
2673             <signal>vin3b_hsync1</signal>\r
2674             <ball>H5</ball>\r
2675             <mode>6</mode>\r
2676           </AssociatedInfo>\r
2677         </ioset>\r
2678         <ioset>\r
2679           <name>IOSET2</name>\r
2680           <AssociatedInfo>\r
2681             <signal>vin3b_clk1</signal>\r
2682             <ball>M4</ball>\r
2683             <mode>4</mode>\r
2684           </AssociatedInfo>\r
2685           <AssociatedInfo>\r
2686             <signal>vin3b_de1</signal>\r
2687             <ball>N3</ball>\r
2688             <mode>6</mode>\r
2689           </AssociatedInfo>\r
2690           <AssociatedInfo>\r
2691             <signal>vin3b_d0</signal>\r
2692 &nb