PCT: Add support for J6Plus SR1.0 silicon
authorNikhil Devshatwar <nikhil.nd@ti.com>
Mon, 21 Aug 2017 14:43:15 +0000 (20:13 +0530)
committerNikhil Devshatwar <nikhil.nd@ti.com>
Mon, 21 Aug 2017 15:06:50 +0000 (20:36 +0530)
commit3ed1dea7e4b08c190e26b8273e140acdb41f2e01
treef3b9ffc94fb2d3800e2654b1f4f479466058aae3
parentc1a933ef5f2b2fbecb4f577d2ba5c56bc97e15d5
PCT: Add support for J6Plus SR1.0 silicon

Add XML files from the PCT tool v1.0.1
Create guidelines file from data manual vA
XMLFiles/DRA77xP_DRA76xP/CTRL_MODULE_CORE.xml [new file with mode: 0644]
XMLFiles/DRA77xP_DRA76xP/IODELAYCONFIG.xml [new file with mode: 0644]
XMLFiles/DRA77xP_DRA76xP/guidelines_SR1.0.txt [new file with mode: 0644]
XMLFiles/DRA77xP_DRA76xP/model_DRA77xP_DRA76xP_SR1.0_v1.0.1.xml [new file with mode: 0644]
iodelay-autogen.py