1 /*
2 * Copyright © 2008-2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
28 /**
29 * @file intel_bufmgr.h
30 *
31 * Public definitions of Intel-specific bufmgr functions.
32 */
34 #ifndef INTEL_BUFMGR_H
35 #define INTEL_BUFMGR_H
37 #include <stdio.h>
38 #include <stdint.h>
39 #include <stdio.h>
41 struct drm_clip_rect;
43 typedef struct _drm_intel_bufmgr drm_intel_bufmgr;
44 typedef struct _drm_intel_context drm_intel_context;
45 typedef struct _drm_intel_bo drm_intel_bo;
47 struct _drm_intel_bo {
48 /**
49 * Size in bytes of the buffer object.
50 *
51 * The size may be larger than the size originally requested for the
52 * allocation, such as being aligned to page size.
53 */
54 unsigned long size;
56 /**
57 * Alignment requirement for object
58 *
59 * Used for GTT mapping & pinning the object.
60 */
61 unsigned long align;
63 /**
64 * Last seen card virtual address (offset from the beginning of the
65 * aperture) for the object. This should be used to fill relocation
66 * entries when calling drm_intel_bo_emit_reloc()
67 */
68 unsigned long offset;
70 /**
71 * Virtual address for accessing the buffer data. Only valid while
72 * mapped.
73 */
74 #ifdef __cplusplus
75 void *virt;
76 #else
77 void *virtual;
78 #endif
80 /** Buffer manager context associated with this buffer object */
81 drm_intel_bufmgr *bufmgr;
83 /**
84 * MM-specific handle for accessing object
85 */
86 int handle;
87 };
89 enum aub_dump_bmp_format {
90 AUB_DUMP_BMP_FORMAT_8BIT = 1,
91 AUB_DUMP_BMP_FORMAT_ARGB_4444 = 4,
92 AUB_DUMP_BMP_FORMAT_ARGB_0888 = 6,
93 AUB_DUMP_BMP_FORMAT_ARGB_8888 = 7,
94 };
96 typedef struct _drm_intel_aub_annotation {
97 uint32_t type;
98 uint32_t subtype;
99 uint32_t ending_offset;
100 } drm_intel_aub_annotation;
102 #define BO_ALLOC_FOR_RENDER (1<<0)
104 drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
105 unsigned long size, unsigned int alignment);
106 drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
107 const char *name,
108 unsigned long size,
109 unsigned int alignment);
110 drm_intel_bo *drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr,
111 const char *name,
112 int x, int y, int cpp,
113 uint32_t *tiling_mode,
114 unsigned long *pitch,
115 unsigned long flags);
116 void drm_intel_bo_reference(drm_intel_bo *bo);
117 void drm_intel_bo_unreference(drm_intel_bo *bo);
118 int drm_intel_bo_map(drm_intel_bo *bo, int write_enable);
119 int drm_intel_bo_unmap(drm_intel_bo *bo);
121 int drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset,
122 unsigned long size, const void *data);
123 int drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
124 unsigned long size, void *data);
125 void drm_intel_bo_wait_rendering(drm_intel_bo *bo);
127 void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug);
128 void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr);
129 int drm_intel_bo_exec(drm_intel_bo *bo, int used,
130 struct drm_clip_rect *cliprects, int num_cliprects, int DR4);
131 int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used,
132 struct drm_clip_rect *cliprects, int num_cliprects, int DR4,
133 unsigned int flags);
134 int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count);
136 int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
137 drm_intel_bo *target_bo, uint32_t target_offset,
138 uint32_t read_domains, uint32_t write_domain);
139 int drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset,
140 drm_intel_bo *target_bo,
141 uint32_t target_offset,
142 uint32_t read_domains, uint32_t write_domain);
143 int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment);
144 int drm_intel_bo_unpin(drm_intel_bo *bo);
145 int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
146 uint32_t stride);
147 int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
148 uint32_t * swizzle_mode);
149 int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name);
150 int drm_intel_bo_busy(drm_intel_bo *bo);
151 int drm_intel_bo_madvise(drm_intel_bo *bo, int madv);
153 int drm_intel_bo_disable_reuse(drm_intel_bo *bo);
154 int drm_intel_bo_is_reusable(drm_intel_bo *bo);
155 int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo);
157 /* drm_intel_bufmgr_gem.c */
158 drm_intel_bufmgr *drm_intel_bufmgr_gem_init(int fd, int batch_size);
159 drm_intel_bo *drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr,
160 const char *name,
161 unsigned int handle);
162 void drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr);
163 void drm_intel_bufmgr_gem_enable_fenced_relocs(drm_intel_bufmgr *bufmgr);
164 void drm_intel_bufmgr_gem_set_vma_cache_size(drm_intel_bufmgr *bufmgr,
165 int limit);
166 int drm_intel_gem_bo_map_unsynchronized(drm_intel_bo *bo);
167 int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo);
168 int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo);
170 int drm_intel_gem_bo_get_reloc_count(drm_intel_bo *bo);
171 void drm_intel_gem_bo_clear_relocs(drm_intel_bo *bo, int start);
172 void drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable);
174 void drm_intel_bufmgr_gem_set_aub_dump(drm_intel_bufmgr *bufmgr, int enable);
175 void drm_intel_gem_bo_aub_dump_bmp(drm_intel_bo *bo,
176 int x1, int y1, int width, int height,
177 enum aub_dump_bmp_format format,
178 int pitch, int offset);
179 void
180 drm_intel_bufmgr_gem_set_aub_annotations(drm_intel_bo *bo,
181 drm_intel_aub_annotation *annotations,
182 unsigned count);
184 int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id);
186 int drm_intel_get_aperture_sizes(int fd, size_t *mappable, size_t *total);
187 int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr);
188 int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns);
190 /* drm_intel_bufmgr_fake.c */
191 drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd,
192 unsigned long low_offset,
193 void *low_virtual,
194 unsigned long size,
195 volatile unsigned int
196 *last_dispatch);
197 void drm_intel_bufmgr_fake_set_last_dispatch(drm_intel_bufmgr *bufmgr,
198 volatile unsigned int
199 *last_dispatch);
200 void drm_intel_bufmgr_fake_set_exec_callback(drm_intel_bufmgr *bufmgr,
201 int (*exec) (drm_intel_bo *bo,
202 unsigned int used,
203 void *priv),
204 void *priv);
205 void drm_intel_bufmgr_fake_set_fence_callback(drm_intel_bufmgr *bufmgr,
206 unsigned int (*emit) (void *priv),
207 void (*wait) (unsigned int fence,
208 void *priv),
209 void *priv);
210 drm_intel_bo *drm_intel_bo_fake_alloc_static(drm_intel_bufmgr *bufmgr,
211 const char *name,
212 unsigned long offset,
213 unsigned long size, void *virt);
214 void drm_intel_bo_fake_disable_backing_store(drm_intel_bo *bo,
215 void (*invalidate_cb) (drm_intel_bo
216 * bo,
217 void *ptr),
218 void *ptr);
220 void drm_intel_bufmgr_fake_contended_lock_take(drm_intel_bufmgr *bufmgr);
221 void drm_intel_bufmgr_fake_evict_all(drm_intel_bufmgr *bufmgr);
223 struct drm_intel_decode *drm_intel_decode_context_alloc(uint32_t devid);
224 void drm_intel_decode_context_free(struct drm_intel_decode *ctx);
225 void drm_intel_decode_set_batch_pointer(struct drm_intel_decode *ctx,
226 void *data, uint32_t hw_offset,
227 int count);
228 void drm_intel_decode_set_dump_past_end(struct drm_intel_decode *ctx,
229 int dump_past_end);
230 void drm_intel_decode_set_head_tail(struct drm_intel_decode *ctx,
231 uint32_t head, uint32_t tail);
232 void drm_intel_decode_set_output_file(struct drm_intel_decode *ctx, FILE *out);
233 void drm_intel_decode(struct drm_intel_decode *ctx);
236 /** @{ Compatibility defines to keep old code building despite the symbol rename
237 * from dri_* to drm_intel_*
238 */
239 #define dri_bo drm_intel_bo
240 #define dri_bufmgr drm_intel_bufmgr
241 #define dri_bo_alloc drm_intel_bo_alloc
242 #define dri_bo_reference drm_intel_bo_reference
243 #define dri_bo_unreference drm_intel_bo_unreference
244 #define dri_bo_map drm_intel_bo_map
245 #define dri_bo_unmap drm_intel_bo_unmap
246 #define dri_bo_subdata drm_intel_bo_subdata
247 #define dri_bo_get_subdata drm_intel_bo_get_subdata
248 #define dri_bo_wait_rendering drm_intel_bo_wait_rendering
249 #define dri_bufmgr_set_debug drm_intel_bufmgr_set_debug
250 #define dri_bufmgr_destroy drm_intel_bufmgr_destroy
251 #define dri_bo_exec drm_intel_bo_exec
252 #define dri_bufmgr_check_aperture_space drm_intel_bufmgr_check_aperture_space
253 #define dri_bo_emit_reloc(reloc_bo, read, write, target_offset, \
254 reloc_offset, target_bo) \
255 drm_intel_bo_emit_reloc(reloc_bo, reloc_offset, \
256 target_bo, target_offset, \
257 read, write);
258 #define dri_bo_pin drm_intel_bo_pin
259 #define dri_bo_unpin drm_intel_bo_unpin
260 #define dri_bo_get_tiling drm_intel_bo_get_tiling
261 #define dri_bo_set_tiling(bo, mode) drm_intel_bo_set_tiling(bo, mode, 0)
262 #define dri_bo_flink drm_intel_bo_flink
263 #define intel_bufmgr_gem_init drm_intel_bufmgr_gem_init
264 #define intel_bo_gem_create_from_name drm_intel_bo_gem_create_from_name
265 #define intel_bufmgr_gem_enable_reuse drm_intel_bufmgr_gem_enable_reuse
266 #define intel_bufmgr_fake_init drm_intel_bufmgr_fake_init
267 #define intel_bufmgr_fake_set_last_dispatch drm_intel_bufmgr_fake_set_last_dispatch
268 #define intel_bufmgr_fake_set_exec_callback drm_intel_bufmgr_fake_set_exec_callback
269 #define intel_bufmgr_fake_set_fence_callback drm_intel_bufmgr_fake_set_fence_callback
270 #define intel_bo_fake_alloc_static drm_intel_bo_fake_alloc_static
271 #define intel_bo_fake_disable_backing_store drm_intel_bo_fake_disable_backing_store
272 #define intel_bufmgr_fake_contended_lock_take drm_intel_bufmgr_fake_contended_lock_take
273 #define intel_bufmgr_fake_evict_all drm_intel_bufmgr_fake_evict_all
275 /** @{ */
277 #endif /* INTEL_BUFMGR_H */