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[glsdk/libdrm.git] / linux-core / xgi_drv.c
1 /****************************************************************************
2  * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
3  *
4  * All Rights Reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining
7  * a copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation on the rights to use, copy, modify, merge,
10  * publish, distribute, sublicense, and/or sell copies of the Software,
11  * and to permit persons to whom the Software is furnished to do so,
12  * subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial
16  * portions of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
21  * XGI AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24  * DEALINGS IN THE SOFTWARE.
25  ***************************************************************************/
27 #include "drmP.h"
28 #include "drm.h"
29 #include "xgi_drv.h"
30 #include "xgi_regs.h"
31 #include "xgi_misc.h"
32 #include "xgi_cmdlist.h"
34 #include "drm_pciids.h"
36 static struct pci_device_id pciidlist[] = {
37         xgi_PCI_IDS
38 };
40 int xgi_bootstrap(struct drm_device *, void *, struct drm_file *);
42 static struct drm_ioctl_desc xgi_ioctls[] = {
43         DRM_IOCTL_DEF(DRM_XGI_BOOTSTRAP, xgi_bootstrap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
44         DRM_IOCTL_DEF(DRM_XGI_ALLOC, xgi_alloc_ioctl, DRM_AUTH),
45         DRM_IOCTL_DEF(DRM_XGI_FREE, xgi_free_ioctl, DRM_AUTH),
46         DRM_IOCTL_DEF(DRM_XGI_SUBMIT_CMDLIST, xgi_submit_cmdlist, DRM_AUTH),
47         DRM_IOCTL_DEF(DRM_XGI_STATE_CHANGE, xgi_state_change_ioctl, DRM_AUTH|DRM_MASTER),
48         DRM_IOCTL_DEF(DRM_XGI_SET_FENCE, xgi_set_fence_ioctl, DRM_AUTH),
49         DRM_IOCTL_DEF(DRM_XGI_WAIT_FENCE, xgi_wait_fence_ioctl, DRM_AUTH),
50 };
52 static const int xgi_max_ioctl = DRM_ARRAY_SIZE(xgi_ioctls);
54 static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
55 static int xgi_driver_load(struct drm_device *dev, unsigned long flags);
56 static int xgi_driver_unload(struct drm_device *dev);
57 static void xgi_driver_lastclose(struct drm_device * dev);
58 static void xgi_reclaim_buffers_locked(struct drm_device * dev,
59         struct drm_file * filp);
60 static irqreturn_t xgi_kern_isr(DRM_IRQ_ARGS);
61 static int xgi_kern_isr_postinstall(struct drm_device * dev);
64 static struct drm_driver driver = {
65         .driver_features =
66                 DRIVER_PCI_DMA | DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ |
67                 DRIVER_IRQ_SHARED | DRIVER_SG,
68         .dev_priv_size = sizeof(struct xgi_info),
69         .load = xgi_driver_load,
70         .unload = xgi_driver_unload,
71         .lastclose = xgi_driver_lastclose,
72         .dma_quiescent = NULL,
73         .irq_preinstall = NULL,
74         .irq_postinstall = xgi_kern_isr_postinstall,
75         .irq_uninstall = NULL,
76         .irq_handler = xgi_kern_isr,
77         .reclaim_buffers = drm_core_reclaim_buffers,
78         .reclaim_buffers_idlelocked = xgi_reclaim_buffers_locked,
79         .get_map_ofs = drm_core_get_map_ofs,
80         .get_reg_ofs = drm_core_get_reg_ofs,
81         .ioctls = xgi_ioctls,
82         .dma_ioctl = NULL,
84         .fops = {
85                 .owner = THIS_MODULE,
86                 .open = drm_open,
87                 .release = drm_release,
88                 .ioctl = drm_ioctl,
89                 .mmap = drm_mmap,
90                 .poll = drm_poll,
91                 .fasync = drm_fasync,
92 #if defined(CONFIG_COMPAT)
93                 .compat_ioctl = xgi_compat_ioctl,
94 #endif
95         },
97         .pci_driver = {
98                 .name = DRIVER_NAME,
99                 .id_table = pciidlist,
100                 .probe = probe,
101                 .remove = __devexit_p(drm_cleanup_pci),
102         },
104         .name = DRIVER_NAME,
105         .desc = DRIVER_DESC,
106         .date = DRIVER_DATE,
107         .major = DRIVER_MAJOR,
108         .minor = DRIVER_MINOR,
109         .patchlevel = DRIVER_PATCHLEVEL,
111 };
113 static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
115         return drm_get_dev(pdev, ent, &driver);
119 static int __init xgi_init(void)
121         driver.num_ioctls = xgi_max_ioctl;
122         return drm_init(&driver, pciidlist);
125 static void __exit xgi_exit(void)
127         drm_exit(&driver);
130 module_init(xgi_init);
131 module_exit(xgi_exit);
133 MODULE_AUTHOR(DRIVER_AUTHOR);
134 MODULE_DESCRIPTION(DRIVER_DESC);
135 MODULE_LICENSE("GPL and additional rights");
138 void xgi_engine_init(struct xgi_info * info)
140         u8 temp;
143         OUT3C5B(info->mmio_map, 0x11, 0x92);
145         /* -------> copy from OT2D
146          * PCI Retry Control Register.
147          * disable PCI read retry & enable write retry in mem. (10xx xxxx)b
148          */
149         temp = IN3X5B(info->mmio_map, 0x55);
150         OUT3X5B(info->mmio_map, 0x55, (temp & 0xbf) | 0x80);
152         xgi_enable_ge(info);
154         /* Enable linear addressing of the card. */
155         temp = IN3X5B(info->mmio_map, 0x21);
156         OUT3X5B(info->mmio_map, 0x21, temp | 0x20);
158         /* Enable 32-bit internal data path */
159         temp = IN3X5B(info->mmio_map, 0x2A);
160         OUT3X5B(info->mmio_map, 0x2A, temp | 0x40);
162         /* Enable PCI burst write ,disable burst read and enable MMIO. */
163         /*
164          * 0x3D4.39 Enable PCI burst write, disable burst read and enable MMIO.
165          * 7 ---- Pixel Data Format 1:  big endian 0:  little endian
166          * 6 5 4 3---- Memory Data with Big Endian Format, BE[3:0]#  with Big Endian Format
167          * 2 ---- PCI Burst Write Enable
168          * 1 ---- PCI Burst Read Enable
169          * 0 ---- MMIO Control
170          */
171         temp = IN3X5B(info->mmio_map, 0x39);
172         OUT3X5B(info->mmio_map, 0x39, (temp | 0x05) & 0xfd);
174         /* enable GEIO decode */
175         /* temp = IN3X5B(info->mmio_map, 0x29);
176          * OUT3X5B(info->mmio_map, 0x29, temp | 0x08);
177          */
179         /* Enable graphic engine I/O PCI retry function*/
180         /* temp = IN3X5B(info->mmio_map, 0x62);
181          * OUT3X5B(info->mmio_map, 0x62, temp | 0x50);
182          */
184         /* protect all register except which protected by 3c5.0e.7 */
185         /* OUT3C5B(info->mmio_map, 0x11, 0x87); */
189 int xgi_bootstrap(struct drm_device * dev, void * data,
190                   struct drm_file * filp)
192         struct xgi_info *info = dev->dev_private;
193         struct xgi_bootstrap * bs = (struct xgi_bootstrap *) data;
194         struct drm_map_list *maplist;
195         int err;
198         DRM_SPININIT(&info->fence_lock, "fence lock");
199         info->next_sequence = 0;
200         info->complete_sequence = 0;
202         if (info->mmio_map == NULL) {
203                 err = drm_addmap(dev, info->mmio.base, info->mmio.size,
204                                  _DRM_REGISTERS, _DRM_KERNEL,
205                                  &info->mmio_map);
206                 if (err) {
207                         DRM_ERROR("Unable to map MMIO region: %d\n", err);
208                         return err;
209                 }
211                 xgi_enable_mmio(info);
212                 xgi_engine_init(info);
213         }
216         info->fb.size = IN3CFB(info->mmio_map, 0x54) * 8 * 1024 * 1024;
218         DRM_INFO("fb   base: 0x%lx, size: 0x%x (probed)\n",
219                  (unsigned long) info->fb.base, info->fb.size);
222         if ((info->fb.base == 0) || (info->fb.size == 0)) {
223                 DRM_ERROR("framebuffer appears to be wrong: 0x%lx 0x%x\n",
224                           (unsigned long) info->fb.base, info->fb.size);
225                 return -EINVAL;
226         }
229         /* Init the resource manager */
230         if (!info->fb_heap_initialized) {
231                 err = xgi_fb_heap_init(info);
232                 if (err) {
233                         DRM_ERROR("Unable to initialize FB heap.\n");
234                         return err;
235                 }
236         }
239         info->pcie.size = bs->gart.size;
241         /* Init the resource manager */
242         if (!info->pcie_heap_initialized) {
243                 err = xgi_pcie_heap_init(info);
244                 if (err) {
245                         DRM_ERROR("Unable to initialize GART heap.\n");
246                         return err;
247                 }
249                 /* Alloc 1M bytes for cmdbuffer which is flush2D batch array */
250                 err = xgi_cmdlist_initialize(info, 0x100000, filp);
251                 if (err) {
252                         DRM_ERROR("xgi_cmdlist_initialize() failed\n");
253                         return err;
254                 }
255         }
258         if (info->pcie_map == NULL) {
259                 err = drm_addmap(info->dev, 0, info->pcie.size,
260                                  _DRM_SCATTER_GATHER, _DRM_LOCKED,
261                                  & info->pcie_map);
262                 if (err) {
263                         DRM_ERROR("Could not add map for GART backing "
264                                   "store.\n");
265                         return err;
266                 }
267         }
270         maplist = drm_find_matching_map(dev, info->pcie_map);
271         if (maplist == NULL) {
272                 DRM_ERROR("Could not find GART backing store map.\n");
273                 return -EINVAL;
274         }
276         bs->gart = *info->pcie_map;
277         bs->gart.handle = (void *)(unsigned long) maplist->user_token;
278         return 0;
282 void xgi_driver_lastclose(struct drm_device * dev)
284         struct xgi_info * info = dev->dev_private;
286         if (info != NULL) {
287                 if (info->mmio_map != NULL) {
288                         xgi_cmdlist_cleanup(info);
289                         xgi_disable_ge(info);
290                         xgi_disable_mmio(info);
291                 }
293                 /* The core DRM lastclose routine will destroy all of our
294                  * mappings for us.  NULL out the pointers here so that
295                  * xgi_bootstrap can do the right thing.
296                  */
297                 info->pcie_map = NULL;
298                 info->mmio_map = NULL;
299                 info->fb_map = NULL;
301                 if (info->pcie_heap_initialized) {
302                         drm_ati_pcigart_cleanup(dev, &info->gart_info);
303                 }
305                 if (info->fb_heap_initialized
306                     || info->pcie_heap_initialized) {
307                         drm_sman_cleanup(&info->sman);
309                         info->fb_heap_initialized = false;
310                         info->pcie_heap_initialized = false;
311                 }
312         }
316 void xgi_reclaim_buffers_locked(struct drm_device * dev,
317                                 struct drm_file * filp)
319         struct xgi_info * info = dev->dev_private;
321         mutex_lock(&info->dev->struct_mutex);
322         if (drm_sman_owner_clean(&info->sman, (unsigned long) filp)) {
323                 mutex_unlock(&info->dev->struct_mutex);
324                 return;
325         }
327         if (dev->driver->dma_quiescent) {
328                 dev->driver->dma_quiescent(dev);
329         }
331         drm_sman_owner_cleanup(&info->sman, (unsigned long) filp);
332         mutex_unlock(&info->dev->struct_mutex);
333         return;
337 /*
338  * driver receives an interrupt if someone waiting, then hand it off.
339  */
340 irqreturn_t xgi_kern_isr(DRM_IRQ_ARGS)
342         struct drm_device *dev = (struct drm_device *) arg;
343         struct xgi_info *info = dev->dev_private;
344         const u32 irq_bits = le32_to_cpu(DRM_READ32(info->mmio_map,
345                                         (0x2800
346                                          + M2REG_AUTO_LINK_STATUS_ADDRESS)))
347                 & (M2REG_ACTIVE_TIMER_INTERRUPT_MASK
348                    | M2REG_ACTIVE_INTERRUPT_0_MASK
349                    | M2REG_ACTIVE_INTERRUPT_2_MASK
350                    | M2REG_ACTIVE_INTERRUPT_3_MASK);
353         if (irq_bits != 0) {
354                 DRM_WRITE32(info->mmio_map,
355                             0x2800 + M2REG_AUTO_LINK_SETTING_ADDRESS,
356                             cpu_to_le32(M2REG_AUTO_LINK_SETTING_COMMAND | irq_bits));
357                 DRM_WAKEUP(&info->fence_queue);
358                 return IRQ_HANDLED;
359         } else {
360                 return IRQ_NONE;
361         }
365 int xgi_kern_isr_postinstall(struct drm_device * dev)
367         struct xgi_info *info = dev->dev_private;
369         DRM_INIT_WAITQUEUE(&info->fence_queue);
370         return 0;
374 int xgi_driver_load(struct drm_device *dev, unsigned long flags)
376         struct xgi_info *info = drm_alloc(sizeof(*info), DRM_MEM_DRIVER);
377         int err;
379         if (!info)
380                 return -ENOMEM;
382         (void) memset(info, 0, sizeof(*info));
383         dev->dev_private = info;
384         info->dev = dev;
386         info->mmio.base = drm_get_resource_start(dev, 1);
387         info->mmio.size = drm_get_resource_len(dev, 1);
389         DRM_INFO("mmio base: 0x%lx, size: 0x%x\n",
390                  (unsigned long) info->mmio.base, info->mmio.size);
393         if ((info->mmio.base == 0) || (info->mmio.size == 0)) {
394                 DRM_ERROR("mmio appears to be wrong: 0x%lx 0x%x\n",
395                           (unsigned long) info->mmio.base, info->mmio.size);
396                 err = -EINVAL;
397                 goto fail;
398         }
401         info->fb.base = drm_get_resource_start(dev, 0);
402         info->fb.size = drm_get_resource_len(dev, 0);
404         DRM_INFO("fb   base: 0x%lx, size: 0x%x\n",
405                  (unsigned long) info->fb.base, info->fb.size);
408         err = drm_sman_init(&info->sman, 2, 12, 8);
409         if (err) {
410                 goto fail;
411         }
414         return 0;
416 fail:
417         drm_free(info, sizeof(*info), DRM_MEM_DRIVER);
418         return err;
421 int xgi_driver_unload(struct drm_device *dev)
423         struct xgi_info * info = dev->dev_private;
425         drm_sman_takedown(&info->sman);
426         drm_free(info, sizeof(*info), DRM_MEM_DRIVER);
427         dev->dev_private = NULL;
429         return 0;