intel: query for LLC support

[glsdk/libdrm.git] / intel / intel_bufmgr_gem.c

diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 55ff5ab2c35e071e4665ca802623f5b597184c13..187e8ec9ca8684b5c99cbcb50f72fd095fbe2879 100644 (file)
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -107,6 +107,7 @@ typedef struct _drm_intel_bufmgr_gem {
        unsigned int has_bsd : 1;
        unsigned int has_blt : 1;
        unsigned int has_relaxed_fencing : 1;
+       unsigned int has_llc : 1;
        unsigned int bo_reuse : 1;
        bool fenced_relocs;
 } drm_intel_bufmgr_gem;
@@ -284,7 +285,8 @@ drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem,
                return ALIGN(pitch, 64);
 
        if (*tiling_mode == I915_TILING_X
-                       || (IS_915(bufmgr_gem) && *tiling_mode == I915_TILING_Y))
+                       || (IS_915(bufmgr_gem->pci_device)
+                           && *tiling_mode == I915_TILING_Y))
                tile_width = 512;
        else
                tile_width = 128;
@@ -772,10 +774,11 @@ drm_intel_gem_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name,
                aligned_y = y;
                height_alignment = 2;
 
-               if (IS_GEN2(bufmgr_gem) && tiling != I915_TILING_NONE)
+               if ((bufmgr_gem->gen == 2) && tiling != I915_TILING_NONE)
                        height_alignment = 16;
                else if (tiling == I915_TILING_X
-                       || (IS_915(bufmgr_gem) && tiling == I915_TILING_Y))
+                       || (IS_915(bufmgr_gem->pci_device)
+                           && tiling == I915_TILING_Y))
                        height_alignment = 8;
                else if (tiling == I915_TILING_Y)
                        height_alignment = 32;
@@ -958,7 +961,7 @@ static void drm_intel_gem_bo_purge_vma_cache(drm_intel_bufmgr_gem *bufmgr_gem)
                                      bufmgr_gem->vma_cache.next,
                                      vma_list);
                assert(bo_gem->map_count == 0);
-               DRMLISTDEL(&bo_gem->vma_list);
+               DRMLISTDELINIT(&bo_gem->vma_list);
 
                if (bo_gem->mem_virtual) {
                        munmap(bo_gem->mem_virtual, bo_gem->bo.size);
@@ -1098,8 +1101,8 @@ static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable)
        if (!bo_gem->mem_virtual) {
                struct drm_i915_gem_mmap mmap_arg;
 
-               DBG("bo_map: %d (%s)\n", bo_gem->gem_handle, bo_gem->name);
-               assert(bo_gem->map_count == 1);
+               DBG("bo_map: %d (%s), map_count=%d\n",
+                   bo_gem->gem_handle, bo_gem->name, bo_gem->map_count);
 
                memset(&mmap_arg, 0, sizeof(mmap_arg));
                mmap_arg.handle = bo_gem->gem_handle;
@@ -1163,9 +1166,8 @@ int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo)
        if (bo_gem->gtt_virtual == NULL) {
                struct drm_i915_gem_mmap_gtt mmap_arg;
 
-               DBG("bo_map_gtt: mmap %d (%s)\n", bo_gem->gem_handle,
-                   bo_gem->name);
-               assert(bo_gem->map_count == 1);
+               DBG("bo_map_gtt: mmap %d (%s), map_count=%d\n",
+                   bo_gem->gem_handle, bo_gem->name, bo_gem->map_count);
 
                memset(&mmap_arg, 0, sizeof(mmap_arg));
                mmap_arg.handle = bo_gem->gem_handle;
@@ -1180,6 +1182,8 @@ int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo)
                            __FILE__, __LINE__,
                            bo_gem->gem_handle, bo_gem->name,
                            strerror(errno));
+                       if (--bo_gem->map_count == 0)
+                               drm_intel_gem_bo_close_vma(bufmgr_gem, bo_gem);
                        pthread_mutex_unlock(&bufmgr_gem->lock);
                        return ret;
                }
@@ -1237,7 +1241,14 @@ static int drm_intel_gem_bo_unmap(drm_intel_bo *bo)
 
        pthread_mutex_lock(&bufmgr_gem->lock);
 
-       assert(bo_gem->map_count > 0);
+       if (bo_gem->map_count <= 0) {
+               DBG("attempted to unmap an unmapped bo\n");
+               pthread_mutex_unlock(&bufmgr_gem->lock);
+               /* Preserve the old behaviour of just treating this as a
+                * no-op rather than reporting the error.
+                */
+               return 0;
+       }
 
        if (bo_gem->mapped_cpu_write) {
                /* Cause a flush to happen if the buffer's pinned for
@@ -2305,16 +2316,23 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
                fprintf(stderr, "param: %d, val: %d\n", gp.param, *gp.value);
        }
 
-       if (IS_GEN2(bufmgr_gem))
+       if (IS_GEN2(bufmgr_gem->pci_device))
                bufmgr_gem->gen = 2;
-       else if (IS_GEN3(bufmgr_gem))
+       else if (IS_GEN3(bufmgr_gem->pci_device))
                bufmgr_gem->gen = 3;
-       else if (IS_GEN4(bufmgr_gem))
+       else if (IS_GEN4(bufmgr_gem->pci_device))
                bufmgr_gem->gen = 4;
-       else
+       else if (IS_GEN5(bufmgr_gem->pci_device))
+               bufmgr_gem->gen = 5;
+       else if (IS_GEN6(bufmgr_gem->pci_device))
                bufmgr_gem->gen = 6;
+       else if (IS_GEN7(bufmgr_gem->pci_device))
+               bufmgr_gem->gen = 7;
+       else
+               assert(0);
 
-       if (IS_GEN3(bufmgr_gem) && bufmgr_gem->gtt_size > 256*1024*1024) {
+       if (IS_GEN3(bufmgr_gem->pci_device) &&
+           bufmgr_gem->gtt_size > 256*1024*1024) {
                /* The unmappable part of gtt on gen 3 (i.e. above 256MB) can't
                 * be used for tiled blits. To simplify the accounting, just
                 * substract the unmappable part (fixed to 256MB on all known
@@ -2341,6 +2359,17 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
        ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
        bufmgr_gem->has_relaxed_fencing = ret == 0;
 
+       gp.param = I915_PARAM_HAS_LLC;
+       ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
+       if (ret == -EINVAL) {
+               /* Kernel does not supports HAS_LLC query, fallback to GPU
+                * generation detection and assume that we have LLC on GEN6/7
+                */
+               bufmgr_gem->has_llc = (IS_GEN6(bufmgr_gem->pci_device) |
+                               IS_GEN7(bufmgr_gem->pci_device));
+       } else
+               bufmgr_gem->has_llc = ret == 0;
+
        if (bufmgr_gem->gen < 4) {
                gp.param = I915_PARAM_NUM_FENCES_AVAIL;
                gp.value = &bufmgr_gem->available_fences;