radeon: Memory footprint of SI mipmap base level is padded to powers of two.
authorMichel Dänzer <michel.daenzer@amd.com>
Tue, 4 Sep 2012 16:53:55 +0000 (18:53 +0200)
committerMichel Dänzer <michel@daenzer.net>
Thu, 6 Sep 2012 13:24:44 +0000 (15:24 +0200)
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
radeon/radeon_surface.c

index 593c51c674d3483411ef51e89f2f313ca1ddbea8..98faa0b98c25cbaae65a78a312a363b81d1a23b6 100644 (file)
@@ -963,9 +963,16 @@ static void si_surf_minify_linear_aligned(struct radeon_surface *surf,
     surf->level[level].npix_x = mip_minify(surf->npix_x, level);
     surf->level[level].npix_y = mip_minify(surf->npix_y, level);
     surf->level[level].npix_z = mip_minify(surf->npix_z, level);
-    surf->level[level].nblk_x = (surf->level[level].npix_x + surf->blk_w - 1) / surf->blk_w;
-    surf->level[level].nblk_y = (surf->level[level].npix_y + surf->blk_h - 1) / surf->blk_h;
-    surf->level[level].nblk_z = (surf->level[level].npix_z + surf->blk_d - 1) / surf->blk_d;
+
+    if (level == 0 && surf->last_level > 0) {
+        surf->level[level].nblk_x = (next_power_of_two(surf->level[level].npix_x) + surf->blk_w - 1) / surf->blk_w;
+        surf->level[level].nblk_y = (next_power_of_two(surf->level[level].npix_y) + surf->blk_h - 1) / surf->blk_h;
+        surf->level[level].nblk_z = (next_power_of_two(surf->level[level].npix_z) + surf->blk_d - 1) / surf->blk_d;
+    } else {
+        surf->level[level].nblk_x = (surf->level[level].npix_x + surf->blk_w - 1) / surf->blk_w;
+        surf->level[level].nblk_y = (surf->level[level].npix_y + surf->blk_h - 1) / surf->blk_h;
+        surf->level[level].nblk_z = (surf->level[level].npix_z + surf->blk_d - 1) / surf->blk_d;
+    }
 
     /* XXX: Second smallest level uses larger pitch, not sure of the real reason,
      * my best guess so far: rows evenly distributed across slice