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raw | patch | inline | side by side (parent: 73a42a6)
raw | patch | inline | side by side (parent: 73a42a6)
author | Zou Nan hai <nanhai.zou@intel.com> | |
Wed, 2 Jun 2010 02:07:37 +0000 (10:07 +0800) | ||
committer | Eric Anholt <eric@anholt.net> | |
Sun, 6 Jun 2010 22:50:38 +0000 (15:50 -0700) |
This introduces a new API to exec on BSD ring buffer, for H.264 VLD
decoding.
Signed-off-by: Xiang Hai hao <haihao.xiang@intel.com>
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
decoding.
Signed-off-by: Xiang Hai hao <haihao.xiang@intel.com>
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index c8cb3a67eeb6ab00c611944912d28dd15c0733b2..c040afac5409dc6a3d79ecff56512dac4cc6c67f 100644 (file)
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
#define I915_PARAM_HAS_OVERLAY 7
#define I915_PARAM_HAS_PAGEFLIPPING 8
#define I915_PARAM_HAS_EXECBUF2 9
+#define I915_PARAM_HAS_BSD 10
typedef struct drm_i915_getparam {
int param;
__u32 num_cliprects;
/** This is a struct drm_clip_rect *cliprects */
__u64 cliprects_ptr;
- __u64 flags; /* currently unused */
+#define I915_EXEC_RENDER (1 << 0)
+#define I915_EXEC_BSD (1 << 1)
+ __u64 flags;
__u64 rsvd1;
__u64 rsvd2;
};
diff --git a/intel/intel_bufmgr.c b/intel/intel_bufmgr.c
index 9144fdd4732dc3eb4fd0ad1a84920468fadf5603..2b4e888304d42e6a4ab0bf6a638fc172198ef1e2 100644 (file)
--- a/intel/intel_bufmgr.c
+++ b/intel/intel_bufmgr.c
return bo->bufmgr->bo_exec(bo, used, cliprects, num_cliprects, DR4);
}
+int
+drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used,
+ drm_clip_rect_t *cliprects, int num_cliprects, int DR4,
+ int ring_flag)
+{
+ if (bo->bufmgr->bo_mrb_exec)
+ return bo->bufmgr->bo_mrb_exec(bo, used,
+ cliprects, num_cliprects, DR4,
+ ring_flag);
+
+ return -ENODEV;
+}
+
void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug)
{
bufmgr->debug = enable_debug;
diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h
index cbcddb651f2b0c4dd12b6420c14493cc8a9061db..65fd603a4723b73f8ab643c3b19a80336734f2c6 100644 (file)
--- a/intel/intel_bufmgr.h
+++ b/intel/intel_bufmgr.h
void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr);
int drm_intel_bo_exec(drm_intel_bo *bo, int used,
drm_clip_rect_t * cliprects, int num_cliprects, int DR4);
+int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used,
+ drm_clip_rect_t *cliprects, int num_cliprects, int DR4,
+ int ring_flag);
int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count);
int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
index b76fd7ed79bcbe3fc6e3bb46d12d281b44e4aa73..398c7d074f24b8b035f1bd00e3950cae70e8f9c8 100644 (file)
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
}
static int
-drm_intel_gem_bo_exec2(drm_intel_bo *bo, int used,
- drm_clip_rect_t *cliprects, int num_cliprects,
- int DR4)
+drm_intel_gem_bo_mrb_exec2(drm_intel_bo *bo, int used,
+ drm_clip_rect_t *cliprects, int num_cliprects, int DR4,
+ int ring_flag)
{
drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr;
struct drm_i915_gem_execbuffer2 execbuf;
int ret, i;
+ if ((ring_flag != I915_EXEC_RENDER) && (ring_flag != I915_EXEC_BSD))
+ return -EINVAL;
+
pthread_mutex_lock(&bufmgr_gem->lock);
/* Update indices and set up the validate list. */
drm_intel_gem_bo_process_reloc2(bo);
execbuf.num_cliprects = num_cliprects;
execbuf.DR1 = 0;
execbuf.DR4 = DR4;
- execbuf.flags = 0;
+ execbuf.flags = ring_flag;
execbuf.rsvd1 = 0;
execbuf.rsvd2 = 0;
return ret;
}
+static int
+drm_intel_gem_bo_exec2(drm_intel_bo *bo, int used,
+ drm_clip_rect_t *cliprects, int num_cliprects,
+ int DR4)
+{
+ return drm_intel_gem_bo_mrb_exec2(bo, used,
+ cliprects, num_cliprects, DR4,
+ I915_EXEC_RENDER);
+}
+
static int
drm_intel_gem_bo_pin(drm_intel_bo *bo, uint32_t alignment)
{
drm_i915_getparam_t gp;
int ret, i;
unsigned long size;
- int exec2 = 0;
+ int exec2 = 0, has_bsd = 0;
bufmgr_gem = calloc(1, sizeof(*bufmgr_gem));
if (bufmgr_gem == NULL)
if (!ret)
exec2 = 1;
+ gp.param = I915_PARAM_HAS_BSD;
+ ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
+ if (!ret)
+ has_bsd = 1;
+
if (bufmgr_gem->gen < 4) {
gp.param = I915_PARAM_NUM_FENCES_AVAIL;
gp.value = &bufmgr_gem->available_fences;
bufmgr_gem->bufmgr.bo_set_tiling = drm_intel_gem_bo_set_tiling;
bufmgr_gem->bufmgr.bo_flink = drm_intel_gem_bo_flink;
/* Use the new one if available */
- if (exec2)
+ if (exec2) {
bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec2;
- else
+ if (has_bsd)
+ bufmgr_gem->bufmgr.bo_mrb_exec = drm_intel_gem_bo_mrb_exec2;
+ } else
bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec;
bufmgr_gem->bufmgr.bo_busy = drm_intel_gem_bo_busy;
bufmgr_gem->bufmgr.bo_madvise = drm_intel_gem_bo_madvise;
index f987d97afa5750e444a9a6cd43d85228411aefb4..87e91e7f7aef61b2a013bd20f274b9a0057c6003 100644 (file)
drm_clip_rect_t *cliprects, int num_cliprects,
int DR4);
+ /** Executes the command buffer pointed to by bo on the selected
+ * ring buffer
+ */
+ int (*bo_mrb_exec) (drm_intel_bo *bo, int used,
+ drm_clip_rect_t *cliprects, int num_cliprects,
+ int DR4, int ring_flag);
+
/**
* Pin a buffer to the aperture and fix the offset until unpinned
*