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raw | patch | inline | side by side (parent: 481234f)
author | Alex Deucher <alexander.deucher@amd.com> | |
Tue, 5 Jun 2012 14:07:15 +0000 (10:07 -0400) | ||
committer | Alex Deucher <alexander.deucher@amd.com> | |
Tue, 5 Jun 2012 14:07:15 +0000 (10:07 -0400) |
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeon/r600_pci_ids.h | patch | blob | history |
diff --git a/radeon/r600_pci_ids.h b/radeon/r600_pci_ids.h
index 223029891097f75712af619af582d64d97d9c82a..989ec00af3a76a823357661dcf5a445e2d3834e1 100644 (file)
--- a/radeon/r600_pci_ids.h
+++ b/radeon/r600_pci_ids.h
CHIPSET(0x9807, PALM_9807, PALM)
CHIPSET(0x9808, PALM_9808, PALM)
CHIPSET(0x9809, PALM_9809, PALM)
+CHIPSET(0x980A, PALM_980A, PALM)
CHIPSET(0x9640, SUMO_9640, SUMO)
CHIPSET(0x9641, SUMO_9641, SUMO)
CHIPSET(0x9645, SUMO2_9645, SUMO2)
CHIPSET(0x9647, SUMO_9647, SUMO)
CHIPSET(0x9648, SUMO_9648, SUMO)
+CHIPSET(0x9649, SUMO_9649, SUMO)
CHIPSET(0x964a, SUMO_964A, SUMO)
CHIPSET(0x964b, SUMO_964B, SUMO)
CHIPSET(0x964c, SUMO_964C, SUMO)
CHIPSET(0x6738, BARTS_6738, BARTS)
CHIPSET(0x6739, BARTS_6739, BARTS)
CHIPSET(0x673E, BARTS_673E, BARTS)
+
CHIPSET(0x6740, TURKS_6740, TURKS)
CHIPSET(0x6741, TURKS_6741, TURKS)
CHIPSET(0x6742, TURKS_6742, TURKS)
CHIPSET(0x6747, TURKS_6747, TURKS)
CHIPSET(0x6748, TURKS_6748, TURKS)
CHIPSET(0x6749, TURKS_6749, TURKS)
+CHIPSET(0x674A, TURKS_674A, TURKS)
CHIPSET(0x6750, TURKS_6750, TURKS)
CHIPSET(0x6751, TURKS_6751, TURKS)
CHIPSET(0x6758, TURKS_6758, TURKS)
CHIPSET(0x6767, CAICOS_6767, CAICOS)
CHIPSET(0x6768, CAICOS_6768, CAICOS)
CHIPSET(0x6770, CAICOS_6770, CAICOS)
+CHIPSET(0x6771, CAICOS_6771, CAICOS)
CHIPSET(0x6772, CAICOS_6772, CAICOS)
CHIPSET(0x6778, CAICOS_6778, CAICOS)
CHIPSET(0x6779, CAICOS_6779, CAICOS)
CHIPSET(0x9901, ARUBA_9901, ARUBA)
CHIPSET(0x9903, ARUBA_9903, ARUBA)
CHIPSET(0x9904, ARUBA_9904, ARUBA)
+CHIPSET(0x9905, ARUBA_9905, ARUBA)
+CHIPSET(0x9906, ARUBA_9906, ARUBA)
+CHIPSET(0x9907, ARUBA_9907, ARUBA)
+CHIPSET(0x9908, ARUBA_9908, ARUBA)
+CHIPSET(0x9909, ARUBA_9909, ARUBA)
+CHIPSET(0x990A, ARUBA_990A, ARUBA)
CHIPSET(0x990F, ARUBA_990F, ARUBA)
+CHIPSET(0x9910, ARUBA_9910, ARUBA)
+CHIPSET(0x9913, ARUBA_9913, ARUBA)
+CHIPSET(0x9917, ARUBA_9917, ARUBA)
+CHIPSET(0x9918, ARUBA_9918, ARUBA)
+CHIPSET(0x9919, ARUBA_9919, ARUBA)
CHIPSET(0x9990, ARUBA_9990, ARUBA)
CHIPSET(0x9991, ARUBA_9991, ARUBA)
+CHIPSET(0x9992, ARUBA_9992, ARUBA)
+CHIPSET(0x9993, ARUBA_9993, ARUBA)
+CHIPSET(0x9994, ARUBA_9994, ARUBA)
+CHIPSET(0x99A0, ARUBA_99A0, ARUBA)
+CHIPSET(0x99A2, ARUBA_99A2, ARUBA)
+CHIPSET(0x99A4, ARUBA_99A4, ARUBA)
CHIPSET(0x6780, TAHITI_6780, TAHITI)
CHIPSET(0x6784, TAHITI_6784, TAHITI)
-CHIPSET(0x6788, TAHITI_678A, TAHITI)
+CHIPSET(0x6788, TAHITI_6788, TAHITI)
CHIPSET(0x678A, TAHITI_678A, TAHITI)
CHIPSET(0x6790, TAHITI_6790, TAHITI)
CHIPSET(0x6798, TAHITI_6798, TAHITI)
CHIPSET(0x6799, TAHITI_6799, TAHITI)
-CHIPSET(0x679A, TAHITI_679E, TAHITI)
+CHIPSET(0x679A, TAHITI_679A, TAHITI)
CHIPSET(0x679E, TAHITI_679E, TAHITI)
CHIPSET(0x679F, TAHITI_679F, TAHITI)
CHIPSET(0x6820, VERDE_6820, VERDE)
CHIPSET(0x6821, VERDE_6821, VERDE)
-CHIPSET(0x6823, VERDE_6824, VERDE)
+CHIPSET(0x6823, VERDE_6823, VERDE)
CHIPSET(0x6824, VERDE_6824, VERDE)
CHIPSET(0x6825, VERDE_6825, VERDE)
-CHIPSET(0x6826, VERDE_6825, VERDE)
+CHIPSET(0x6826, VERDE_6826, VERDE)
CHIPSET(0x6827, VERDE_6827, VERDE)
CHIPSET(0x6828, VERDE_6828, VERDE)
CHIPSET(0x6829, VERDE_6829, VERDE)
+CHIPSET(0x682B, VERDE_682B, VERDE)
CHIPSET(0x682D, VERDE_682D, VERDE)
CHIPSET(0x682F, VERDE_682F, VERDE)
CHIPSET(0x6830, VERDE_6830, VERDE)
CHIPSET(0x6831, VERDE_6831, VERDE)
-CHIPSET(0x6837, VERDE_6831, VERDE)
+CHIPSET(0x6837, VERDE_6837, VERDE)
CHIPSET(0x6838, VERDE_6838, VERDE)
CHIPSET(0x6839, VERDE_6839, VERDE)
CHIPSET(0x683B, VERDE_683B, VERDE)