nouveau: silence some remaining valgrind warnings
Valgrind can't understand some of the fields passed to ioctls are overwritten
by kernel, so we need to initialize them. Almost all of our ioctl wrappers
already do it and the cost of remaining 3 is very small.
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Valgrind can't understand some of the fields passed to ioctls are overwritten
by kernel, so we need to initialize them. Almost all of our ioctl wrappers
already do it and the cost of remaining 3 is very small.
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
modetest: support plane properties
Add support to display plane properties.
Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Add support to display plane properties.
Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
modetest: support bitmask properties
Add support to display bitmask properties.
Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Add support to display bitmask properties.
Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Add support for bitmask properties
A bitmask property is similar to an enum. The enum value is a bit
position (0-63), and valid property values consist of a mask of
zero or more of (1 << enum_val[n]).
Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
A bitmask property is similar to an enum. The enum value is a bit
position (0-63), and valid property values consist of a mask of
zero or more of (1 << enum_val[n]).
Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
modetest: print CRTC properties
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Rob Clark <rob@ti.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Rob Clark <rob@ti.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Add support for generic object properties IOCTLs
New library calls:
- drmModeObjectGetProperties
- drmModeFreeObjectProperties
- drmModeObjectSetProperties
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Rob Clark <rob@ti.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
New library calls:
- drmModeObjectGetProperties
- drmModeFreeObjectProperties
- drmModeObjectSetProperties
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Rob Clark <rob@ti.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
autogen.sh: Restore passing --enable-maintainer-mode to configure.
Otherwise build system files aren't automagically regenerated after updating
from Git.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Otherwise build system files aren't automagically regenerated after updating
from Git.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
configure: bump version for release
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeon: fall back to 1D tiling only with broken kernels
Certain cards report the the wrong bank setup which causes
surface init to fail in the ddx and leads to no accel.
If we hit an invalid tiling parameter, just set a default
value and disable 2D tiling.
Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=43448
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Certain cards report the the wrong bank setup which causes
surface init to fail in the ddx and leads to no accel.
If we hit an invalid tiling parameter, just set a default
value and disable 2D tiling.
Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=43448
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
intel: wait render header updates
make headers_install in kernel. Copy to here.
v2: signed ns_timeout
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
make headers_install in kernel. Copy to here.
v2: signed ns_timeout
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
intel: sanitize i915_drm.h
run make headers_isntall on d-i-n, copy to here
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
run make headers_isntall on d-i-n, copy to here
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
radeon: add new pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeon: Add Southern Islands PCI IDs.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
libdrm: add exynos drm support
this patch adds libdrm_exynos helper layer that inclues some intefaces
for exynos specific gem and virtual display driver and also adds exynos
module name to modtest and vbltest.
Changelog v2:
- fixed exynos broken ioctl.
the pointer of uint64_t *edid should be removed.
- removed unnecessary definitions.
- added drm prime interfaces.
this feature is used to share a buffer between drivers or memory managers
and for this, please, refer to below links:
http://www.mjmwired.net/kernel/Documentation/dma-buf-sharing.txt
http://lwn.net/Articles/488664/
this patch is based on a link below:
git://anongit.freedesktop.org/mesa/drm
commit id: d72a44c7c4f5eea9c1e5bb0c36cb9e0224b9ca22
Reviewed-by: Rob Clark <rob@ti.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Rob Clark <rob@ti.com>
this patch adds libdrm_exynos helper layer that inclues some intefaces
for exynos specific gem and virtual display driver and also adds exynos
module name to modtest and vbltest.
Changelog v2:
- fixed exynos broken ioctl.
the pointer of uint64_t *edid should be removed.
- removed unnecessary definitions.
- added drm prime interfaces.
this feature is used to share a buffer between drivers or memory managers
and for this, please, refer to below links:
http://www.mjmwired.net/kernel/Documentation/dma-buf-sharing.txt
http://lwn.net/Articles/488664/
this patch is based on a link below:
git://anongit.freedesktop.org/mesa/drm
commit id: d72a44c7c4f5eea9c1e5bb0c36cb9e0224b9ca22
Reviewed-by: Rob Clark <rob@ti.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Rob Clark <rob@ti.com>
configure: Bump version for 2.4.34.
intel: Add the ability to supply annotations for .aub files.
This patch adds a new function,
drm_intel_bufmgr_gem_set_aub_annotations(), which can be used to
annotate the type and subtype of data stored in various sections of
each buffer. This data is used to populate type and subtype fields
when generating the .aub file, which improves the ability of later
debugging tools to analyze the contents of the .aub file.
If drm_intel_bufmgr_gem_set_aub_annotations() is not called, then we
fall back to the old set of annotations (annotate the portion of the
batchbuffer that is executed as AUB_TRACE_TYPE_BATCH, and everything
else as AUB_TRACE_TYPE_NOTYPE).
Reviewed-by: Eric Anholt <eric@anholt.net>
This patch adds a new function,
drm_intel_bufmgr_gem_set_aub_annotations(), which can be used to
annotate the type and subtype of data stored in various sections of
each buffer. This data is used to populate type and subtype fields
when generating the .aub file, which improves the ability of later
debugging tools to analyze the contents of the .aub file.
If drm_intel_bufmgr_gem_set_aub_annotations() is not called, then we
fall back to the old set of annotations (annotate the portion of the
batchbuffer that is executed as AUB_TRACE_TYPE_BATCH, and everything
else as AUB_TRACE_TYPE_NOTYPE).
Reviewed-by: Eric Anholt <eric@anholt.net>
radeon: Add new R600 PCI ids for surface manager
This is the same list of PCI ids added by Alex Deucher in xf86-video-ati commit
aacbd629b02cbee3f9e6a0ee452b4e3f21376bd3.
This is needed since the addition of the surface allocator helper in
commit c51f7f0e460dcadb9f1a56ecf1615810877c33c8 ; it needs to differentiate
pre and post-R600 GPUs.
Therefore we should maintain another PCI id list.
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=48138
Signed-off-by: Anisse Astier <anisse@astier.eu>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This is the same list of PCI ids added by Alex Deucher in xf86-video-ati commit
aacbd629b02cbee3f9e6a0ee452b4e3f21376bd3.
This is needed since the addition of the surface allocator helper in
commit c51f7f0e460dcadb9f1a56ecf1615810877c33c8 ; it needs to differentiate
pre and post-R600 GPUs.
Therefore we should maintain another PCI id list.
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=48138
Signed-off-by: Anisse Astier <anisse@astier.eu>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
modetest: print more about our properties
In the future we'll have more than just connector properties, so create
a dump_prop function that can handle any property (instead of the
current dump_props function that only handles connector properties).
Also, make this function print a lot more information about the existing
properties.
Also change the printed indentation of the modes to make the output more
readable.
The previous function dump_props also segfaulted when we didn't have
enought permissions. The new function does not segfault in this case (by
checking for the return value of drmModeGetProperty).
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
In the future we'll have more than just connector properties, so create
a dump_prop function that can handle any property (instead of the
current dump_props function that only handles connector properties).
Also, make this function print a lot more information about the existing
properties.
Also change the printed indentation of the modes to make the output more
readable.
The previous function dump_props also segfaulted when we didn't have
enought permissions. The new function does not segfault in this case (by
checking for the return value of drmModeGetProperty).
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
modetest: call drmModeFreePlaneResources
24 (16 direct, 8 indirect) bytes in 1 blocks are definitely lost in loss record 2 of 7
at 0x402994D: malloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x4A25950: drmMalloc (xf86drm.c:147)
by 0x4A2E26D: drmModeGetPlaneResources (xf86drmMode.c:951)
by 0x4025FF: dump_planes (modetest.c:276)
by 0x4052AF: main (modetest.c:1120)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
24 (16 direct, 8 indirect) bytes in 1 blocks are definitely lost in loss record 2 of 7
at 0x402994D: malloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x4A25950: drmMalloc (xf86drm.c:147)
by 0x4A2E26D: drmModeGetPlaneResources (xf86drmMode.c:951)
by 0x4025FF: dump_planes (modetest.c:276)
by 0x4052AF: main (modetest.c:1120)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
modetest: fix drmModeGetConnector memory leak
Don't "continue" without freeing the connector.
192 bytes in 6 blocks are indirectly lost in loss record 6 of 12
at 0x4C2779D: malloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x4E30DD8: drmMalloc (xf86drm.c:147)
by 0x4E35024: drmAllocCpy (xf86drmMode.c:73)
by 0x4E35D69: drmModeGetConnector (xf86drmMode.c:507)
by 0x402F22: dump_connectors (modetest.c:181)
by 0x40261B: main (modetest.c:801)
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Don't "continue" without freeing the connector.
192 bytes in 6 blocks are indirectly lost in loss record 6 of 12
at 0x4C2779D: malloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x4E30DD8: drmMalloc (xf86drm.c:147)
by 0x4E35024: drmAllocCpy (xf86drmMode.c:73)
by 0x4E35D69: drmModeGetConnector (xf86drmMode.c:507)
by 0x402F22: dump_connectors (modetest.c:181)
by 0x40261B: main (modetest.c:801)
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
modetest: fix some compiler warnings
Use unsigned int instead of int:
- modetest.c:90:1: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:98:1: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:118:1: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:286:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:303:17: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:694:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:1088:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
The 'fd' variable is global, we don't need to pass it as an argument:
- modetest.c:998:40: warning: unused parameter ‘fd’ [-Wunused-parameter]
We don't use the 'modeset' variable:
- modetest.c:1025:8: warning: variable ‘modeset’ set but not used [-Wunused-but-set-variable]
V2: rebase, clear some more warnings
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Use unsigned int instead of int:
- modetest.c:90:1: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:98:1: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:118:1: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:286:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:303:17: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:694:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:1088:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
The 'fd' variable is global, we don't need to pass it as an argument:
- modetest.c:998:40: warning: unused parameter ‘fd’ [-Wunused-parameter]
We don't use the 'modeset' variable:
- modetest.c:1025:8: warning: variable ‘modeset’ set but not used [-Wunused-but-set-variable]
V2: rebase, clear some more warnings
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
nouveau: fix channel closing
Restore code lost in libdrm_nouveau rewrite.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Restore code lost in libdrm_nouveau rewrite.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
nouveau: expose notifier handle on nvc0 as well
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
nouveau: remove unnecessary EAGAIN loops
drmCommandWrite / drmCommandWriteRead already loop on EAGAIN.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drmCommandWrite / drmCommandWriteRead already loop on EAGAIN.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
nouveau: init nvc0 channel alloc req structure fully
Kernel rejects ~0 handles, even though they're not used on NVC0.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Kernel rejects ~0 handles, even though they're not used on NVC0.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
nouveau: pull in major libdrm rewrite
Redesigned primarily to allow us to better take advantage of BO's having
fixed GPU virtual addresses on GeForce 8 and up, and to reduce the overhead
of handling relocations on earlier chipsets.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Redesigned primarily to allow us to better take advantage of BO's having
fixed GPU virtual addresses on GeForce 8 and up, and to reduce the overhead
of handling relocations on earlier chipsets.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
lists: add nicer+unsafe foreach, and list join macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
omap: add dmabuf support
Signed-off-by: Rob Clark <rob@ti.com>
Signed-off-by: Rob Clark <rob@ti.com>
libdrm: update drm headers from kernel for prime/dmabuf
Sync drm.h with from kernel headers for the new PRIME_HANDLE_TO_FD
and PRIME_FD_TO_HANDLE ioctls from Dave Airlie's "drm: base prime/
dma-buf support (v5)" kernel patch.
Signed-off-by: Rob Clark <rob@ti.com>
Sync drm.h with from kernel headers for the new PRIME_HANDLE_TO_FD
and PRIME_FD_TO_HANDLE ioctls from Dave Airlie's "drm: base prime/
dma-buf support (v5)" kernel patch.
Signed-off-by: Rob Clark <rob@ti.com>
modetest: fix typo
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rob Clark <rob@ti.com>
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rob Clark <rob@ti.com>
modetest: add AR15/XR15 (RGB-1555) formats
Signed-off-by: Rob Clark <rob@ti.com>
Signed-off-by: Rob Clark <rob@ti.com>
modetest: add YUV and multi-planar support
Signed-off-by: Rob Clark <rob@ti.com>
Signed-off-by: Rob Clark <rob@ti.com>
modetest: add drm_plane support
Signed-off-by: Rob Clark <rob@ti.com>
Signed-off-by: Rob Clark <rob@ti.com>
omap: fix compiler warning
When compiling with linaro toolchain version 4.6.2 got this warning.
CC omap_drm.lo
omap_drm.c: In function 'omap_bo_new_impl':
omap_drm.c:139:6: warning: 'bo' may be used uninitialized in this function [-Wuninitialized]
This patch initialize bo to NULL avoiding the warning.
Signed-off-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
Signed-off-by: Rob Clark <rob@ti.com>
When compiling with linaro toolchain version 4.6.2 got this warning.
CC omap_drm.lo
omap_drm.c: In function 'omap_bo_new_impl':
omap_drm.c:139:6: warning: 'bo' may be used uninitialized in this function [-Wuninitialized]
This patch initialize bo to NULL avoiding the warning.
Signed-off-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
Signed-off-by: Rob Clark <rob@ti.com>
omap: fix license header
In syncing with the corresponding kernel header, the wrong license
header was inadvertantly copied over. The intention was for the
userspace headers to have a MIT license following the convention
of the rest of libdrm, xorg, etc.
Signed-off-by: Rob Clark <rob@ti.com>
In syncing with the corresponding kernel header, the wrong license
header was inadvertantly copied over. The intention was for the
userspace headers to have a MIT license following the convention
of the rest of libdrm, xorg, etc.
Signed-off-by: Rob Clark <rob@ti.com>
intel/decode: decode MI_WAIT_FOR_EVENT
... and add support to decode MI instructions with functions.
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
... and add support to decode MI instructions with functions.
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
intel: add Ivy Bridge GT2 server variant
We were missing this one and it is being used by Bromolow.
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
We were missing this one and it is being used by Bromolow.
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
configure: Bump version for 2.4.33
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
omap: add omapdrm support
This adds libdrm_omap helper layer (as used by xf86-video-omap,
omapdrmtest, etc).
Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
[danvet: pushed for Rob, he doesn't yet have commit access.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This adds libdrm_omap helper layer (as used by xf86-video-omap,
omapdrmtest, etc).
Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
[danvet: pushed for Rob, he doesn't yet have commit access.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
intel: Add some PCI IDs for Haswell.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
radeon: add TN surface support
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
configure: Bump version for 2.4.32.
intel: Quiet two more valgrind complaints with recent changes.
These are more cases where valgrind doesn't understand what gets read
or written by our ioctls.
These are more cases where valgrind doesn't understand what gets read
or written by our ioctls.
intel: Add per-dword decode of gen7 3DPRIMITIVE.
intel: Move the gen4-6 3DPRIMITIVE handling out of the switch statement.
intel: Add support for (possibly) unsynchronized maps.
This improves the performance of Mesa's GL_MAP_UNSYNCHRONIZED_BIT path
in GL_ARB_map_buffer_range. Improves Unigine Tropics performance at
1024x768 by 2.30482% +/- 0.0492146% (n=61)
v2: Fix comment grammar.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
This improves the performance of Mesa's GL_MAP_UNSYNCHRONIZED_BIT path
in GL_ARB_map_buffer_range. Improves Unigine Tropics performance at
1024x768 by 2.30482% +/- 0.0492146% (n=61)
v2: Fix comment grammar.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
intel: Fix error check for I915_PARAM_HAS_LLC.
drmIoctl returns -1 on error with errno set to the error value. Other
users of it in this file just check for != 0, and only use errno when
they need to send an error value on to the caller of the API.
drmIoctl returns -1 on error with errno set to the error value. Other
users of it in this file just check for != 0, and only use errno when
they need to send an error value on to the caller of the API.
intel: Bump the copyright dates on the bufmgr files.
We've been hacking these constantly.
We've been hacking these constantly.
intel: Add .aub file output support.
This will allow the driver to capture all of its execution state to a
file for later debugging. intel_gpu_dump is limited in that it only
captures batchbuffers, and Mesa's captures, while more complete, still
capture only a portion of the state involved in execution.
This is a squash commit of a long series of hacking as we tried to get
the resulting traces to work in the internal simulator. It contains
contributions by Yuanhan Liu and Kenneth Graunke.
v2: Drop the MI_FLUSH_ENABLE setup.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
This will allow the driver to capture all of its execution state to a
file for later debugging. intel_gpu_dump is limited in that it only
captures batchbuffers, and Mesa's captures, while more complete, still
capture only a portion of the state involved in execution.
This is a squash commit of a long series of hacking as we tried to get
the resulting traces to work in the internal simulator. It contains
contributions by Yuanhan Liu and Kenneth Graunke.
v2: Drop the MI_FLUSH_ENABLE setup.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
intel: Add support for overriding the PCI ID via an environment variable
For example:
export INTEL_DEVID_OVERRIDE=0x162
If this variable is set, don't actually submit the batchbuffer to the
GPU, it probably contains commands for the wrong generation of hardware.
v2: Introduce a getter for the overridden devid, and avoid getenv per exec.
Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
For example:
export INTEL_DEVID_OVERRIDE=0x162
If this variable is set, don't actually submit the batchbuffer to the
GPU, it probably contains commands for the wrong generation of hardware.
v2: Introduce a getter for the overridden devid, and avoid getenv per exec.
Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
xf86drmMode.h: Add header protection
xf86drmMode.h is missing a header protection. xf86drm.h has one so just
copy it and adjust the name.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: David Herrmann <dh.herrmann@googlemail.com>
xf86drmMode.h is missing a header protection. xf86drm.h has one so just
copy it and adjust the name.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: David Herrmann <dh.herrmann@googlemail.com>
Make drm/drm_fourcc.h portable to non-linux platforms
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Don't require pciaccess if Intel is disabled
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Matt Turner <mattst88@gmail.com>
intel: Import a new batchbuffer for the gen7 test.
This one doesn't have the 3DSTATE_HIER_DEPTH_BUFFER bug that the
previous one did.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This one doesn't have the 3DSTATE_HIER_DEPTH_BUFFER bug that the
previous one did.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
intel: Add decode for gen7 HIER_DEPTH_BUFFER.
Note that the regression test complains here: The batch that was
captured included a bug in its packet output, which was later fixed in
Mesa.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Note that the regression test complains here: The batch that was
captured included a bug in its packet output, which was later fixed in
Mesa.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
intel: Add decode for gen7 3DSTATE_WM.
This requires pulling the gen6 3DSTATE_WM out to a function so it
doesn't override gen7's handler.
v2: Fix pasteo in interpreting ZW interpolation (thanks danvet!).
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This requires pulling the gen6 3DSTATE_WM out to a function so it
doesn't override gen7's handler.
v2: Fix pasteo in interpreting ZW interpolation (thanks danvet!).
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
intel: Fix a typo in decode error message.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
intel: Detect cache domain inconsistency with valgrind
Every access to either the GTT or CPU pointer is supposed to be
proceeded by a set_domain ioctl so that GEM is able to manage the cache
domains correctly and for the following access to be coherent. Of
course, some people explicitly want incoherent, non-blocking access
which is going to trigger warnings by this patch but are probably better
served by explicit suppression.
v2: Also mark the pointers as inaccessible following the explicit unmap
and implicit unmap upon return to the cache.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Every access to either the GTT or CPU pointer is supposed to be
proceeded by a set_domain ioctl so that GEM is able to manage the cache
domains correctly and for the following access to be coherent. Of
course, some people explicitly want incoherent, non-blocking access
which is going to trigger warnings by this patch but are probably better
served by explicit suppression.
v2: Also mark the pointers as inaccessible following the explicit unmap
and implicit unmap upon return to the cache.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
radeon: fix pitch alignment for scanout buffer
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
configure: Fix pkg-config test in absence of valgrind
The empty string used for the not case is replaced by the default
if-else clause and so causes the configure to fail in the absence of
valgrind. Which is not quite what was intended.
Instead use the common idiom of setting a variable depending on whether
the true or false branch is taken and emit the conditional code as a
second step.
Reported-by: Tobias Jakobi <liquid.acid@gmx.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
The empty string used for the not case is replaced by the default
if-else clause and so causes the configure to fail in the absence of
valgrind. Which is not quite what was intended.
Instead use the common idiom of setting a variable depending on whether
the true or false branch is taken and emit the conditional code as a
second step.
Reported-by: Tobias Jakobi <liquid.acid@gmx.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
intel: Mark up with valgrind intrinsics to reduce false positives
In particular, declare the hidden CPU mmaps to valgrind so that it knows
about those memory regions.
v2: Add an additional VG_CLEAR for the getparam
References: https://bugs.freedesktop.org/show_bug.cgi?id=35071
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
[anholt: Ideally valgrind should just learn about the ioctls, and
removing the clear for the non-valgrindified code feels risky.]
Reviewed-by: Eric Anholt <eric@anholt.net>
In particular, declare the hidden CPU mmaps to valgrind so that it knows
about those memory regions.
v2: Add an additional VG_CLEAR for the getparam
References: https://bugs.freedesktop.org/show_bug.cgi?id=35071
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
[anholt: Ideally valgrind should just learn about the ioctls, and
removing the clear for the non-valgrindified code feels risky.]
Reviewed-by: Eric Anholt <eric@anholt.net>
radeon_cs_setup_bo: Fix accounting if caller specified write and read domains.
Only account for the write domain in that case.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=43893 .
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Only account for the write domain in that case.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=43893 .
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
configure: Bump version for 2.4.31
radeon: add r600_pci_ids.h to header file
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
radeon: fix surface API for good before anyone start relying on it
The mipmap level computation was wrong, we need to know the block
width, height, depth of compressed texture to properly compute this.
Change API to provide block width, height, depth instead of nblk_x,
nblk_y, nblk_z.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
The mipmap level computation was wrong, we need to know the block
width, height, depth of compressed texture to properly compute this.
Change API to provide block width, height, depth instead of nblk_x,
nblk_y, nblk_z.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
radeon: surface fix macro -> micro tile fallback
We need to force 1D tiling only on old kernel the fallback was
broken along the way.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
We need to force 1D tiling only on old kernel the fallback was
broken along the way.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Using sizeof() on a function parameter with an array type does not
work. sizeof() treats such parameters as pointers.
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
work. sizeof() treats such parameters as pointers.
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
This function was missing.
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
drmModeFreeResources() always leaked some memory.
drmModeGetPlaneResources() and drmModeGetPlane() leaked in one error
path.
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
drmModeGetPlaneResources() and drmModeGetPlane() leaked in one error
path.
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
radeon: add surface allocator helper v10
The surface allocator is able to build complete miptree when allocating
surface for r600/r700/evergreen/northern islands GPU family. It also
compute bo size and alignment for render buffer, depth buffer and
scanout buffer.
v2 fix r6xx/r7xx 2D tiling width align computation
v3 add tile split support and fix 1d texture alignment
v4 rework to more properly support compressed format, split surface pixel
size and surface element size in separate fields
v5 support texture array (still issue on r6xx)
v6 split surface value computation and mipmap tree building, rework eg
and newer computation
v7 add a check for tile split and 2d tiled
v8 initialize mode value before testing it in all case, reenable
2D macro tile mode on r6xx for cubemap and array. Fix cubemap
to force array size to the number of face.
v9 fix handling of stencil buffer on evergreen
v10 on evergreen depth buffer need to have enough room for a stencil
buffer just after depth one
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
The surface allocator is able to build complete miptree when allocating
surface for r600/r700/evergreen/northern islands GPU family. It also
compute bo size and alignment for render buffer, depth buffer and
scanout buffer.
v2 fix r6xx/r7xx 2D tiling width align computation
v3 add tile split support and fix 1d texture alignment
v4 rework to more properly support compressed format, split surface pixel
size and surface element size in separate fields
v5 support texture array (still issue on r6xx)
v6 split surface value computation and mipmap tree building, rework eg
and newer computation
v7 add a check for tile split and 2d tiled
v8 initialize mode value before testing it in all case, reenable
2D macro tile mode on r6xx for cubemap and array. Fix cubemap
to force array size to the number of face.
v9 fix handling of stencil buffer on evergreen
v10 on evergreen depth buffer need to have enough room for a stencil
buffer just after depth one
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
intel: query for LLC support
This adds support for querying the kernel about the LLC support in the
hardware.
In case the ioctl fails, we assume that it is present on GEN6 and GEN7.
v2: fix the return code checking
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
This adds support for querying the kernel about the LLC support in the
hardware.
In case the ioctl fails, we assume that it is present on GEN6 and GEN7.
v2: fix the return code checking
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
intel: Fix build of Intel DRM on x86 systems
Commit efd6e81e inadvertently broke the build by looking for "i?86" or
"x86_64" in $host_os. The correct variable to check is $host_cpu.
This was preventing libdrm_intel.so from being built.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Commit efd6e81e inadvertently broke the build by looking for "i?86" or
"x86_64" in $host_os. The correct variable to check is $host_cpu.
This was preventing libdrm_intel.so from being built.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Don't build Intel DRM if $CHOST is not i?86-* or x86_64-*
This fixes a failure in 'make check' found by the tinderbox when trying to
build this code on Linux/ppc. This code is only designed to run on
Intel platforms, so don't even bother building it if we're not in that set.
Found-by: Tinderbox
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
This fixes a failure in 'make check' found by the tinderbox when trying to
build this code on Linux/ppc. This code is only designed to run on
Intel platforms, so don't even bother building it if we're not in that set.
Found-by: Tinderbox
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
intel: Fix bufmgr_gem->gen for gen > 4
If the pci_device's actual gen was > 4, then we stupidly set
bufmgr_gem->gen = 6. Luckily this caused no bugs, and this fix shouldn't
change any behavior, because all checks against the gen currently have one
of the forms below:
gen == 2
gen == 3
gen >= 4
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
If the pci_device's actual gen was > 4, then we stupidly set
bufmgr_gem->gen = 6. Luckily this caused no bugs, and this fix shouldn't
change any behavior, because all checks against the gen currently have one
of the forms below:
gen == 2
gen == 3
gen >= 4
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
intel: Add minimal decode for remaining gen7 packets in use.
This just gets packet name and length in place, with the remainder
unfinished. I've long since finished the work that got me started
fixing up the decode.
This just gets packet name and length in place, with the remainder
unfinished. I've long since finished the work that got me started
fixing up the decode.
intel: Add decode for gen7 constant buffer packets.
intel: Add decode for gen7 state pointers.
Since CC_STATE_POINTERS for gen6 and 7 are quite different but use the
same opcode, move gen6 out to a helper function too, so we can use a
helper function for gen7.
Since CC_STATE_POINTERS for gen6 and 7 are quite different but use the
same opcode, move gen6 out to a helper function too, so we can use a
helper function for gen7.
intel: Add support for parsing gen7 URB packets.
intel: Make most of the logic for 965 3d packet length checks table-driven.
This puts the error message in a consistent location relative to the
packet, and while I'm here I made the error message a bit more
informative.
Now, most static length packets need to just declare their length in
the table and not worry.
This puts the error message in a consistent location relative to the
packet, and while I'm here I made the error message a bit more
informative.
Now, most static length packets need to just declare their length in
the table and not worry.
intel: Move the logic for getting 965 3d packet length to the packet table.
While I'm touching every line of the table, sort it by opcode.
While I'm touching every line of the table, sort it by opcode.
intel: Add support for parsing 965 3d packets using helper functions.
I want to add packets, without contributing to the switch statement of
doom.
I want to add packets, without contributing to the switch statement of
doom.
intel: Parse the correct length for gen7 3DSTATE_MULTISAMPLE.
intel: Put the "gen" shorthand chipset identifier in the context.
It's a lot nicer than using IS_WHATEVER(devid) all over the place, and
we have this in our other projects too.
It's a lot nicer than using IS_WHATEVER(devid) all over the place, and
we have this in our other projects too.
intel: Avoid the need for most overflow checks by using a scratch page.
The overflow checks were all thoroughly untested, and a bunch of the
ones I'm deleting were pretty broken. Now, in the case of overflow,
you just decode data of 0xd0d0d0d0, and instr_out prints the warning
message instead. Note that this still has the same issue of being
under-tested, but at least it's one place instead of per-packet.
A couple of BUFFER_FAIL uses are left where the length to be decoded
could be (significantly) larger than a page, and the decode didn't
just call instr_out (which doesn't dereference data itself unless it's
safe).
The overflow checks were all thoroughly untested, and a bunch of the
ones I'm deleting were pretty broken. Now, in the case of overflow,
you just decode data of 0xd0d0d0d0, and instr_out prints the warning
message instead. Note that this still has the same issue of being
under-tested, but at least it's one place instead of per-packet.
A couple of BUFFER_FAIL uses are left where the length to be decoded
could be (significantly) larger than a page, and the decode didn't
just call instr_out (which doesn't dereference data itself unless it's
safe).
intel: Make instr_out take the decode context.
This reduces some of the extra derefs of the pointers.
This reduces some of the extra derefs of the pointers.
intel: Use the context to simplify BR01 decode.
Similar to BR00, count was always 1 and was always an index, not a count.
Similar to BR00, count was always 1 and was always an index, not a count.
intel: Use the context to simplify BR00 decode.
The count (actually index) was always 0, because BR00 is dword 0.
The count (actually index) was always 0, because BR00 is dword 0.
intel: Plumb the context through the decode callchain.
We still deref the context at the start of every call, but that will
change next.
We still deref the context at the start of every call, but that will
change next.
intel: Drop the code for counting parsing failures.
Nothing was consuming it. If something wants this in the future,
would be done using the decode context anyway.
Nothing was consuming it. If something wants this in the future,
would be done using the decode context anyway.
intel: Track the current packet location in the decode context.
This is the start of plumbing the context through the decode
callchain instead of the current 4 arguments.
This is the start of plumbing the context through the decode
callchain instead of the current 4 arguments.
intel: Add a regression test for 2D decode, which I'm about to refactor.
intel: add sprite ioctl defines and struct for i915 sprite code
configure: Bump version for 2.4.30
intel: Update for new i915_drm.h defines.
intel: Add regression tests for batch decode.
The .batch was generated using the dump-a-batch branch of
git://people.freedesktop.org/~anholt/mesa
using glxgears on gen7 hardware, using INTEL_DEVID_OVERRIDE for
non-gen7 (this means that offsets in the buffers for non-gen7 are 0!).
The .ref was generated by:
./test_decode tests/gen7-3d.batch -dump.
The .sh exists because you can't supply arguments to tests using the
simple automake tests driver. Something reasonable could be done
using automake's parallel-tests driver (in fact, a previous version of
the patch did that), but I was concerned that:
1) The parallel-tests driver is documented to be unstable -- they may
change interfaces on us later.
2) The parallel-tests driver hides the output of tests in .log files
scattered all over the tree, which was ugly and more painful to
work with.
v2: Actually add the batch files, add a .gitignore for the *-new.txt
files added after failures, and fix failure mode for undetected
chipset name.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v1)
The .batch was generated using the dump-a-batch branch of
git://people.freedesktop.org/~anholt/mesa
using glxgears on gen7 hardware, using INTEL_DEVID_OVERRIDE for
non-gen7 (this means that offsets in the buffers for non-gen7 are 0!).
The .ref was generated by:
./test_decode tests/gen7-3d.batch -dump.
The .sh exists because you can't supply arguments to tests using the
simple automake tests driver. Something reasonable could be done
using automake's parallel-tests driver (in fact, a previous version of
the patch did that), but I was concerned that:
1) The parallel-tests driver is documented to be unstable -- they may
change interfaces on us later.
2) The parallel-tests driver hides the output of tests in .log files
scattered all over the tree, which was ugly and more painful to
work with.
v2: Actually add the batch files, add a .gitignore for the *-new.txt
files added after failures, and fix failure mode for undetected
chipset name.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v1)
intel: Add a regression test program for intel_decode.c.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
intel: Add an interface for setting the output file for decode.
Consumers often want to choose stdout vs stderr, and for testing I
want to output to an open_memstream file.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Consumers often want to choose stdout vs stderr, and for testing I
want to output to an open_memstream file.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
intel/intel_decode.c: Remove #include "intel_decode.h".
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
intel: Disable unused decode_logic_op().
It was producing an unused code warning. I'm tempted to just remove
it, since it's unused, but I *might* use it soon.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
It was producing an unused code warning. I'm tempted to just remove
it, since it's unused, but I *might* use it soon.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
intel: Turn on normal warnings for intel_decode.c build.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>