2fcef66a9185b752da0a7533b3cb98f49c5c5029
[glsdk/meta-ti-glsdk.git] / recipes-bsp / linux / linux-omap / usrp / 0001-Add-defines-to-set-config-options-in-GPMC-per-CS-con.patch
1 From a6e1f70eca0fcc9899e949f7ecb30b0fa483f590 Mon Sep 17 00:00:00 2001
2 From: Philip Balister <balister@nomad.(none)>
3 Date: Wed, 17 Feb 2010 14:51:39 -0800
4 Subject: [PATCH 01/22] Add defines to set config options in GPMC per CS control registers.
6 ---
7 arch/arm/plat-omap/include/plat/gpmc.h | 36 ++++++++++++++++++++++++++++++++
8 1 files changed, 36 insertions(+), 0 deletions(-)
10 diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
11 index 85ded59..1a6c748 100644
12 --- a/arch/arm/plat-omap/include/plat/gpmc.h
13 +++ b/arch/arm/plat-omap/include/plat/gpmc.h
14 @@ -46,6 +46,11 @@
15 #define GPMC_ECC_WRITE 1 /* Reset Hardware ECC for write */
16 #define GPMC_ECC_READSYN 2 /* Reset before syndrom is read back */
18 +#define GPMC_CONFIG 0x50
19 +#define GPMC_STATUS 0x54
20 +#define GPMC_CS0_BASE 0x60
21 +#define GPMC_CS_SIZE 0x30
22 +
23 #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31)
24 #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30)
25 #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29)
26 @@ -63,6 +68,7 @@
27 #define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1)
28 #define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10)
29 #define GPMC_CONFIG1_DEVICETYPE_NOR GPMC_CONFIG1_DEVICETYPE(0)
30 +#define GPMC_CONFIG1_DEVICETYPE_NAND GPMC_CONFIG1_DEVICETYPE(2)
31 #define GPMC_CONFIG1_MUXADDDATA (1 << 9)
32 #define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4)
33 #define GPMC_CONFIG1_FCLK_DIV(val) (val & 3)
34 @@ -79,6 +85,35 @@
35 #define GPMC_PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F)
36 #define GPMC_PREFETCH_STATUS_COUNT(val) (val & 0x00003fff)
38 +#define GPMC_CONFIG2_CSWROFFTIME(val) ((val & 31) << 16)
39 +#define GPMC_CONFIG2_CSRDOFFTIME(val) ((val & 31) << 8)
40 +#define GPMC_CONFIG2_CSEXTRADELAY (1 << 7)
41 +#define GPMC_CONFIG2_CSONTIME(val) (val & 15)
42 +
43 +#define GPMC_CONFIG3_ADVWROFFTIME(val) ((val & 31) << 16)
44 +#define GPMC_CONFIG3_ADVRDOFFTIME(val) ((val & 31) << 8)
45 +#define GPMC_CONFIG3_ADVEXTRADELAY (1 << 7)
46 +#define GPMC_CONFIG3_ADVONTIME(val) (val & 15)
47 +
48 +#define GPMC_CONFIG4_WEOFFTIME(val) ((val & 31) << 24)
49 +#define GPMC_CONFIG4_WEEXTRADELAY (1 << 23)
50 +#define GPMC_CONFIG4_WEONTIME(val) ((val & 15) << 16)
51 +#define GPMC_CONFIG4_OEOFFTIME(val) ((val & 31) << 8)
52 +#define GPMC_CONFIG4_OEEXTRADELAY (1 << 7)
53 +#define GPMC_CONFIG4_OEONTIME(val) (val & 15)
54 +
55 +#define GPMC_CONFIG5_PAGEBURSTACCESSTIME(val) ((val & 15) << 24)
56 +#define GPMC_CONFIG5_RDACCESSTIME(val) ((val & 31) << 16)
57 +#define GPMC_CONFIG5_WRCYCLETIME(val) ((val & 31) << 8)
58 +#define GPMC_CONFIG5_RDCYCLETIME(val) (val & 31)
59 +
60 +#define GPMC_CONFIG6_WRACCESSTIME(val) ((val & 31) << 24)
61 +#define GPMC_CONFIG6_WRDATAONADMUXBUS(val) ((val & 15) << 16)
62 +#define GPMC_CONFIG6_CYCLE2CYCLEDELAY(val) ((val & 15) << 8)
63 +#define GPMC_CONFIG6_CYCLE2CYCLESAMECSEN (1 << 7)
64 +#define GPMC_CONFIG6_CYCLE2CYCLEDIFFCSEN (1 << 6)
65 +#define GPMC_CONFIG6_BUSTURNAROUND(val) (val & 15)
66 +
67 /*
68 * Note that all values in this struct are in nanoseconds except sync_clk
69 * (which is in picoseconds), while the register values are in gpmc_fck cycles.
70 @@ -133,6 +168,7 @@ extern int gpmc_cs_reserved(int cs);
71 extern int gpmc_prefetch_enable(int cs, int dma_mode,
72 unsigned int u32_count, int is_write);
73 extern int gpmc_prefetch_reset(int cs);
74 +extern int gpmc_prefetch_status(void);
75 extern void omap3_gpmc_save_context(void);
76 extern void omap3_gpmc_restore_context(void);
77 extern void gpmc_init(void);
78 --
79 1.6.6.1