[glsdk/meta-ti-glsdk.git] / recipes-bsp / u-boot / u-boot / 2011.09 / 0001-omap3-mem-Comment-enable_gpmc_cs_config-more.patch
1 From 81630b54970a9274140b1c14caa31da6331a62fa Mon Sep 17 00:00:00 2001
2 From: Tom Rini <trini@ti.com>
3 Date: Fri, 18 Nov 2011 12:47:58 +0000
4 Subject: [PATCH 01/21] omap3: mem: Comment enable_gpmc_cs_config more
6 Expand the "enable the config" comment to explain what the bit shifts
7 are and define out two of the magic numbers.
9 Signed-off-by: Tom Rini <trini@ti.com>
10 Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
11 ---
12 arch/arm/cpu/armv7/omap3/mem.c | 12 +++++++++---
13 arch/arm/include/asm/arch-omap3/mem.h | 4 ++++
14 2 files changed, 13 insertions(+), 3 deletions(-)
16 diff --git a/arch/arm/cpu/armv7/omap3/mem.c b/arch/arm/cpu/armv7/omap3/mem.c
17 index a01c303..2f1efea 100644
18 --- a/arch/arm/cpu/armv7/omap3/mem.c
19 +++ b/arch/arm/cpu/armv7/omap3/mem.c
20 @@ -105,9 +105,15 @@ void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
21 writel(gpmc_config[3], &cs->config4);
22 writel(gpmc_config[4], &cs->config5);
23 writel(gpmc_config[5], &cs->config6);
24 - /* Enable the config */
25 - writel((((size & 0xF) << 8) | ((base >> 24) & 0x3F) |
26 - (1 << 6)), &cs->config7);
27 +
28 + /*
29 + * Enable the config. size is the CS size and goes in
30 + * bits 11:8. We set bit 6 to enable this CS and the base
31 + * address goes into bits 5:0.
32 + */
33 + writel((size << 8) | (GPMC_CS_ENABLE << 6) |
34 + ((base >> 24) & GPMC_BASEADDR_MASK),
35 + &cs->config7);
36 sdelay(2000);
37 }
39 diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
40 index db6a696..abf4e82 100644
41 --- a/arch/arm/include/asm/arch-omap3/mem.h
42 +++ b/arch/arm/include/asm/arch-omap3/mem.h
43 @@ -259,6 +259,10 @@ enum {
44 #define GPMC_SIZE_32M 0xE
45 #define GPMC_SIZE_16M 0xF
47 +#define GPMC_BASEADDR_MASK 0x3F
48 +
49 +#define GPMC_CS_ENABLE 0x1
50 +
51 #define SMNAND_GPMC_CONFIG1 0x00000800
52 #define SMNAND_GPMC_CONFIG2 0x00141400
53 #define SMNAND_GPMC_CONFIG3 0x00141400
54 --
55 1.7.2.5