9fc0d5f9f301805b21c24e91f86ab9816894ca8a
[glsdk/meta-ti-glsdk.git] / recipes-kernel / linux / linux-3.0 / pm-wip / voltdm / 0020-omap-mcbsp-Drop-in-driver-transfer-support.patch
1 From a6f4eafa970b1b651d9844aef3f1a180ad2cc1e8 Mon Sep 17 00:00:00 2001
2 From: Jarkko Nikula <jhnikula@gmail.com>
3 Date: Tue, 14 Jun 2011 11:23:52 +0000
4 Subject: [PATCH 020/149] omap: mcbsp: Drop in-driver transfer support
6 We haven't seen either use for in-driver transfer API in McBSP driver
7 over the years so it looks they can be removed too.
9 Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
10 Signed-off-by: Tony Lindgren <tony@atomide.com>
11 ---
12 arch/arm/plat-omap/include/plat/mcbsp.h | 25 --
13 arch/arm/plat-omap/mcbsp.c | 382 ++-----------------------------
14 2 files changed, 19 insertions(+), 388 deletions(-)
16 diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
17 index 3fc75a8..6c53508 100644
18 --- a/arch/arm/plat-omap/include/plat/mcbsp.h
19 +++ b/arch/arm/plat-omap/include/plat/mcbsp.h
20 @@ -24,7 +24,6 @@
21 #ifndef __ASM_ARCH_OMAP_MCBSP_H
22 #define __ASM_ARCH_OMAP_MCBSP_H
24 -#include <linux/completion.h>
25 #include <linux/spinlock.h>
27 #include <mach/hardware.h>
28 @@ -340,10 +339,6 @@ typedef enum {
29 OMAP_MCBSP5
30 } omap_mcbsp_id;
32 -typedef int __bitwise omap_mcbsp_io_type_t;
33 -#define OMAP_MCBSP_IRQ_IO ((__force omap_mcbsp_io_type_t) 1)
34 -#define OMAP_MCBSP_POLL_IO ((__force omap_mcbsp_io_type_t) 2)
35 -
36 typedef enum {
37 OMAP_MCBSP_WORD_8 = 0,
38 OMAP_MCBSP_WORD_12,
39 @@ -393,22 +388,12 @@ struct omap_mcbsp {
40 omap_mcbsp_word_length rx_word_length;
41 omap_mcbsp_word_length tx_word_length;
43 - omap_mcbsp_io_type_t io_type; /* IRQ or poll */
44 - /* IRQ based TX/RX */
45 int rx_irq;
46 int tx_irq;
48 /* DMA stuff */
49 u8 dma_rx_sync;
50 - short dma_rx_lch;
51 u8 dma_tx_sync;
52 - short dma_tx_lch;
53 -
54 - /* Completion queues */
55 - struct completion tx_irq_completion;
56 - struct completion rx_irq_completion;
57 - struct completion tx_dma_completion;
58 - struct completion rx_dma_completion;
60 /* Protect the field .free, while checking if the mcbsp is in use */
61 spinlock_t lock;
62 @@ -467,20 +452,10 @@ int omap_mcbsp_request(unsigned int id);
63 void omap_mcbsp_free(unsigned int id);
64 void omap_mcbsp_start(unsigned int id, int tx, int rx);
65 void omap_mcbsp_stop(unsigned int id, int tx, int rx);
66 -void omap_mcbsp_xmit_word(unsigned int id, u32 word);
67 -u32 omap_mcbsp_recv_word(unsigned int id);
68 -
69 -int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length);
70 -int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length);
72 /* McBSP functional clock source changing function */
73 extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id);
75 -/* Polled read/write functions */
76 -int omap_mcbsp_pollread(unsigned int id, u16 * buf);
77 -int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
78 -int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
79 -
80 /* McBSP signal muxing API */
81 void omap2_mcbsp1_mux_clkr_src(u8 mux);
82 void omap2_mcbsp1_mux_fsr_src(u8 mux);
83 diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
84 index 1de2724..455eadc 100644
85 --- a/arch/arm/plat-omap/mcbsp.c
86 +++ b/arch/arm/plat-omap/mcbsp.c
87 @@ -16,8 +16,6 @@
88 #include <linux/init.h>
89 #include <linux/device.h>
90 #include <linux/platform_device.h>
91 -#include <linux/wait.h>
92 -#include <linux/completion.h>
93 #include <linux/interrupt.h>
94 #include <linux/err.h>
95 #include <linux/clk.h>
96 @@ -25,7 +23,6 @@
97 #include <linux/io.h>
98 #include <linux/slab.h>
100 -#include <plat/dma.h>
101 #include <plat/mcbsp.h>
102 #include <plat/omap_device.h>
103 #include <linux/pm_runtime.h>
104 @@ -136,8 +133,6 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
105 irqst_spcr2);
106 /* Writing zero to XSYNC_ERR clears the IRQ */
107 MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2));
108 - } else {
109 - complete(&mcbsp_tx->tx_irq_completion);
110 }
112 return IRQ_HANDLED;
113 @@ -156,41 +151,11 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
114 irqst_spcr1);
115 /* Writing zero to RSYNC_ERR clears the IRQ */
116 MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1));
117 - } else {
118 - complete(&mcbsp_rx->rx_irq_completion);
119 }
121 return IRQ_HANDLED;
122 }
124 -static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
125 -{
126 - struct omap_mcbsp *mcbsp_dma_tx = data;
127 -
128 - dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
129 - MCBSP_READ(mcbsp_dma_tx, SPCR2));
130 -
131 - /* We can free the channels */
132 - omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
133 - mcbsp_dma_tx->dma_tx_lch = -1;
134 -
135 - complete(&mcbsp_dma_tx->tx_dma_completion);
136 -}
137 -
138 -static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
139 -{
140 - struct omap_mcbsp *mcbsp_dma_rx = data;
141 -
142 - dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
143 - MCBSP_READ(mcbsp_dma_rx, SPCR2));
144 -
145 - /* We can free the channels */
146 - omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
147 - mcbsp_dma_rx->dma_rx_lch = -1;
148 -
149 - complete(&mcbsp_dma_rx->rx_dma_completion);
150 -}
151 -
152 /*
153 * omap_mcbsp_config simply write a config to the
154 * appropriate McBSP.
155 @@ -758,37 +723,6 @@ static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
156 static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
157 #endif
159 -/*
160 - * We can choose between IRQ based or polled IO.
161 - * This needs to be called before omap_mcbsp_request().
162 - */
163 -int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
164 -{
165 - struct omap_mcbsp *mcbsp;
166 -
167 - if (!omap_mcbsp_check_valid_id(id)) {
168 - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
169 - return -ENODEV;
170 - }
171 - mcbsp = id_to_mcbsp_ptr(id);
172 -
173 - spin_lock(&mcbsp->lock);
174 -
175 - if (!mcbsp->free) {
176 - dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
177 - mcbsp->id);
178 - spin_unlock(&mcbsp->lock);
179 - return -EINVAL;
180 - }
181 -
182 - mcbsp->io_type = io_type;
183 -
184 - spin_unlock(&mcbsp->lock);
185 -
186 - return 0;
187 -}
188 -EXPORT_SYMBOL(omap_mcbsp_set_io_type);
189 -
190 int omap_mcbsp_request(unsigned int id)
191 {
192 struct omap_mcbsp *mcbsp;
193 @@ -833,29 +767,24 @@ int omap_mcbsp_request(unsigned int id)
194 MCBSP_WRITE(mcbsp, SPCR1, 0);
195 MCBSP_WRITE(mcbsp, SPCR2, 0);
197 - if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
198 - /* We need to get IRQs here */
199 - init_completion(&mcbsp->tx_irq_completion);
200 - err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
201 - 0, "McBSP", (void *)mcbsp);
202 + err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
203 + 0, "McBSP", (void *)mcbsp);
204 + if (err != 0) {
205 + dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
206 + "for McBSP%d\n", mcbsp->tx_irq,
207 + mcbsp->id);
208 + goto err_clk_disable;
209 + }
210 +
211 + if (mcbsp->rx_irq) {
212 + err = request_irq(mcbsp->rx_irq,
213 + omap_mcbsp_rx_irq_handler,
214 + 0, "McBSP", (void *)mcbsp);
215 if (err != 0) {
216 - dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
217 - "for McBSP%d\n", mcbsp->tx_irq,
218 + dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
219 + "for McBSP%d\n", mcbsp->rx_irq,
220 mcbsp->id);
221 - goto err_clk_disable;
222 - }
223 -
224 - if (mcbsp->rx_irq) {
225 - init_completion(&mcbsp->rx_irq_completion);
226 - err = request_irq(mcbsp->rx_irq,
227 - omap_mcbsp_rx_irq_handler,
228 - 0, "McBSP", (void *)mcbsp);
229 - if (err != 0) {
230 - dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
231 - "for McBSP%d\n", mcbsp->rx_irq,
232 - mcbsp->id);
233 - goto err_free_irq;
234 - }
235 + goto err_free_irq;
236 }
237 }
239 @@ -901,12 +830,9 @@ void omap_mcbsp_free(unsigned int id)
241 pm_runtime_put_sync(mcbsp->dev);
243 - if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
244 - /* Free IRQs */
245 - if (mcbsp->rx_irq)
246 - free_irq(mcbsp->rx_irq, (void *)mcbsp);
247 - free_irq(mcbsp->tx_irq, (void *)mcbsp);
248 - }
249 + if (mcbsp->rx_irq)
250 + free_irq(mcbsp->rx_irq, (void *)mcbsp);
251 + free_irq(mcbsp->tx_irq, (void *)mcbsp);
253 reg_cache = mcbsp->reg_cache;
255 @@ -1043,271 +969,6 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
256 }
257 EXPORT_SYMBOL(omap_mcbsp_stop);
259 -/* polled mcbsp i/o operations */
260 -int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
261 -{
262 - struct omap_mcbsp *mcbsp;
263 -
264 - if (!omap_mcbsp_check_valid_id(id)) {
265 - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
266 - return -ENODEV;
267 - }
268 -
269 - mcbsp = id_to_mcbsp_ptr(id);
270 -
271 - MCBSP_WRITE(mcbsp, DXR1, buf);
272 - /* if frame sync error - clear the error */
273 - if (MCBSP_READ(mcbsp, SPCR2) & XSYNC_ERR) {
274 - /* clear error */
275 - MCBSP_WRITE(mcbsp, SPCR2, MCBSP_READ_CACHE(mcbsp, SPCR2));
276 - /* resend */
277 - return -1;
278 - } else {
279 - /* wait for transmit confirmation */
280 - int attemps = 0;
281 - while (!(MCBSP_READ(mcbsp, SPCR2) & XRDY)) {
282 - if (attemps++ > 1000) {
283 - MCBSP_WRITE(mcbsp, SPCR2,
284 - MCBSP_READ_CACHE(mcbsp, SPCR2) &
285 - (~XRST));
286 - udelay(10);
287 - MCBSP_WRITE(mcbsp, SPCR2,
288 - MCBSP_READ_CACHE(mcbsp, SPCR2) |
289 - (XRST));
290 - udelay(10);
291 - dev_err(mcbsp->dev, "Could not write to"
292 - " McBSP%d Register\n", mcbsp->id);
293 - return -2;
294 - }
295 - }
296 - }
297 -
298 - return 0;
299 -}
300 -EXPORT_SYMBOL(omap_mcbsp_pollwrite);
301 -
302 -int omap_mcbsp_pollread(unsigned int id, u16 *buf)
303 -{
304 - struct omap_mcbsp *mcbsp;
305 -
306 - if (!omap_mcbsp_check_valid_id(id)) {
307 - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
308 - return -ENODEV;
309 - }
310 - mcbsp = id_to_mcbsp_ptr(id);
311 -
312 - /* if frame sync error - clear the error */
313 - if (MCBSP_READ(mcbsp, SPCR1) & RSYNC_ERR) {
314 - /* clear error */
315 - MCBSP_WRITE(mcbsp, SPCR1, MCBSP_READ_CACHE(mcbsp, SPCR1));
316 - /* resend */
317 - return -1;
318 - } else {
319 - /* wait for receive confirmation */
320 - int attemps = 0;
321 - while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) {
322 - if (attemps++ > 1000) {
323 - MCBSP_WRITE(mcbsp, SPCR1,
324 - MCBSP_READ_CACHE(mcbsp, SPCR1) &
325 - (~RRST));
326 - udelay(10);
327 - MCBSP_WRITE(mcbsp, SPCR1,
328 - MCBSP_READ_CACHE(mcbsp, SPCR1) |
329 - (RRST));
330 - udelay(10);
331 - dev_err(mcbsp->dev, "Could not read from"
332 - " McBSP%d Register\n", mcbsp->id);
333 - return -2;
334 - }
335 - }
336 - }
337 - *buf = MCBSP_READ(mcbsp, DRR1);
338 -
339 - return 0;
340 -}
341 -EXPORT_SYMBOL(omap_mcbsp_pollread);
342 -
343 -/*
344 - * IRQ based word transmission.
345 - */
346 -void omap_mcbsp_xmit_word(unsigned int id, u32 word)
347 -{
348 - struct omap_mcbsp *mcbsp;
349 - omap_mcbsp_word_length word_length;
350 -
351 - if (!omap_mcbsp_check_valid_id(id)) {
352 - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
353 - return;
354 - }
355 -
356 - mcbsp = id_to_mcbsp_ptr(id);
357 - word_length = mcbsp->tx_word_length;
358 -
359 - wait_for_completion(&mcbsp->tx_irq_completion);
360 -
361 - if (word_length > OMAP_MCBSP_WORD_16)
362 - MCBSP_WRITE(mcbsp, DXR2, word >> 16);
363 - MCBSP_WRITE(mcbsp, DXR1, word & 0xffff);
364 -}
365 -EXPORT_SYMBOL(omap_mcbsp_xmit_word);
366 -
367 -u32 omap_mcbsp_recv_word(unsigned int id)
368 -{
369 - struct omap_mcbsp *mcbsp;
370 - u16 word_lsb, word_msb = 0;
371 - omap_mcbsp_word_length word_length;
372 -
373 - if (!omap_mcbsp_check_valid_id(id)) {
374 - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
375 - return -ENODEV;
376 - }
377 - mcbsp = id_to_mcbsp_ptr(id);
378 -
379 - word_length = mcbsp->rx_word_length;
380 -
381 - wait_for_completion(&mcbsp->rx_irq_completion);
382 -
383 - if (word_length > OMAP_MCBSP_WORD_16)
384 - word_msb = MCBSP_READ(mcbsp, DRR2);
385 - word_lsb = MCBSP_READ(mcbsp, DRR1);
386 -
387 - return (word_lsb | (word_msb << 16));
388 -}
389 -EXPORT_SYMBOL(omap_mcbsp_recv_word);
390 -
391 -/*
392 - * Simple DMA based buffer rx/tx routines.
393 - * Nothing fancy, just a single buffer tx/rx through DMA.
394 - * The DMA resources are released once the transfer is done.
395 - * For anything fancier, you should use your own customized DMA
396 - * routines and callbacks.
397 - */
398 -int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
399 - unsigned int length)
400 -{
401 - struct omap_mcbsp *mcbsp;
402 - int dma_tx_ch;
403 - int src_port = 0;
404 - int dest_port = 0;
405 - int sync_dev = 0;
406 -
407 - if (!omap_mcbsp_check_valid_id(id)) {
408 - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
409 - return -ENODEV;
410 - }
411 - mcbsp = id_to_mcbsp_ptr(id);
412 -
413 - if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
414 - omap_mcbsp_tx_dma_callback,
415 - mcbsp,
416 - &dma_tx_ch)) {
417 - dev_err(mcbsp->dev, " Unable to request DMA channel for "
418 - "McBSP%d TX. Trying IRQ based TX\n",
419 - mcbsp->id);
420 - return -EAGAIN;
421 - }
422 - mcbsp->dma_tx_lch = dma_tx_ch;
423 -
424 - dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
425 - dma_tx_ch);
426 -
427 - init_completion(&mcbsp->tx_dma_completion);
428 -
429 - if (cpu_class_is_omap1()) {
430 - src_port = OMAP_DMA_PORT_TIPB;
431 - dest_port = OMAP_DMA_PORT_EMIFF;
432 - }
433 - if (cpu_class_is_omap2())
434 - sync_dev = mcbsp->dma_tx_sync;
435 -
436 - omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
437 - OMAP_DMA_DATA_TYPE_S16,
438 - length >> 1, 1,
439 - OMAP_DMA_SYNC_ELEMENT,
440 - sync_dev, 0);
441 -
442 - omap_set_dma_dest_params(mcbsp->dma_tx_lch,
443 - src_port,
444 - OMAP_DMA_AMODE_CONSTANT,
445 - mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
446 - 0, 0);
447 -
448 - omap_set_dma_src_params(mcbsp->dma_tx_lch,
449 - dest_port,
450 - OMAP_DMA_AMODE_POST_INC,
451 - buffer,
452 - 0, 0);
453 -
454 - omap_start_dma(mcbsp->dma_tx_lch);
455 - wait_for_completion(&mcbsp->tx_dma_completion);
456 -
457 - return 0;
458 -}
459 -EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
460 -
461 -int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
462 - unsigned int length)
463 -{
464 - struct omap_mcbsp *mcbsp;
465 - int dma_rx_ch;
466 - int src_port = 0;
467 - int dest_port = 0;
468 - int sync_dev = 0;
469 -
470 - if (!omap_mcbsp_check_valid_id(id)) {
471 - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
472 - return -ENODEV;
473 - }
474 - mcbsp = id_to_mcbsp_ptr(id);
475 -
476 - if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
477 - omap_mcbsp_rx_dma_callback,
478 - mcbsp,
479 - &dma_rx_ch)) {
480 - dev_err(mcbsp->dev, "Unable to request DMA channel for "
481 - "McBSP%d RX. Trying IRQ based RX\n",
482 - mcbsp->id);
483 - return -EAGAIN;
484 - }
485 - mcbsp->dma_rx_lch = dma_rx_ch;
486 -
487 - dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
488 - dma_rx_ch);
489 -
490 - init_completion(&mcbsp->rx_dma_completion);
491 -
492 - if (cpu_class_is_omap1()) {
493 - src_port = OMAP_DMA_PORT_TIPB;
494 - dest_port = OMAP_DMA_PORT_EMIFF;
495 - }
496 - if (cpu_class_is_omap2())
497 - sync_dev = mcbsp->dma_rx_sync;
498 -
499 - omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
500 - OMAP_DMA_DATA_TYPE_S16,
501 - length >> 1, 1,
502 - OMAP_DMA_SYNC_ELEMENT,
503 - sync_dev, 0);
504 -
505 - omap_set_dma_src_params(mcbsp->dma_rx_lch,
506 - src_port,
507 - OMAP_DMA_AMODE_CONSTANT,
508 - mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
509 - 0, 0);
510 -
511 - omap_set_dma_dest_params(mcbsp->dma_rx_lch,
512 - dest_port,
513 - OMAP_DMA_AMODE_POST_INC,
514 - buffer,
515 - 0, 0);
516 -
517 - omap_start_dma(mcbsp->dma_rx_lch);
518 - wait_for_completion(&mcbsp->rx_dma_completion);
519 -
520 - return 0;
521 -}
522 -EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
523 -
524 #ifdef CONFIG_ARCH_OMAP3
525 #define max_thres(m) (mcbsp->pdata->buffer_size)
526 #define valid_threshold(m, val) ((val) <= max_thres(m))
527 @@ -1619,8 +1280,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
528 spin_lock_init(&mcbsp->lock);
529 mcbsp->id = id + 1;
530 mcbsp->free = true;
531 - mcbsp->dma_tx_lch = -1;
532 - mcbsp->dma_rx_lch = -1;
534 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
535 if (!res) {
536 @@ -1646,9 +1305,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
537 else
538 mcbsp->phys_dma_base = res->start;
540 - /* Default I/O is IRQ based */
541 - mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
542 -
543 mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
544 mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
546 --
547 1.6.6.1