[glsdk/meta-ti-glsdk.git] / recipes-kernel / linux / linux-3.0 / pm-wip / voltdm / 0038-omap_hwmod-share-identical-omap_hwmod_addr_space-arr.patch
1 From 6d88f17e46fda46214da43af303c4f4aa442bd39 Mon Sep 17 00:00:00 2001
2 From: Paul Walmsley <paul@pwsan.com>
3 Date: Sat, 9 Jul 2011 19:14:06 -0600
4 Subject: [PATCH 038/149] omap_hwmod: share identical omap_hwmod_addr_space arrays
6 To reduce kernel source file data duplication, share struct
7 omap_hwmod_addr_space arrays across OMAP2xxx and 3xxx hwmod data
8 files.
10 Signed-off-by: Paul Walmsley <paul@pwsan.com>
11 ---
12 arch/arm/mach-omap2/Makefile | 11 +-
13 arch/arm/mach-omap2/omap_hwmod_2420_data.c | 291 ++----------------
14 arch/arm/mach-omap2/omap_hwmod_2430_data.c | 319 ++------------------
15 .../omap_hwmod_2xxx_3xxx_interconnect_data.c | 173 +++++++++++
16 .../mach-omap2/omap_hwmod_2xxx_interconnect_data.c | 130 ++++++++
17 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 151 +---------
18 arch/arm/mach-omap2/omap_hwmod_common_data.h | 38 +++-
19 7 files changed, 414 insertions(+), 699 deletions(-)
20 create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
21 create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
23 diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
24 index ff1466f..8a75d17 100644
25 --- a/arch/arm/mach-omap2/Makefile
26 +++ b/arch/arm/mach-omap2/Makefile
27 @@ -145,9 +145,14 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o
28 obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o
30 # hwmod data
31 -obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2420_data.o
32 -obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o
33 -obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o
34 +obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o \
35 + omap_hwmod_2xxx_3xxx_interconnect_data.o \
36 + omap_hwmod_2420_data.o
37 +obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o \
38 + omap_hwmod_2xxx_3xxx_interconnect_data.o \
39 + omap_hwmod_2430_data.o
40 +obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o \
41 + omap_hwmod_3xxx_data.o
42 obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o
44 # EMU peripherals
45 diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
46 index 1a7ce3e..3ec625c 100644
47 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
48 +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
49 @@ -114,38 +114,20 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod;
50 static struct omap_hwmod omap2420_mcbsp2_hwmod;
52 /* l4 core -> mcspi1 interface */
53 -static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = {
54 - {
55 - .pa_start = 0x48098000,
56 - .pa_end = 0x480980ff,
57 - .flags = ADDR_TYPE_RT,
58 - },
59 - { }
60 -};
61 -
62 static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = {
63 .master = &omap2420_l4_core_hwmod,
64 .slave = &omap2420_mcspi1_hwmod,
65 .clk = "mcspi1_ick",
66 - .addr = omap2420_mcspi1_addr_space,
67 + .addr = omap2_mcspi1_addr_space,
68 .user = OCP_USER_MPU | OCP_USER_SDMA,
69 };
71 /* l4 core -> mcspi2 interface */
72 -static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = {
73 - {
74 - .pa_start = 0x4809a000,
75 - .pa_end = 0x4809a0ff,
76 - .flags = ADDR_TYPE_RT,
77 - },
78 - { }
79 -};
80 -
81 static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = {
82 .master = &omap2420_l4_core_hwmod,
83 .slave = &omap2420_mcspi2_hwmod,
84 .clk = "mcspi2_ick",
85 - .addr = omap2420_mcspi2_addr_space,
86 + .addr = omap2_mcspi2_addr_space,
87 .user = OCP_USER_MPU | OCP_USER_SDMA,
88 };
90 @@ -157,95 +139,47 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
91 };
93 /* L4 CORE -> UART1 interface */
94 -static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = {
95 - {
96 - .pa_start = OMAP2_UART1_BASE,
97 - .pa_end = OMAP2_UART1_BASE + SZ_8K - 1,
98 - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
99 - },
100 - { }
101 -};
102 -
103 static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
104 .master = &omap2420_l4_core_hwmod,
105 .slave = &omap2420_uart1_hwmod,
106 .clk = "uart1_ick",
107 - .addr = omap2420_uart1_addr_space,
108 + .addr = omap2xxx_uart1_addr_space,
109 .user = OCP_USER_MPU | OCP_USER_SDMA,
110 };
112 /* L4 CORE -> UART2 interface */
113 -static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = {
114 - {
115 - .pa_start = OMAP2_UART2_BASE,
116 - .pa_end = OMAP2_UART2_BASE + SZ_1K - 1,
117 - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
118 - },
119 - { }
120 -};
121 -
122 static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
123 .master = &omap2420_l4_core_hwmod,
124 .slave = &omap2420_uart2_hwmod,
125 .clk = "uart2_ick",
126 - .addr = omap2420_uart2_addr_space,
127 + .addr = omap2xxx_uart2_addr_space,
128 .user = OCP_USER_MPU | OCP_USER_SDMA,
129 };
131 /* L4 PER -> UART3 interface */
132 -static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = {
133 - {
134 - .pa_start = OMAP2_UART3_BASE,
135 - .pa_end = OMAP2_UART3_BASE + SZ_1K - 1,
136 - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
137 - },
138 - { }
139 -};
140 -
141 static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
142 .master = &omap2420_l4_core_hwmod,
143 .slave = &omap2420_uart3_hwmod,
144 .clk = "uart3_ick",
145 - .addr = omap2420_uart3_addr_space,
146 + .addr = omap2xxx_uart3_addr_space,
147 .user = OCP_USER_MPU | OCP_USER_SDMA,
148 };
150 -/* I2C IP block address space length (in bytes) */
151 -#define OMAP2_I2C_AS_LEN 128
152 -
153 /* L4 CORE -> I2C1 interface */
154 -static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = {
155 - {
156 - .pa_start = 0x48070000,
157 - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1,
158 - .flags = ADDR_TYPE_RT,
159 - },
160 - { }
161 -};
162 -
163 static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = {
164 .master = &omap2420_l4_core_hwmod,
165 .slave = &omap2420_i2c1_hwmod,
166 .clk = "i2c1_ick",
167 - .addr = omap2420_i2c1_addr_space,
168 + .addr = omap2_i2c1_addr_space,
169 .user = OCP_USER_MPU | OCP_USER_SDMA,
170 };
172 /* L4 CORE -> I2C2 interface */
173 -static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = {
174 - {
175 - .pa_start = 0x48072000,
176 - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1,
177 - .flags = ADDR_TYPE_RT,
178 - },
179 - { }
180 -};
181 -
182 static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = {
183 .master = &omap2420_l4_core_hwmod,
184 .slave = &omap2420_i2c2_hwmod,
185 .clk = "i2c2_ick",
186 - .addr = omap2420_i2c2_addr_space,
187 + .addr = omap2_i2c2_addr_space,
188 .user = OCP_USER_MPU | OCP_USER_SDMA,
189 };
191 @@ -414,21 +348,13 @@ static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = {
192 { .irq = 38, },
193 };
195 -static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = {
196 - {
197 - .pa_start = 0x4802a000,
198 - .pa_end = 0x4802a000 + SZ_1K - 1,
199 - .flags = ADDR_TYPE_RT
200 - },
201 - { }
202 -};
204 /* l4_core -> timer2 */
205 static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = {
206 .master = &omap2420_l4_core_hwmod,
207 .slave = &omap2420_timer2_hwmod,
208 .clk = "gpt2_ick",
209 - .addr = omap2420_timer2_addrs,
210 + .addr = omap2xxx_timer2_addrs,
211 .user = OCP_USER_MPU | OCP_USER_SDMA,
212 };
214 @@ -464,21 +390,12 @@ static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = {
215 { .irq = 39, },
216 };
218 -static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = {
219 - {
220 - .pa_start = 0x48078000,
221 - .pa_end = 0x48078000 + SZ_1K - 1,
222 - .flags = ADDR_TYPE_RT
223 - },
224 - { }
225 -};
226 -
227 /* l4_core -> timer3 */
228 static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = {
229 .master = &omap2420_l4_core_hwmod,
230 .slave = &omap2420_timer3_hwmod,
231 .clk = "gpt3_ick",
232 - .addr = omap2420_timer3_addrs,
233 + .addr = omap2xxx_timer3_addrs,
234 .user = OCP_USER_MPU | OCP_USER_SDMA,
235 };
237 @@ -514,21 +431,12 @@ static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = {
238 { .irq = 40, },
239 };
241 -static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = {
242 - {
243 - .pa_start = 0x4807a000,
244 - .pa_end = 0x4807a000 + SZ_1K - 1,
245 - .flags = ADDR_TYPE_RT
246 - },
247 - { }
248 -};
249 -
250 /* l4_core -> timer4 */
251 static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = {
252 .master = &omap2420_l4_core_hwmod,
253 .slave = &omap2420_timer4_hwmod,
254 .clk = "gpt4_ick",
255 - .addr = omap2420_timer4_addrs,
256 + .addr = omap2xxx_timer4_addrs,
257 .user = OCP_USER_MPU | OCP_USER_SDMA,
258 };
260 @@ -564,21 +472,12 @@ static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = {
261 { .irq = 41, },
262 };
264 -static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = {
265 - {
266 - .pa_start = 0x4807c000,
267 - .pa_end = 0x4807c000 + SZ_1K - 1,
268 - .flags = ADDR_TYPE_RT
269 - },
270 - { }
271 -};
272 -
273 /* l4_core -> timer5 */
274 static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = {
275 .master = &omap2420_l4_core_hwmod,
276 .slave = &omap2420_timer5_hwmod,
277 .clk = "gpt5_ick",
278 - .addr = omap2420_timer5_addrs,
279 + .addr = omap2xxx_timer5_addrs,
280 .user = OCP_USER_MPU | OCP_USER_SDMA,
281 };
283 @@ -615,21 +514,12 @@ static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = {
284 { .irq = 42, },
285 };
287 -static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = {
288 - {
289 - .pa_start = 0x4807e000,
290 - .pa_end = 0x4807e000 + SZ_1K - 1,
291 - .flags = ADDR_TYPE_RT
292 - },
293 - { }
294 -};
295 -
296 /* l4_core -> timer6 */
297 static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = {
298 .master = &omap2420_l4_core_hwmod,
299 .slave = &omap2420_timer6_hwmod,
300 .clk = "gpt6_ick",
301 - .addr = omap2420_timer6_addrs,
302 + .addr = omap2xxx_timer6_addrs,
303 .user = OCP_USER_MPU | OCP_USER_SDMA,
304 };
306 @@ -665,21 +555,12 @@ static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = {
307 { .irq = 43, },
308 };
310 -static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = {
311 - {
312 - .pa_start = 0x48080000,
313 - .pa_end = 0x48080000 + SZ_1K - 1,
314 - .flags = ADDR_TYPE_RT
315 - },
316 - { }
317 -};
318 -
319 /* l4_core -> timer7 */
320 static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = {
321 .master = &omap2420_l4_core_hwmod,
322 .slave = &omap2420_timer7_hwmod,
323 .clk = "gpt7_ick",
324 - .addr = omap2420_timer7_addrs,
325 + .addr = omap2xxx_timer7_addrs,
326 .user = OCP_USER_MPU | OCP_USER_SDMA,
327 };
329 @@ -715,21 +596,12 @@ static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = {
330 { .irq = 44, },
331 };
333 -static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = {
334 - {
335 - .pa_start = 0x48082000,
336 - .pa_end = 0x48082000 + SZ_1K - 1,
337 - .flags = ADDR_TYPE_RT
338 - },
339 - { }
340 -};
341 -
342 /* l4_core -> timer8 */
343 static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = {
344 .master = &omap2420_l4_core_hwmod,
345 .slave = &omap2420_timer8_hwmod,
346 .clk = "gpt8_ick",
347 - .addr = omap2420_timer8_addrs,
348 + .addr = omap2xxx_timer8_addrs,
349 .user = OCP_USER_MPU | OCP_USER_SDMA,
350 };
352 @@ -765,21 +637,12 @@ static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = {
353 { .irq = 45, },
354 };
356 -static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = {
357 - {
358 - .pa_start = 0x48084000,
359 - .pa_end = 0x48084000 + SZ_1K - 1,
360 - .flags = ADDR_TYPE_RT
361 - },
362 - { }
363 -};
364 -
365 /* l4_core -> timer9 */
366 static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = {
367 .master = &omap2420_l4_core_hwmod,
368 .slave = &omap2420_timer9_hwmod,
369 .clk = "gpt9_ick",
370 - .addr = omap2420_timer9_addrs,
371 + .addr = omap2xxx_timer9_addrs,
372 .user = OCP_USER_MPU | OCP_USER_SDMA,
373 };
375 @@ -815,21 +678,12 @@ static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = {
376 { .irq = 46, },
377 };
379 -static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = {
380 - {
381 - .pa_start = 0x48086000,
382 - .pa_end = 0x48086000 + SZ_1K - 1,
383 - .flags = ADDR_TYPE_RT
384 - },
385 - { }
386 -};
387 -
388 /* l4_core -> timer10 */
389 static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = {
390 .master = &omap2420_l4_core_hwmod,
391 .slave = &omap2420_timer10_hwmod,
392 .clk = "gpt10_ick",
393 - .addr = omap2420_timer10_addrs,
394 + .addr = omap2_timer10_addrs,
395 .user = OCP_USER_MPU | OCP_USER_SDMA,
396 };
398 @@ -865,21 +719,12 @@ static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = {
399 { .irq = 47, },
400 };
402 -static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = {
403 - {
404 - .pa_start = 0x48088000,
405 - .pa_end = 0x48088000 + SZ_1K - 1,
406 - .flags = ADDR_TYPE_RT
407 - },
408 - { }
409 -};
410 -
411 /* l4_core -> timer11 */
412 static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = {
413 .master = &omap2420_l4_core_hwmod,
414 .slave = &omap2420_timer11_hwmod,
415 .clk = "gpt11_ick",
416 - .addr = omap2420_timer11_addrs,
417 + .addr = omap2_timer11_addrs,
418 .user = OCP_USER_MPU | OCP_USER_SDMA,
419 };
421 @@ -915,21 +760,12 @@ static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = {
422 { .irq = 48, },
423 };
425 -static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = {
426 - {
427 - .pa_start = 0x4808a000,
428 - .pa_end = 0x4808a000 + SZ_1K - 1,
429 - .flags = ADDR_TYPE_RT
430 - },
431 - { }
432 -};
433 -
434 /* l4_core -> timer12 */
435 static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = {
436 .master = &omap2420_l4_core_hwmod,
437 .slave = &omap2420_timer12_hwmod,
438 .clk = "gpt12_ick",
439 - .addr = omap2420_timer12_addrs,
440 + .addr = omap2xxx_timer12_addrs,
441 .user = OCP_USER_MPU | OCP_USER_SDMA,
442 };
444 @@ -1178,21 +1014,12 @@ static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = {
445 &omap2420_dss__l3,
446 };
448 -static struct omap_hwmod_addr_space omap2420_dss_addrs[] = {
449 - {
450 - .pa_start = 0x48050000,
451 - .pa_end = 0x480503FF,
452 - .flags = ADDR_TYPE_RT
453 - },
454 - { }
455 -};
456 -
457 /* l4_core -> dss */
458 static struct omap_hwmod_ocp_if omap2420_l4_core__dss = {
459 .master = &omap2420_l4_core_hwmod,
460 .slave = &omap2420_dss_core_hwmod,
461 .clk = "dss_ick",
462 - .addr = omap2420_dss_addrs,
463 + .addr = omap2_dss_addrs,
464 .fw = {
465 .omap2 = {
466 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
467 @@ -1262,21 +1089,12 @@ static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = {
468 { .irq = 25 },
469 };
471 -static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = {
472 - {
473 - .pa_start = 0x48050400,
474 - .pa_end = 0x480507FF,
475 - .flags = ADDR_TYPE_RT
476 - },
477 - { }
478 -};
479 -
480 /* l4_core -> dss_dispc */
481 static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = {
482 .master = &omap2420_l4_core_hwmod,
483 .slave = &omap2420_dss_dispc_hwmod,
484 .clk = "dss_ick",
485 - .addr = omap2420_dss_dispc_addrs,
486 + .addr = omap2_dss_dispc_addrs,
487 .fw = {
488 .omap2 = {
489 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,
490 @@ -1332,21 +1150,12 @@ static struct omap_hwmod_class omap2420_rfbi_hwmod_class = {
491 .sysc = &omap2420_rfbi_sysc,
492 };
494 -static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = {
495 - {
496 - .pa_start = 0x48050800,
497 - .pa_end = 0x48050BFF,
498 - .flags = ADDR_TYPE_RT
499 - },
500 - { }
501 -};
502 -
503 /* l4_core -> dss_rfbi */
504 static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = {
505 .master = &omap2420_l4_core_hwmod,
506 .slave = &omap2420_dss_rfbi_hwmod,
507 .clk = "dss_ick",
508 - .addr = omap2420_dss_rfbi_addrs,
509 + .addr = omap2_dss_rfbi_addrs,
510 .fw = {
511 .omap2 = {
512 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
513 @@ -1387,22 +1196,12 @@ static struct omap_hwmod_class omap2420_venc_hwmod_class = {
514 .name = "venc",
515 };
517 -/* dss_venc */
518 -static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = {
519 - {
520 - .pa_start = 0x48050C00,
521 - .pa_end = 0x48050FFF,
522 - .flags = ADDR_TYPE_RT
523 - },
524 - { }
525 -};
526 -
527 /* l4_core -> dss_venc */
528 static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
529 .master = &omap2420_l4_core_hwmod,
530 .slave = &omap2420_dss_venc_hwmod,
531 .clk = "dss_54m_fck",
532 - .addr = omap2420_dss_venc_addrs,
533 + .addr = omap2_dss_venc_addrs,
534 .fw = {
535 .omap2 = {
536 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,
537 @@ -1783,15 +1582,6 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
538 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
539 };
541 -static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
542 - {
543 - .pa_start = 0x48056000,
544 - .pa_end = 0x48056fff,
545 - .flags = ADDR_TYPE_RT
546 - },
547 - { }
548 -};
549 -
550 /* dma_system -> L3 */
551 static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
552 .master = &omap2420_dma_system_hwmod,
553 @@ -1810,7 +1600,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
554 .master = &omap2420_l4_core_hwmod,
555 .slave = &omap2420_dma_system_hwmod,
556 .clk = "sdma_ick",
557 - .addr = omap2420_dma_system_addrs,
558 + .addr = omap2_dma_system_addrs,
559 .user = OCP_USER_MPU | OCP_USER_SDMA,
560 };
562 @@ -1862,20 +1652,11 @@ static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {
563 { .name = "iva", .irq = 34 },
564 };
566 -static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = {
567 - {
568 - .pa_start = 0x48094000,
569 - .pa_end = 0x480941ff,
570 - .flags = ADDR_TYPE_RT,
571 - },
572 - { }
573 -};
574 -
575 /* l4_core -> mailbox */
576 static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = {
577 .master = &omap2420_l4_core_hwmod,
578 .slave = &omap2420_mailbox_hwmod,
579 - .addr = omap2420_mailbox_addrs,
580 + .addr = omap2_mailbox_addrs,
581 .user = OCP_USER_MPU | OCP_USER_SDMA,
582 };
584 @@ -2037,22 +1818,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = {
585 { .name = "tx", .dma_req = 31 },
586 };
588 -static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = {
589 - {
590 - .name = "mpu",
591 - .pa_start = 0x48074000,
592 - .pa_end = 0x480740ff,
593 - .flags = ADDR_TYPE_RT
594 - },
595 - { }
596 -};
597 -
598 /* l4_core -> mcbsp1 */
599 static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = {
600 .master = &omap2420_l4_core_hwmod,
601 .slave = &omap2420_mcbsp1_hwmod,
602 .clk = "mcbsp1_ick",
603 - .addr = omap2420_mcbsp1_addrs,
604 + .addr = omap2_mcbsp1_addrs,
605 .user = OCP_USER_MPU | OCP_USER_SDMA,
606 };
608 @@ -2094,22 +1865,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = {
609 { .name = "tx", .dma_req = 33 },
610 };
612 -static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = {
613 - {
614 - .name = "mpu",
615 - .pa_start = 0x48076000,
616 - .pa_end = 0x480760ff,
617 - .flags = ADDR_TYPE_RT
618 - },
619 - { }
620 -};
621 -
622 /* l4_core -> mcbsp2 */
623 static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = {
624 .master = &omap2420_l4_core_hwmod,
625 .slave = &omap2420_mcbsp2_hwmod,
626 .clk = "mcbsp2_ick",
627 - .addr = omap2420_mcbsp2_addrs,
628 + .addr = omap2xxx_mcbsp2_addrs,
629 .user = OCP_USER_MPU | OCP_USER_SDMA,
630 };
632 diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
633 index da28794..9531ef2 100644
634 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
635 +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
636 @@ -131,42 +131,21 @@ static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = {
637 .user = OCP_USER_MPU,
638 };
640 -/* I2C IP block address space length (in bytes) */
641 -#define OMAP2_I2C_AS_LEN 128
642 -
643 /* L4 CORE -> I2C1 interface */
644 -static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = {
645 - {
646 - .pa_start = 0x48070000,
647 - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1,
648 - .flags = ADDR_TYPE_RT,
649 - },
650 - { }
651 -};
652 -
653 static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = {
654 .master = &omap2430_l4_core_hwmod,
655 .slave = &omap2430_i2c1_hwmod,
656 .clk = "i2c1_ick",
657 - .addr = omap2430_i2c1_addr_space,
658 + .addr = omap2_i2c1_addr_space,
659 .user = OCP_USER_MPU | OCP_USER_SDMA,
660 };
662 /* L4 CORE -> I2C2 interface */
663 -static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = {
664 - {
665 - .pa_start = 0x48072000,
666 - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1,
667 - .flags = ADDR_TYPE_RT,
668 - },
669 - { }
670 -};
671 -
672 static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = {
673 .master = &omap2430_l4_core_hwmod,
674 .slave = &omap2430_i2c2_hwmod,
675 .clk = "i2c2_ick",
676 - .addr = omap2430_i2c2_addr_space,
677 + .addr = omap2_i2c2_addr_space,
678 .user = OCP_USER_MPU | OCP_USER_SDMA,
679 };
681 @@ -178,56 +157,29 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
682 };
684 /* L4 CORE -> UART1 interface */
685 -static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = {
686 - {
687 - .pa_start = OMAP2_UART1_BASE,
688 - .pa_end = OMAP2_UART1_BASE + SZ_8K - 1,
689 - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
690 - },
691 - { }
692 -};
693 -
694 static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
695 .master = &omap2430_l4_core_hwmod,
696 .slave = &omap2430_uart1_hwmod,
697 .clk = "uart1_ick",
698 - .addr = omap2430_uart1_addr_space,
699 + .addr = omap2xxx_uart1_addr_space,
700 .user = OCP_USER_MPU | OCP_USER_SDMA,
701 };
703 /* L4 CORE -> UART2 interface */
704 -static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = {
705 - {
706 - .pa_start = OMAP2_UART2_BASE,
707 - .pa_end = OMAP2_UART2_BASE + SZ_1K - 1,
708 - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
709 - },
710 - { }
711 -};
712 -
713 static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
714 .master = &omap2430_l4_core_hwmod,
715 .slave = &omap2430_uart2_hwmod,
716 .clk = "uart2_ick",
717 - .addr = omap2430_uart2_addr_space,
718 + .addr = omap2xxx_uart2_addr_space,
719 .user = OCP_USER_MPU | OCP_USER_SDMA,
720 };
722 /* L4 PER -> UART3 interface */
723 -static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = {
724 - {
725 - .pa_start = OMAP2_UART3_BASE,
726 - .pa_end = OMAP2_UART3_BASE + SZ_1K - 1,
727 - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
728 - },
729 - { }
730 -};
731 -
732 static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
733 .master = &omap2430_l4_core_hwmod,
734 .slave = &omap2430_uart3_hwmod,
735 .clk = "uart3_ick",
736 - .addr = omap2430_uart3_addr_space,
737 + .addr = omap2xxx_uart3_addr_space,
738 .user = OCP_USER_MPU | OCP_USER_SDMA,
739 };
741 @@ -260,15 +212,6 @@ static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = {
742 };
744 /* L4 CORE -> MMC1 interface */
745 -static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
746 - {
747 - .pa_start = 0x4809c000,
748 - .pa_end = 0x4809c1ff,
749 - .flags = ADDR_TYPE_RT,
750 - },
751 - { }
752 -};
753 -
754 static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {
755 .master = &omap2430_l4_core_hwmod,
756 .slave = &omap2430_mmc1_hwmod,
757 @@ -278,15 +221,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {
758 };
760 /* L4 CORE -> MMC2 interface */
761 -static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
762 - {
763 - .pa_start = 0x480b4000,
764 - .pa_end = 0x480b41ff,
765 - .flags = ADDR_TYPE_RT,
766 - },
767 - { }
768 -};
769 -
770 static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = {
771 .master = &omap2430_l4_core_hwmod,
772 .slave = &omap2430_mmc2_hwmod,
773 @@ -332,51 +266,24 @@ static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
774 };
776 /* l4 core -> mcspi1 interface */
777 -static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = {
778 - {
779 - .pa_start = 0x48098000,
780 - .pa_end = 0x480980ff,
781 - .flags = ADDR_TYPE_RT,
782 - },
783 - { }
784 -};
785 -
786 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = {
787 .master = &omap2430_l4_core_hwmod,
788 .slave = &omap2430_mcspi1_hwmod,
789 .clk = "mcspi1_ick",
790 - .addr = omap2430_mcspi1_addr_space,
791 + .addr = omap2_mcspi1_addr_space,
792 .user = OCP_USER_MPU | OCP_USER_SDMA,
793 };
795 /* l4 core -> mcspi2 interface */
796 -static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = {
797 - {
798 - .pa_start = 0x4809a000,
799 - .pa_end = 0x4809a0ff,
800 - .flags = ADDR_TYPE_RT,
801 - },
802 - { }
803 -};
804 -
805 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = {
806 .master = &omap2430_l4_core_hwmod,
807 .slave = &omap2430_mcspi2_hwmod,
808 .clk = "mcspi2_ick",
809 - .addr = omap2430_mcspi2_addr_space,
810 + .addr = omap2_mcspi2_addr_space,
811 .user = OCP_USER_MPU | OCP_USER_SDMA,
812 };
814 /* l4 core -> mcspi3 interface */
815 -static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = {
816 - {
817 - .pa_start = 0x480b8000,
818 - .pa_end = 0x480b80ff,
819 - .flags = ADDR_TYPE_RT,
820 - },
821 - { }
822 -};
823 -
824 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = {
825 .master = &omap2430_l4_core_hwmod,
826 .slave = &omap2430_mcspi3_hwmod,
827 @@ -514,21 +421,12 @@ static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = {
828 { .irq = 38, },
829 };
831 -static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = {
832 - {
833 - .pa_start = 0x4802a000,
834 - .pa_end = 0x4802a000 + SZ_1K - 1,
835 - .flags = ADDR_TYPE_RT
836 - },
837 - { }
838 -};
839 -
840 /* l4_core -> timer2 */
841 static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = {
842 .master = &omap2430_l4_core_hwmod,
843 .slave = &omap2430_timer2_hwmod,
844 .clk = "gpt2_ick",
845 - .addr = omap2430_timer2_addrs,
846 + .addr = omap2xxx_timer2_addrs,
847 .user = OCP_USER_MPU | OCP_USER_SDMA,
848 };
850 @@ -564,21 +462,12 @@ static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = {
851 { .irq = 39, },
852 };
854 -static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = {
855 - {
856 - .pa_start = 0x48078000,
857 - .pa_end = 0x48078000 + SZ_1K - 1,
858 - .flags = ADDR_TYPE_RT
859 - },
860 - { }
861 -};
862 -
863 /* l4_core -> timer3 */
864 static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = {
865 .master = &omap2430_l4_core_hwmod,
866 .slave = &omap2430_timer3_hwmod,
867 .clk = "gpt3_ick",
868 - .addr = omap2430_timer3_addrs,
869 + .addr = omap2xxx_timer3_addrs,
870 .user = OCP_USER_MPU | OCP_USER_SDMA,
871 };
873 @@ -614,21 +503,12 @@ static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = {
874 { .irq = 40, },
875 };
877 -static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = {
878 - {
879 - .pa_start = 0x4807a000,
880 - .pa_end = 0x4807a000 + SZ_1K - 1,
881 - .flags = ADDR_TYPE_RT
882 - },
883 - { }
884 -};
885 -
886 /* l4_core -> timer4 */
887 static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = {
888 .master = &omap2430_l4_core_hwmod,
889 .slave = &omap2430_timer4_hwmod,
890 .clk = "gpt4_ick",
891 - .addr = omap2430_timer4_addrs,
892 + .addr = omap2xxx_timer4_addrs,
893 .user = OCP_USER_MPU | OCP_USER_SDMA,
894 };
896 @@ -664,21 +544,12 @@ static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = {
897 { .irq = 41, },
898 };
900 -static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = {
901 - {
902 - .pa_start = 0x4807c000,
903 - .pa_end = 0x4807c000 + SZ_1K - 1,
904 - .flags = ADDR_TYPE_RT
905 - },
906 - { }
907 -};
908 -
909 /* l4_core -> timer5 */
910 static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = {
911 .master = &omap2430_l4_core_hwmod,
912 .slave = &omap2430_timer5_hwmod,
913 .clk = "gpt5_ick",
914 - .addr = omap2430_timer5_addrs,
915 + .addr = omap2xxx_timer5_addrs,
916 .user = OCP_USER_MPU | OCP_USER_SDMA,
917 };
919 @@ -714,21 +585,12 @@ static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = {
920 { .irq = 42, },
921 };
923 -static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = {
924 - {
925 - .pa_start = 0x4807e000,
926 - .pa_end = 0x4807e000 + SZ_1K - 1,
927 - .flags = ADDR_TYPE_RT
928 - },
929 - { }
930 -};
931 -
932 /* l4_core -> timer6 */
933 static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = {
934 .master = &omap2430_l4_core_hwmod,
935 .slave = &omap2430_timer6_hwmod,
936 .clk = "gpt6_ick",
937 - .addr = omap2430_timer6_addrs,
938 + .addr = omap2xxx_timer6_addrs,
939 .user = OCP_USER_MPU | OCP_USER_SDMA,
940 };
942 @@ -764,21 +626,12 @@ static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = {
943 { .irq = 43, },
944 };
946 -static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = {
947 - {
948 - .pa_start = 0x48080000,
949 - .pa_end = 0x48080000 + SZ_1K - 1,
950 - .flags = ADDR_TYPE_RT
951 - },
952 - { }
953 -};
954 -
955 /* l4_core -> timer7 */
956 static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = {
957 .master = &omap2430_l4_core_hwmod,
958 .slave = &omap2430_timer7_hwmod,
959 .clk = "gpt7_ick",
960 - .addr = omap2430_timer7_addrs,
961 + .addr = omap2xxx_timer7_addrs,
962 .user = OCP_USER_MPU | OCP_USER_SDMA,
963 };
965 @@ -814,21 +667,12 @@ static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = {
966 { .irq = 44, },
967 };
969 -static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = {
970 - {
971 - .pa_start = 0x48082000,
972 - .pa_end = 0x48082000 + SZ_1K - 1,
973 - .flags = ADDR_TYPE_RT
974 - },
975 - { }
976 -};
977 -
978 /* l4_core -> timer8 */
979 static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = {
980 .master = &omap2430_l4_core_hwmod,
981 .slave = &omap2430_timer8_hwmod,
982 .clk = "gpt8_ick",
983 - .addr = omap2430_timer8_addrs,
984 + .addr = omap2xxx_timer8_addrs,
985 .user = OCP_USER_MPU | OCP_USER_SDMA,
986 };
988 @@ -864,21 +708,12 @@ static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = {
989 { .irq = 45, },
990 };
992 -static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = {
993 - {
994 - .pa_start = 0x48084000,
995 - .pa_end = 0x48084000 + SZ_1K - 1,
996 - .flags = ADDR_TYPE_RT
997 - },
998 - { }
999 -};
1000 -
1001 /* l4_core -> timer9 */
1002 static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = {
1003 .master = &omap2430_l4_core_hwmod,
1004 .slave = &omap2430_timer9_hwmod,
1005 .clk = "gpt9_ick",
1006 - .addr = omap2430_timer9_addrs,
1007 + .addr = omap2xxx_timer9_addrs,
1008 .user = OCP_USER_MPU | OCP_USER_SDMA,
1009 };
1011 @@ -914,21 +749,12 @@ static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = {
1012 { .irq = 46, },
1013 };
1015 -static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = {
1016 - {
1017 - .pa_start = 0x48086000,
1018 - .pa_end = 0x48086000 + SZ_1K - 1,
1019 - .flags = ADDR_TYPE_RT
1020 - },
1021 - { }
1022 -};
1023 -
1024 /* l4_core -> timer10 */
1025 static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = {
1026 .master = &omap2430_l4_core_hwmod,
1027 .slave = &omap2430_timer10_hwmod,
1028 .clk = "gpt10_ick",
1029 - .addr = omap2430_timer10_addrs,
1030 + .addr = omap2_timer10_addrs,
1031 .user = OCP_USER_MPU | OCP_USER_SDMA,
1032 };
1034 @@ -964,21 +790,12 @@ static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = {
1035 { .irq = 47, },
1036 };
1038 -static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = {
1039 - {
1040 - .pa_start = 0x48088000,
1041 - .pa_end = 0x48088000 + SZ_1K - 1,
1042 - .flags = ADDR_TYPE_RT
1043 - },
1044 - { }
1045 -};
1046 -
1047 /* l4_core -> timer11 */
1048 static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = {
1049 .master = &omap2430_l4_core_hwmod,
1050 .slave = &omap2430_timer11_hwmod,
1051 .clk = "gpt11_ick",
1052 - .addr = omap2430_timer11_addrs,
1053 + .addr = omap2_timer11_addrs,
1054 .user = OCP_USER_MPU | OCP_USER_SDMA,
1055 };
1057 @@ -1014,21 +831,12 @@ static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = {
1058 { .irq = 48, },
1059 };
1061 -static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = {
1062 - {
1063 - .pa_start = 0x4808a000,
1064 - .pa_end = 0x4808a000 + SZ_1K - 1,
1065 - .flags = ADDR_TYPE_RT
1066 - },
1067 - { }
1068 -};
1069 -
1070 /* l4_core -> timer12 */
1071 static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = {
1072 .master = &omap2430_l4_core_hwmod,
1073 .slave = &omap2430_timer12_hwmod,
1074 .clk = "gpt12_ick",
1075 - .addr = omap2430_timer12_addrs,
1076 + .addr = omap2xxx_timer12_addrs,
1077 .user = OCP_USER_MPU | OCP_USER_SDMA,
1078 };
1080 @@ -1277,21 +1085,12 @@ static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = {
1081 &omap2430_dss__l3,
1082 };
1084 -static struct omap_hwmod_addr_space omap2430_dss_addrs[] = {
1085 - {
1086 - .pa_start = 0x48050000,
1087 - .pa_end = 0x480503FF,
1088 - .flags = ADDR_TYPE_RT
1089 - },
1090 - { }
1091 -};
1092 -
1093 /* l4_core -> dss */
1094 static struct omap_hwmod_ocp_if omap2430_l4_core__dss = {
1095 .master = &omap2430_l4_core_hwmod,
1096 .slave = &omap2430_dss_core_hwmod,
1097 .clk = "dss_ick",
1098 - .addr = omap2430_dss_addrs,
1099 + .addr = omap2_dss_addrs,
1100 .user = OCP_USER_MPU | OCP_USER_SDMA,
1101 };
1103 @@ -1355,21 +1154,12 @@ static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = {
1104 { .irq = 25 },
1105 };
1107 -static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = {
1108 - {
1109 - .pa_start = 0x48050400,
1110 - .pa_end = 0x480507FF,
1111 - .flags = ADDR_TYPE_RT
1112 - },
1113 - { }
1114 -};
1115 -
1116 /* l4_core -> dss_dispc */
1117 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = {
1118 .master = &omap2430_l4_core_hwmod,
1119 .slave = &omap2430_dss_dispc_hwmod,
1120 .clk = "dss_ick",
1121 - .addr = omap2430_dss_dispc_addrs,
1122 + .addr = omap2_dss_dispc_addrs,
1123 .user = OCP_USER_MPU | OCP_USER_SDMA,
1124 };
1126 @@ -1419,21 +1209,12 @@ static struct omap_hwmod_class omap2430_rfbi_hwmod_class = {
1127 .sysc = &omap2430_rfbi_sysc,
1128 };
1130 -static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = {
1131 - {
1132 - .pa_start = 0x48050800,
1133 - .pa_end = 0x48050BFF,
1134 - .flags = ADDR_TYPE_RT
1135 - },
1136 - { }
1137 -};
1138 -
1139 /* l4_core -> dss_rfbi */
1140 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = {
1141 .master = &omap2430_l4_core_hwmod,
1142 .slave = &omap2430_dss_rfbi_hwmod,
1143 .clk = "dss_ick",
1144 - .addr = omap2430_dss_rfbi_addrs,
1145 + .addr = omap2_dss_rfbi_addrs,
1146 .user = OCP_USER_MPU | OCP_USER_SDMA,
1147 };
1149 @@ -1468,22 +1249,12 @@ static struct omap_hwmod_class omap2430_venc_hwmod_class = {
1150 .name = "venc",
1151 };
1153 -/* dss_venc */
1154 -static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = {
1155 - {
1156 - .pa_start = 0x48050C00,
1157 - .pa_end = 0x48050FFF,
1158 - .flags = ADDR_TYPE_RT
1159 - },
1160 - { }
1161 -};
1162 -
1163 /* l4_core -> dss_venc */
1164 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1165 .master = &omap2430_l4_core_hwmod,
1166 .slave = &omap2430_dss_venc_hwmod,
1167 .clk = "dss_54m_fck",
1168 - .addr = omap2430_dss_venc_addrs,
1169 + .addr = omap2_dss_venc_addrs,
1170 .flags = OCPIF_SWSUP_IDLE,
1171 .user = OCP_USER_MPU | OCP_USER_SDMA,
1172 };
1173 @@ -1916,15 +1687,6 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
1174 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
1175 };
1177 -static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = {
1178 - {
1179 - .pa_start = 0x48056000,
1180 - .pa_end = 0x48056fff,
1181 - .flags = ADDR_TYPE_RT
1182 - },
1183 - { }
1184 -};
1185 -
1186 /* dma_system -> L3 */
1187 static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
1188 .master = &omap2430_dma_system_hwmod,
1189 @@ -1943,7 +1705,7 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
1190 .master = &omap2430_l4_core_hwmod,
1191 .slave = &omap2430_dma_system_hwmod,
1192 .clk = "sdma_ick",
1193 - .addr = omap2430_dma_system_addrs,
1194 + .addr = omap2_dma_system_addrs,
1195 .user = OCP_USER_MPU | OCP_USER_SDMA,
1196 };
1198 @@ -1994,20 +1756,11 @@ static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {
1199 { .irq = 26 },
1200 };
1202 -static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = {
1203 - {
1204 - .pa_start = 0x48094000,
1205 - .pa_end = 0x480941ff,
1206 - .flags = ADDR_TYPE_RT,
1207 - },
1208 - { }
1209 -};
1210 -
1211 /* l4_core -> mailbox */
1212 static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = {
1213 .master = &omap2430_l4_core_hwmod,
1214 .slave = &omap2430_mailbox_hwmod,
1215 - .addr = omap2430_mailbox_addrs,
1216 + .addr = omap2_mailbox_addrs,
1217 .user = OCP_USER_MPU | OCP_USER_SDMA,
1218 };
1220 @@ -2279,22 +2032,12 @@ static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = {
1221 { .name = "tx", .dma_req = 31 },
1222 };
1224 -static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = {
1225 - {
1226 - .name = "mpu",
1227 - .pa_start = 0x48074000,
1228 - .pa_end = 0x480740ff,
1229 - .flags = ADDR_TYPE_RT
1230 - },
1231 - { }
1232 -};
1233 -
1234 /* l4_core -> mcbsp1 */
1235 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = {
1236 .master = &omap2430_l4_core_hwmod,
1237 .slave = &omap2430_mcbsp1_hwmod,
1238 .clk = "mcbsp1_ick",
1239 - .addr = omap2430_mcbsp1_addrs,
1240 + .addr = omap2_mcbsp1_addrs,
1241 .user = OCP_USER_MPU | OCP_USER_SDMA,
1242 };
1244 @@ -2337,22 +2080,12 @@ static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = {
1245 { .name = "tx", .dma_req = 33 },
1246 };
1248 -static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = {
1249 - {
1250 - .name = "mpu",
1251 - .pa_start = 0x48076000,
1252 - .pa_end = 0x480760ff,
1253 - .flags = ADDR_TYPE_RT
1254 - },
1255 - { }
1256 -};
1257 -
1258 /* l4_core -> mcbsp2 */
1259 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = {
1260 .master = &omap2430_l4_core_hwmod,
1261 .slave = &omap2430_mcbsp2_hwmod,
1262 .clk = "mcbsp2_ick",
1263 - .addr = omap2430_mcbsp2_addrs,
1264 + .addr = omap2xxx_mcbsp2_addrs,
1265 .user = OCP_USER_MPU | OCP_USER_SDMA,
1266 };
1268 diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
1269 new file mode 100644
1270 index 0000000..04637fa
1271 --- /dev/null
1272 +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
1273 @@ -0,0 +1,173 @@
1274 +/*
1275 + * omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3
1276 + *
1277 + * Copyright (C) 2009-2011 Nokia Corporation
1278 + * Paul Walmsley
1279 + *
1280 + * This program is free software; you can redistribute it and/or modify
1281 + * it under the terms of the GNU General Public License version 2 as
1282 + * published by the Free Software Foundation.
1283 + *
1284 + * XXX handle crossbar/shared link difference for L3?
1285 + * XXX these should be marked initdata for multi-OMAP kernels
1286 + */
1287 +#include <asm/sizes.h>
1288 +
1289 +#include <plat/omap_hwmod.h>
1290 +#include <plat/serial.h>
1291 +
1292 +#include "omap_hwmod_common_data.h"
1293 +
1294 +struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
1295 + {
1296 + .pa_start = 0x4809c000,
1297 + .pa_end = 0x4809c1ff,
1298 + .flags = ADDR_TYPE_RT,
1299 + },
1300 + { }
1301 +};
1302 +
1303 +struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
1304 + {
1305 + .pa_start = 0x480b4000,
1306 + .pa_end = 0x480b41ff,
1307 + .flags = ADDR_TYPE_RT,
1308 + },
1309 + { }
1310 +};
1311 +
1312 +struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = {
1313 + {
1314 + .pa_start = 0x48070000,
1315 + .pa_end = 0x48070000 + SZ_128 - 1,
1316 + .flags = ADDR_TYPE_RT,
1317 + },
1318 + { }
1319 +};
1320 +
1321 +struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = {
1322 + {
1323 + .pa_start = 0x48072000,
1324 + .pa_end = 0x48072000 + SZ_128 - 1,
1325 + .flags = ADDR_TYPE_RT,
1326 + },
1327 + { }
1328 +};
1329 +
1330 +struct omap_hwmod_addr_space omap2_dss_addrs[] = {
1331 + {
1332 + .pa_start = 0x48050000,
1333 + .pa_end = 0x48050000 + SZ_1K - 1,
1334 + .flags = ADDR_TYPE_RT
1335 + },
1336 + { }
1337 +};
1338 +
1339 +struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = {
1340 + {
1341 + .pa_start = 0x48050400,
1342 + .pa_end = 0x48050400 + SZ_1K - 1,
1343 + .flags = ADDR_TYPE_RT
1344 + },
1345 + { }
1346 +};
1347 +
1348 +struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = {
1349 + {
1350 + .pa_start = 0x48050800,
1351 + .pa_end = 0x48050800 + SZ_1K - 1,
1352 + .flags = ADDR_TYPE_RT
1353 + },
1354 + { }
1355 +};
1356 +
1357 +struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = {
1358 + {
1359 + .pa_start = 0x48050C00,
1360 + .pa_end = 0x48050C00 + SZ_1K - 1,
1361 + .flags = ADDR_TYPE_RT
1362 + },
1363 + { }
1364 +};
1365 +
1366 +struct omap_hwmod_addr_space omap2_timer10_addrs[] = {
1367 + {
1368 + .pa_start = 0x48086000,
1369 + .pa_end = 0x48086000 + SZ_1K - 1,
1370 + .flags = ADDR_TYPE_RT
1371 + },
1372 + { }
1373 +};
1374 +
1375 +struct omap_hwmod_addr_space omap2_timer11_addrs[] = {
1376 + {
1377 + .pa_start = 0x48088000,
1378 + .pa_end = 0x48088000 + SZ_1K - 1,
1379 + .flags = ADDR_TYPE_RT
1380 + },
1381 + { }
1382 +};
1383 +
1384 +struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = {
1385 + {
1386 + .pa_start = 0x4808a000,
1387 + .pa_end = 0x4808a000 + SZ_1K - 1,
1388 + .flags = ADDR_TYPE_RT
1389 + },
1390 + { }
1391 +};
1392 +
1393 +struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = {
1394 + {
1395 + .pa_start = 0x48098000,
1396 + .pa_end = 0x48098000 + SZ_256 - 1,
1397 + .flags = ADDR_TYPE_RT,
1398 + },
1399 + { }
1400 +};
1401 +
1402 +struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = {
1403 + {
1404 + .pa_start = 0x4809a000,
1405 + .pa_end = 0x4809a000 + SZ_256 - 1,
1406 + .flags = ADDR_TYPE_RT,
1407 + },
1408 + { }
1409 +};
1410 +
1411 +struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = {
1412 + {
1413 + .pa_start = 0x480b8000,
1414 + .pa_end = 0x480b8000 + SZ_256 - 1,
1415 + .flags = ADDR_TYPE_RT,
1416 + },
1417 + { }
1418 +};
1419 +
1420 +struct omap_hwmod_addr_space omap2_dma_system_addrs[] = {
1421 + {
1422 + .pa_start = 0x48056000,
1423 + .pa_end = 0x48056000 + SZ_4K - 1,
1424 + .flags = ADDR_TYPE_RT
1425 + },
1426 + { }
1427 +};
1428 +
1429 +struct omap_hwmod_addr_space omap2_mailbox_addrs[] = {
1430 + {
1431 + .pa_start = 0x48094000,
1432 + .pa_end = 0x48094000 + SZ_512 - 1,
1433 + .flags = ADDR_TYPE_RT,
1434 + },
1435 + { }
1436 +};
1437 +
1438 +struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = {
1439 + {
1440 + .name = "mpu",
1441 + .pa_start = 0x48074000,
1442 + .pa_end = 0x480740ff,
1443 + .flags = ADDR_TYPE_RT
1444 + },
1445 + { }
1446 +};
1447 diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
1448 new file mode 100644
1449 index 0000000..4f3547c
1450 --- /dev/null
1451 +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
1452 @@ -0,0 +1,130 @@
1453 +/*
1454 + * omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx
1455 + *
1456 + * Copyright (C) 2009-2011 Nokia Corporation
1457 + * Paul Walmsley
1458 + *
1459 + * This program is free software; you can redistribute it and/or modify
1460 + * it under the terms of the GNU General Public License version 2 as
1461 + * published by the Free Software Foundation.
1462 + *
1463 + * XXX handle crossbar/shared link difference for L3?
1464 + * XXX these should be marked initdata for multi-OMAP kernels
1465 + */
1466 +#include <asm/sizes.h>
1467 +
1468 +#include <plat/omap_hwmod.h>
1469 +#include <plat/serial.h>
1470 +
1471 +#include "omap_hwmod_common_data.h"
1472 +
1473 +struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
1474 + {
1475 + .pa_start = OMAP2_UART1_BASE,
1476 + .pa_end = OMAP2_UART1_BASE + SZ_8K - 1,
1477 + .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
1478 + },
1479 + { }
1480 +};
1481 +
1482 +struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
1483 + {
1484 + .pa_start = OMAP2_UART2_BASE,
1485 + .pa_end = OMAP2_UART2_BASE + SZ_1K - 1,
1486 + .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
1487 + },
1488 + { }
1489 +};
1490 +
1491 +struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
1492 + {
1493 + .pa_start = OMAP2_UART3_BASE,
1494 + .pa_end = OMAP2_UART3_BASE + SZ_1K - 1,
1495 + .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
1496 + },
1497 + { }
1498 +};
1499 +
1500 +struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
1501 + {
1502 + .pa_start = 0x4802a000,
1503 + .pa_end = 0x4802a000 + SZ_1K - 1,
1504 + .flags = ADDR_TYPE_RT
1505 + },
1506 + { }
1507 +};
1508 +
1509 +struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
1510 + {
1511 + .pa_start = 0x48078000,
1512 + .pa_end = 0x48078000 + SZ_1K - 1,
1513 + .flags = ADDR_TYPE_RT
1514 + },
1515 + { }
1516 +};
1517 +
1518 +struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
1519 + {
1520 + .pa_start = 0x4807a000,
1521 + .pa_end = 0x4807a000 + SZ_1K - 1,
1522 + .flags = ADDR_TYPE_RT
1523 + },
1524 + { }
1525 +};
1526 +
1527 +struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
1528 + {
1529 + .pa_start = 0x4807c000,
1530 + .pa_end = 0x4807c000 + SZ_1K - 1,
1531 + .flags = ADDR_TYPE_RT
1532 + },
1533 + { }
1534 +};
1535 +
1536 +struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
1537 + {
1538 + .pa_start = 0x4807e000,
1539 + .pa_end = 0x4807e000 + SZ_1K - 1,
1540 + .flags = ADDR_TYPE_RT
1541 + },
1542 + { }
1543 +};
1544 +
1545 +struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
1546 + {
1547 + .pa_start = 0x48080000,
1548 + .pa_end = 0x48080000 + SZ_1K - 1,
1549 + .flags = ADDR_TYPE_RT
1550 + },
1551 + { }
1552 +};
1553 +
1554 +struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
1555 + {
1556 + .pa_start = 0x48082000,
1557 + .pa_end = 0x48082000 + SZ_1K - 1,
1558 + .flags = ADDR_TYPE_RT
1559 + },
1560 + { }
1561 +};
1562 +
1563 +struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = {
1564 + {
1565 + .pa_start = 0x48084000,
1566 + .pa_end = 0x48084000 + SZ_1K - 1,
1567 + .flags = ADDR_TYPE_RT
1568 + },
1569 + { }
1570 +};
1571 +
1572 +struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = {
1573 + {
1574 + .name = "mpu",
1575 + .pa_start = 0x48076000,
1576 + .pa_end = 0x480760ff,
1577 + .flags = ADDR_TYPE_RT
1578 + },
1579 + { }
1580 +};
1581 +
1582 +
1583 diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
1584 index 6410779..791f9b2 100644
1585 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
1586 +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
1587 @@ -190,39 +190,21 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {
1588 };
1590 /* L4 CORE -> MMC1 interface */
1591 -static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = {
1592 - {
1593 - .pa_start = 0x4809c000,
1594 - .pa_end = 0x4809c1ff,
1595 - .flags = ADDR_TYPE_RT,
1596 - },
1597 - { }
1598 -};
1599 -
1600 static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = {
1601 .master = &omap3xxx_l4_core_hwmod,
1602 .slave = &omap3xxx_mmc1_hwmod,
1603 .clk = "mmchs1_ick",
1604 - .addr = omap3xxx_mmc1_addr_space,
1605 + .addr = omap2430_mmc1_addr_space,
1606 .user = OCP_USER_MPU | OCP_USER_SDMA,
1607 .flags = OMAP_FIREWALL_L4
1608 };
1610 /* L4 CORE -> MMC2 interface */
1611 -static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = {
1612 - {
1613 - .pa_start = 0x480b4000,
1614 - .pa_end = 0x480b41ff,
1615 - .flags = ADDR_TYPE_RT,
1616 - },
1617 - { }
1618 -};
1619 -
1620 static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = {
1621 .master = &omap3xxx_l4_core_hwmod,
1622 .slave = &omap3xxx_mmc2_hwmod,
1623 .clk = "mmchs2_ick",
1624 - .addr = omap3xxx_mmc2_addr_space,
1625 + .addr = omap2430_mmc2_addr_space,
1626 .user = OCP_USER_MPU | OCP_USER_SDMA,
1627 .flags = OMAP_FIREWALL_L4
1628 };
1629 @@ -318,24 +300,12 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = {
1630 .user = OCP_USER_MPU | OCP_USER_SDMA,
1631 };
1633 -/* I2C IP block address space length (in bytes) */
1634 -#define OMAP2_I2C_AS_LEN 128
1635 -
1636 /* L4 CORE -> I2C1 interface */
1637 -static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = {
1638 - {
1639 - .pa_start = 0x48070000,
1640 - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1,
1641 - .flags = ADDR_TYPE_RT,
1642 - },
1643 - { }
1644 -};
1645 -
1646 static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {
1647 .master = &omap3xxx_l4_core_hwmod,
1648 .slave = &omap3xxx_i2c1_hwmod,
1649 .clk = "i2c1_ick",
1650 - .addr = omap3xxx_i2c1_addr_space,
1651 + .addr = omap2_i2c1_addr_space,
1652 .fw = {
1653 .omap2 = {
1654 .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION,
1655 @@ -347,20 +317,11 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {
1656 };
1658 /* L4 CORE -> I2C2 interface */
1659 -static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = {
1660 - {
1661 - .pa_start = 0x48072000,
1662 - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1,
1663 - .flags = ADDR_TYPE_RT,
1664 - },
1665 - { }
1666 -};
1667 -
1668 static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = {
1669 .master = &omap3xxx_l4_core_hwmod,
1670 .slave = &omap3xxx_i2c2_hwmod,
1671 .clk = "i2c2_ick",
1672 - .addr = omap3xxx_i2c2_addr_space,
1673 + .addr = omap2_i2c2_addr_space,
1674 .fw = {
1675 .omap2 = {
1676 .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION,
1677 @@ -375,7 +336,7 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = {
1678 static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = {
1679 {
1680 .pa_start = 0x48060000,
1681 - .pa_end = 0x48060000 + OMAP2_I2C_AS_LEN - 1,
1682 + .pa_end = 0x48060000 + SZ_128 - 1,
1683 .flags = ADDR_TYPE_RT,
1684 },
1685 { }
1686 @@ -1065,21 +1026,12 @@ static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = {
1687 { .irq = 46, },
1688 };
1690 -static struct omap_hwmod_addr_space omap3xxx_timer10_addrs[] = {
1691 - {
1692 - .pa_start = 0x48086000,
1693 - .pa_end = 0x48086000 + SZ_1K - 1,
1694 - .flags = ADDR_TYPE_RT
1695 - },
1696 - { }
1697 -};
1698 -
1699 /* l4_core -> timer10 */
1700 static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = {
1701 .master = &omap3xxx_l4_core_hwmod,
1702 .slave = &omap3xxx_timer10_hwmod,
1703 .clk = "gpt10_ick",
1704 - .addr = omap3xxx_timer10_addrs,
1705 + .addr = omap2_timer10_addrs,
1706 .user = OCP_USER_MPU | OCP_USER_SDMA,
1707 };
1709 @@ -1115,21 +1067,12 @@ static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = {
1710 { .irq = 47, },
1711 };
1713 -static struct omap_hwmod_addr_space omap3xxx_timer11_addrs[] = {
1714 - {
1715 - .pa_start = 0x48088000,
1716 - .pa_end = 0x48088000 + SZ_1K - 1,
1717 - .flags = ADDR_TYPE_RT
1718 - },
1719 - { }
1720 -};
1721 -
1722 /* l4_core -> timer11 */
1723 static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = {
1724 .master = &omap3xxx_l4_core_hwmod,
1725 .slave = &omap3xxx_timer11_hwmod,
1726 .clk = "gpt11_ick",
1727 - .addr = omap3xxx_timer11_addrs,
1728 + .addr = omap2_timer11_addrs,
1729 .user = OCP_USER_MPU | OCP_USER_SDMA,
1730 };
1732 @@ -1491,21 +1434,12 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_masters[] = {
1733 &omap3xxx_dss__l3,
1734 };
1736 -static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = {
1737 - {
1738 - .pa_start = 0x48050000,
1739 - .pa_end = 0x480503FF,
1740 - .flags = ADDR_TYPE_RT
1741 - },
1742 - { }
1743 -};
1744 -
1745 /* l4_core -> dss */
1746 static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = {
1747 .master = &omap3xxx_l4_core_hwmod,
1748 .slave = &omap3430es1_dss_core_hwmod,
1749 .clk = "dss_ick",
1750 - .addr = omap3xxx_dss_addrs,
1751 + .addr = omap2_dss_addrs,
1752 .fw = {
1753 .omap2 = {
1754 .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION,
1755 @@ -1520,7 +1454,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = {
1756 .master = &omap3xxx_l4_core_hwmod,
1757 .slave = &omap3xxx_dss_core_hwmod,
1758 .clk = "dss_ick",
1759 - .addr = omap3xxx_dss_addrs,
1760 + .addr = omap2_dss_addrs,
1761 .fw = {
1762 .omap2 = {
1763 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION,
1764 @@ -1625,21 +1559,12 @@ static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = {
1765 { .irq = 25 },
1766 };
1768 -static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = {
1769 - {
1770 - .pa_start = 0x48050400,
1771 - .pa_end = 0x480507FF,
1772 - .flags = ADDR_TYPE_RT
1773 - },
1774 - { }
1775 -};
1776 -
1777 /* l4_core -> dss_dispc */
1778 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = {
1779 .master = &omap3xxx_l4_core_hwmod,
1780 .slave = &omap3xxx_dss_dispc_hwmod,
1781 .clk = "dss_ick",
1782 - .addr = omap3xxx_dss_dispc_addrs,
1783 + .addr = omap2_dss_dispc_addrs,
1784 .fw = {
1785 .omap2 = {
1786 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION,
1787 @@ -1760,21 +1685,12 @@ static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = {
1788 .sysc = &omap3xxx_rfbi_sysc,
1789 };
1791 -static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = {
1792 - {
1793 - .pa_start = 0x48050800,
1794 - .pa_end = 0x48050BFF,
1795 - .flags = ADDR_TYPE_RT
1796 - },
1797 - { }
1798 -};
1799 -
1800 /* l4_core -> dss_rfbi */
1801 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = {
1802 .master = &omap3xxx_l4_core_hwmod,
1803 .slave = &omap3xxx_dss_rfbi_hwmod,
1804 .clk = "dss_ick",
1805 - .addr = omap3xxx_dss_rfbi_addrs,
1806 + .addr = omap2_dss_rfbi_addrs,
1807 .fw = {
1808 .omap2 = {
1809 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION,
1810 @@ -1818,22 +1734,12 @@ static struct omap_hwmod_class omap3xxx_venc_hwmod_class = {
1811 .name = "venc",
1812 };
1814 -/* dss_venc */
1815 -static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = {
1816 - {
1817 - .pa_start = 0x48050C00,
1818 - .pa_end = 0x48050FFF,
1819 - .flags = ADDR_TYPE_RT
1820 - },
1821 - { }
1822 -};
1823 -
1824 /* l4_core -> dss_venc */
1825 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
1826 .master = &omap3xxx_l4_core_hwmod,
1827 .slave = &omap3xxx_dss_venc_hwmod,
1828 .clk = "dss_tv_fck",
1829 - .addr = omap3xxx_dss_venc_addrs,
1830 + .addr = omap2_dss_venc_addrs,
1831 .fw = {
1832 .omap2 = {
1833 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION,
1834 @@ -3070,56 +2976,29 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = {
1835 };
1837 /* l4 core -> mcspi1 interface */
1838 -static struct omap_hwmod_addr_space omap34xx_mcspi1_addr_space[] = {
1839 - {
1840 - .pa_start = 0x48098000,
1841 - .pa_end = 0x480980ff,
1842 - .flags = ADDR_TYPE_RT,
1843 - },
1844 - { }
1845 -};
1846 -
1847 static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = {
1848 .master = &omap3xxx_l4_core_hwmod,
1849 .slave = &omap34xx_mcspi1,
1850 .clk = "mcspi1_ick",
1851 - .addr = omap34xx_mcspi1_addr_space,
1852 + .addr = omap2_mcspi1_addr_space,
1853 .user = OCP_USER_MPU | OCP_USER_SDMA,
1854 };
1856 /* l4 core -> mcspi2 interface */
1857 -static struct omap_hwmod_addr_space omap34xx_mcspi2_addr_space[] = {
1858 - {
1859 - .pa_start = 0x4809a000,
1860 - .pa_end = 0x4809a0ff,
1861 - .flags = ADDR_TYPE_RT,
1862 - },
1863 - { }
1864 -};
1865 -
1866 static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = {
1867 .master = &omap3xxx_l4_core_hwmod,
1868 .slave = &omap34xx_mcspi2,
1869 .clk = "mcspi2_ick",
1870 - .addr = omap34xx_mcspi2_addr_space,
1871 + .addr = omap2_mcspi2_addr_space,
1872 .user = OCP_USER_MPU | OCP_USER_SDMA,
1873 };
1875 /* l4 core -> mcspi3 interface */
1876 -static struct omap_hwmod_addr_space omap34xx_mcspi3_addr_space[] = {
1877 - {
1878 - .pa_start = 0x480b8000,
1879 - .pa_end = 0x480b80ff,
1880 - .flags = ADDR_TYPE_RT,
1881 - },
1882 - { }
1883 -};
1884 -
1885 static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = {
1886 .master = &omap3xxx_l4_core_hwmod,
1887 .slave = &omap34xx_mcspi3,
1888 .clk = "mcspi3_ick",
1889 - .addr = omap34xx_mcspi3_addr_space,
1890 + .addr = omap2430_mcspi3_addr_space,
1891 .user = OCP_USER_MPU | OCP_USER_SDMA,
1892 };
1894 diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
1895 index c34e98b..76a2f11 100644
1896 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
1897 +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
1898 @@ -1,10 +1,10 @@
1899 /*
1900 * omap_hwmod_common_data.h - OMAP hwmod common macros and declarations
1901 *
1902 - * Copyright (C) 2010 Nokia Corporation
1903 + * Copyright (C) 2010-2011 Nokia Corporation
1904 * Paul Walmsley
1905 *
1906 - * Copyright (C) 2010 Texas Instruments, Inc.
1907 + * Copyright (C) 2010-2011 Texas Instruments, Inc.
1908 * Benoît Cousson
1909 *
1910 * This program is free software; you can redistribute it and/or modify
1911 @@ -16,10 +16,44 @@
1913 #include <plat/omap_hwmod.h>
1915 +/* Common address space across OMAP2xxx */
1916 +extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[];
1917 +extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[];
1918 +extern struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[];
1919 +extern struct omap_hwmod_addr_space omap2xxx_timer2_addrs[];
1920 +extern struct omap_hwmod_addr_space omap2xxx_timer3_addrs[];
1921 +extern struct omap_hwmod_addr_space omap2xxx_timer4_addrs[];
1922 +extern struct omap_hwmod_addr_space omap2xxx_timer5_addrs[];
1923 +extern struct omap_hwmod_addr_space omap2xxx_timer6_addrs[];
1924 +extern struct omap_hwmod_addr_space omap2xxx_timer7_addrs[];
1925 +extern struct omap_hwmod_addr_space omap2xxx_timer8_addrs[];
1926 +extern struct omap_hwmod_addr_space omap2xxx_timer9_addrs[];
1927 +extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[];
1928 +extern struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[];
1929 +
1930 +/* Common address space across OMAP2xxx/3xxx */
1931 +extern struct omap_hwmod_addr_space omap2_i2c1_addr_space[];
1932 +extern struct omap_hwmod_addr_space omap2_i2c2_addr_space[];
1933 +extern struct omap_hwmod_addr_space omap2_dss_addrs[];
1934 +extern struct omap_hwmod_addr_space omap2_dss_dispc_addrs[];
1935 +extern struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[];
1936 +extern struct omap_hwmod_addr_space omap2_dss_venc_addrs[];
1937 +extern struct omap_hwmod_addr_space omap2_timer10_addrs[];
1938 +extern struct omap_hwmod_addr_space omap2_timer11_addrs[];
1939 +extern struct omap_hwmod_addr_space omap2430_mmc1_addr_space[];
1940 +extern struct omap_hwmod_addr_space omap2430_mmc2_addr_space[];
1941 +extern struct omap_hwmod_addr_space omap2_mcspi1_addr_space[];
1942 +extern struct omap_hwmod_addr_space omap2_mcspi2_addr_space[];
1943 +extern struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[];
1944 +extern struct omap_hwmod_addr_space omap2_dma_system_addrs[];
1945 +extern struct omap_hwmod_addr_space omap2_mailbox_addrs[];
1946 +extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[];
1947 +
1948 /* OMAP hwmod classes - forward declarations */
1949 extern struct omap_hwmod_class l3_hwmod_class;
1950 extern struct omap_hwmod_class l4_hwmod_class;
1951 extern struct omap_hwmod_class mpu_hwmod_class;
1952 extern struct omap_hwmod_class iva_hwmod_class;
1954 +
1955 #endif
1956 --
1957 1.7.2.5