[glsdk/meta-ti-glsdk.git] / recipes-kernel / linux / linux-3.0 / pm-wip / voltdm / 0039-omap_hwmod-use-a-terminator-record-with-omap_hwmod_m.patch
1 From ad7c2eca0bc920ad184fea27fc1d2803e66fa2cd Mon Sep 17 00:00:00 2001
2 From: Paul Walmsley <paul@pwsan.com>
3 Date: Sat, 9 Jul 2011 19:14:06 -0600
4 Subject: [PATCH 039/149] omap_hwmod: use a terminator record with omap_hwmod_mpu_irqs arrays
6 Previously, struct omap_hwmod_mpu_irqs arrays were unterminated; and
7 users of these arrays used the ARRAY_SIZE() macro to determine the
8 length of the array. However, ARRAY_SIZE() only works when the array
9 is in the same scope as the macro user.
11 So far this hasn't been a problem. However, to reduce duplicated
12 data, a subsequent patch will move common data to a separate, shared
13 file. When this is done, ARRAY_SIZE() will no longer be usable.
15 This patch removes ARRAY_SIZE() usage for struct omap_hwmod_mpu_irqs
16 arrays and uses a sentinel value (irq == -1) as the array terminator
17 instead.
19 Signed-off-by: Paul Walmsley <paul@pwsan.com>
20 ---
21 arch/arm/mach-omap2/omap_hwmod.c | 30 ++++++-
22 arch/arm/mach-omap2/omap_hwmod_2420_data.c | 56 ++++++------
23 arch/arm/mach-omap2/omap_hwmod_2430_data.c | 72 +++++++-------
24 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 92 +++++++++---------
25 arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 127 +++++++++++++-------------
26 arch/arm/plat-omap/include/plat/omap_hwmod.h | 8 +-
27 6 files changed, 205 insertions(+), 180 deletions(-)
29 diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
30 index 73599f0..b761968 100644
31 --- a/arch/arm/mach-omap2/omap_hwmod.c
32 +++ b/arch/arm/mach-omap2/omap_hwmod.c
33 @@ -679,6 +679,29 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
34 }
36 /**
37 + * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
38 + * @oh: struct omap_hwmod *oh
39 + *
40 + * Count and return the number of MPU IRQs associated with the hwmod
41 + * @oh. Used to allocate struct resource data. Returns 0 if @oh is
42 + * NULL.
43 + */
44 +static int _count_mpu_irqs(struct omap_hwmod *oh)
45 +{
46 + struct omap_hwmod_irq_info *ohii;
47 + int i = 0;
48 +
49 + if (!oh || !oh->mpu_irqs)
50 + return 0;
51 +
52 + do {
53 + ohii = &oh->mpu_irqs[i++];
54 + } while (ohii->irq != -1);
55 +
56 + return i;
57 +}
58 +
59 +/**
60 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
61 * @oh: struct omap_hwmod *oh
62 *
63 @@ -1984,7 +2007,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
64 {
65 int ret, i;
67 - ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
68 + ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt;
70 for (i = 0; i < oh->slaves_cnt; i++)
71 ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
72 @@ -2004,12 +2027,13 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
73 */
74 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
75 {
76 - int i, j;
77 + int i, j, mpu_irqs_cnt;
78 int r = 0;
80 /* For each IRQ, DMA, memory area, fill in array.*/
82 - for (i = 0; i < oh->mpu_irqs_cnt; i++) {
83 + mpu_irqs_cnt = _count_mpu_irqs(oh);
84 + for (i = 0; i < mpu_irqs_cnt; i++) {
85 (res + r)->name = (oh->mpu_irqs + i)->name;
86 (res + r)->start = (oh->mpu_irqs + i)->irq;
87 (res + r)->end = (oh->mpu_irqs + i)->irq;
88 diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
89 index 3ec625c..04730d3 100644
90 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
91 +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
92 @@ -296,6 +296,7 @@ static struct omap_hwmod_class omap2420_timer_hwmod_class = {
93 static struct omap_hwmod omap2420_timer1_hwmod;
94 static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = {
95 { .irq = 37, },
96 + { .irq = -1 }
97 };
99 static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = {
100 @@ -325,7 +326,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = {
101 static struct omap_hwmod omap2420_timer1_hwmod = {
102 .name = "timer1",
103 .mpu_irqs = omap2420_timer1_mpu_irqs,
104 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer1_mpu_irqs),
105 .main_clk = "gpt1_fck",
106 .prcm = {
107 .omap2 = {
108 @@ -346,6 +346,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = {
109 static struct omap_hwmod omap2420_timer2_hwmod;
110 static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = {
111 { .irq = 38, },
112 + { .irq = -1 }
113 };
116 @@ -367,7 +368,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = {
117 static struct omap_hwmod omap2420_timer2_hwmod = {
118 .name = "timer2",
119 .mpu_irqs = omap2420_timer2_mpu_irqs,
120 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer2_mpu_irqs),
121 .main_clk = "gpt2_fck",
122 .prcm = {
123 .omap2 = {
124 @@ -388,6 +388,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = {
125 static struct omap_hwmod omap2420_timer3_hwmod;
126 static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = {
127 { .irq = 39, },
128 + { .irq = -1 }
129 };
131 /* l4_core -> timer3 */
132 @@ -408,7 +409,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = {
133 static struct omap_hwmod omap2420_timer3_hwmod = {
134 .name = "timer3",
135 .mpu_irqs = omap2420_timer3_mpu_irqs,
136 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer3_mpu_irqs),
137 .main_clk = "gpt3_fck",
138 .prcm = {
139 .omap2 = {
140 @@ -429,6 +429,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = {
141 static struct omap_hwmod omap2420_timer4_hwmod;
142 static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = {
143 { .irq = 40, },
144 + { .irq = -1 }
145 };
147 /* l4_core -> timer4 */
148 @@ -449,7 +450,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = {
149 static struct omap_hwmod omap2420_timer4_hwmod = {
150 .name = "timer4",
151 .mpu_irqs = omap2420_timer4_mpu_irqs,
152 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer4_mpu_irqs),
153 .main_clk = "gpt4_fck",
154 .prcm = {
155 .omap2 = {
156 @@ -470,6 +470,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = {
157 static struct omap_hwmod omap2420_timer5_hwmod;
158 static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = {
159 { .irq = 41, },
160 + { .irq = -1 }
161 };
163 /* l4_core -> timer5 */
164 @@ -490,7 +491,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = {
165 static struct omap_hwmod omap2420_timer5_hwmod = {
166 .name = "timer5",
167 .mpu_irqs = omap2420_timer5_mpu_irqs,
168 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer5_mpu_irqs),
169 .main_clk = "gpt5_fck",
170 .prcm = {
171 .omap2 = {
172 @@ -512,6 +512,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = {
173 static struct omap_hwmod omap2420_timer6_hwmod;
174 static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = {
175 { .irq = 42, },
176 + { .irq = -1 }
177 };
179 /* l4_core -> timer6 */
180 @@ -532,7 +533,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = {
181 static struct omap_hwmod omap2420_timer6_hwmod = {
182 .name = "timer6",
183 .mpu_irqs = omap2420_timer6_mpu_irqs,
184 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer6_mpu_irqs),
185 .main_clk = "gpt6_fck",
186 .prcm = {
187 .omap2 = {
188 @@ -553,6 +553,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = {
189 static struct omap_hwmod omap2420_timer7_hwmod;
190 static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = {
191 { .irq = 43, },
192 + { .irq = -1 }
193 };
195 /* l4_core -> timer7 */
196 @@ -573,7 +574,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = {
197 static struct omap_hwmod omap2420_timer7_hwmod = {
198 .name = "timer7",
199 .mpu_irqs = omap2420_timer7_mpu_irqs,
200 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer7_mpu_irqs),
201 .main_clk = "gpt7_fck",
202 .prcm = {
203 .omap2 = {
204 @@ -594,6 +594,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = {
205 static struct omap_hwmod omap2420_timer8_hwmod;
206 static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = {
207 { .irq = 44, },
208 + { .irq = -1 }
209 };
211 /* l4_core -> timer8 */
212 @@ -614,7 +615,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = {
213 static struct omap_hwmod omap2420_timer8_hwmod = {
214 .name = "timer8",
215 .mpu_irqs = omap2420_timer8_mpu_irqs,
216 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer8_mpu_irqs),
217 .main_clk = "gpt8_fck",
218 .prcm = {
219 .omap2 = {
220 @@ -635,6 +635,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = {
221 static struct omap_hwmod omap2420_timer9_hwmod;
222 static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = {
223 { .irq = 45, },
224 + { .irq = -1 }
225 };
227 /* l4_core -> timer9 */
228 @@ -655,7 +656,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = {
229 static struct omap_hwmod omap2420_timer9_hwmod = {
230 .name = "timer9",
231 .mpu_irqs = omap2420_timer9_mpu_irqs,
232 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer9_mpu_irqs),
233 .main_clk = "gpt9_fck",
234 .prcm = {
235 .omap2 = {
236 @@ -676,6 +676,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = {
237 static struct omap_hwmod omap2420_timer10_hwmod;
238 static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = {
239 { .irq = 46, },
240 + { .irq = -1 }
241 };
243 /* l4_core -> timer10 */
244 @@ -696,7 +697,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = {
245 static struct omap_hwmod omap2420_timer10_hwmod = {
246 .name = "timer10",
247 .mpu_irqs = omap2420_timer10_mpu_irqs,
248 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer10_mpu_irqs),
249 .main_clk = "gpt10_fck",
250 .prcm = {
251 .omap2 = {
252 @@ -717,6 +717,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = {
253 static struct omap_hwmod omap2420_timer11_hwmod;
254 static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = {
255 { .irq = 47, },
256 + { .irq = -1 }
257 };
259 /* l4_core -> timer11 */
260 @@ -737,7 +738,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = {
261 static struct omap_hwmod omap2420_timer11_hwmod = {
262 .name = "timer11",
263 .mpu_irqs = omap2420_timer11_mpu_irqs,
264 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer11_mpu_irqs),
265 .main_clk = "gpt11_fck",
266 .prcm = {
267 .omap2 = {
268 @@ -758,6 +758,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = {
269 static struct omap_hwmod omap2420_timer12_hwmod;
270 static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = {
271 { .irq = 48, },
272 + { .irq = -1 }
273 };
275 /* l4_core -> timer12 */
276 @@ -778,7 +779,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = {
277 static struct omap_hwmod omap2420_timer12_hwmod = {
278 .name = "timer12",
279 .mpu_irqs = omap2420_timer12_mpu_irqs,
280 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer12_mpu_irqs),
281 .main_clk = "gpt12_fck",
282 .prcm = {
283 .omap2 = {
284 @@ -879,6 +879,7 @@ static struct omap_hwmod_class uart_class = {
286 static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
287 { .irq = INT_24XX_UART1_IRQ, },
288 + { .irq = -1 }
289 };
291 static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
292 @@ -893,7 +894,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {
293 static struct omap_hwmod omap2420_uart1_hwmod = {
294 .name = "uart1",
295 .mpu_irqs = uart1_mpu_irqs,
296 - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs),
297 .sdma_reqs = uart1_sdma_reqs,
298 .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
299 .main_clk = "uart1_fck",
300 @@ -916,6 +916,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = {
302 static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
303 { .irq = INT_24XX_UART2_IRQ, },
304 + { .irq = -1 }
305 };
307 static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
308 @@ -930,7 +931,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = {
309 static struct omap_hwmod omap2420_uart2_hwmod = {
310 .name = "uart2",
311 .mpu_irqs = uart2_mpu_irqs,
312 - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs),
313 .sdma_reqs = uart2_sdma_reqs,
314 .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
315 .main_clk = "uart2_fck",
316 @@ -953,6 +953,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = {
318 static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
319 { .irq = INT_24XX_UART3_IRQ, },
320 + { .irq = -1 }
321 };
323 static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
324 @@ -967,7 +968,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = {
325 static struct omap_hwmod omap2420_uart3_hwmod = {
326 .name = "uart3",
327 .mpu_irqs = uart3_mpu_irqs,
328 - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs),
329 .sdma_reqs = uart3_sdma_reqs,
330 .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
331 .main_clk = "uart3_fck",
332 @@ -1087,6 +1087,7 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = {
334 static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = {
335 { .irq = 25 },
336 + { .irq = -1 }
337 };
339 /* l4_core -> dss_dispc */
340 @@ -1113,7 +1114,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = {
341 .name = "dss_dispc",
342 .class = &omap2420_dispc_hwmod_class,
343 .mpu_irqs = omap2420_dispc_irqs,
344 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dispc_irqs),
345 .main_clk = "dss1_fck",
346 .prcm = {
347 .omap2 = {
348 @@ -1254,6 +1254,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr;
350 static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
351 { .irq = INT_24XX_I2C1_IRQ, },
352 + { .irq = -1 }
353 };
355 static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
356 @@ -1268,7 +1269,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = {
357 static struct omap_hwmod omap2420_i2c1_hwmod = {
358 .name = "i2c1",
359 .mpu_irqs = i2c1_mpu_irqs,
360 - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
361 .sdma_reqs = i2c1_sdma_reqs,
362 .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
363 .main_clk = "i2c1_fck",
364 @@ -1293,6 +1293,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
366 static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
367 { .irq = INT_24XX_I2C2_IRQ, },
368 + { .irq = -1 }
369 };
371 static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
372 @@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = {
373 static struct omap_hwmod omap2420_i2c2_hwmod = {
374 .name = "i2c2",
375 .mpu_irqs = i2c2_mpu_irqs,
376 - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs),
377 .sdma_reqs = i2c2_sdma_reqs,
378 .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs),
379 .main_clk = "i2c2_fck",
380 @@ -1430,6 +1430,7 @@ static struct omap_hwmod_class omap242x_gpio_hwmod_class = {
381 /* gpio1 */
382 static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = {
383 { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
384 + { .irq = -1 }
385 };
387 static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {
388 @@ -1440,7 +1441,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = {
389 .name = "gpio1",
390 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
391 .mpu_irqs = omap242x_gpio1_irqs,
392 - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs),
393 .main_clk = "gpios_fck",
394 .prcm = {
395 .omap2 = {
396 @@ -1461,6 +1461,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod = {
397 /* gpio2 */
398 static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = {
399 { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
400 + { .irq = -1 }
401 };
403 static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = {
404 @@ -1471,7 +1472,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = {
405 .name = "gpio2",
406 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
407 .mpu_irqs = omap242x_gpio2_irqs,
408 - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs),
409 .main_clk = "gpios_fck",
410 .prcm = {
411 .omap2 = {
412 @@ -1492,6 +1492,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod = {
413 /* gpio3 */
414 static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = {
415 { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
416 + { .irq = -1 }
417 };
419 static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = {
420 @@ -1502,7 +1503,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = {
421 .name = "gpio3",
422 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
423 .mpu_irqs = omap242x_gpio3_irqs,
424 - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs),
425 .main_clk = "gpios_fck",
426 .prcm = {
427 .omap2 = {
428 @@ -1523,6 +1523,7 @@ static struct omap_hwmod omap2420_gpio3_hwmod = {
429 /* gpio4 */
430 static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = {
431 { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
432 + { .irq = -1 }
433 };
435 static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = {
436 @@ -1533,7 +1534,6 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
437 .name = "gpio4",
438 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
439 .mpu_irqs = omap242x_gpio4_irqs,
440 - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs),
441 .main_clk = "gpios_fck",
442 .prcm = {
443 .omap2 = {
444 @@ -1580,6 +1580,7 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
445 { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
446 { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
447 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
448 + { .irq = -1 }
449 };
451 /* dma_system -> L3 */
452 @@ -1613,7 +1614,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = {
453 .name = "dma",
454 .class = &omap2420_dma_hwmod_class,
455 .mpu_irqs = omap2420_dma_system_irqs,
456 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs),
457 .main_clk = "core_l3_ck",
458 .slaves = omap2420_dma_system_slaves,
459 .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves),
460 @@ -1650,6 +1650,7 @@ static struct omap_hwmod omap2420_mailbox_hwmod;
461 static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {
462 { .name = "dsp", .irq = 26 },
463 { .name = "iva", .irq = 34 },
464 + { .irq = -1 }
465 };
467 /* l4_core -> mailbox */
468 @@ -1669,7 +1670,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = {
469 .name = "mailbox",
470 .class = &omap2420_mailbox_hwmod_class,
471 .mpu_irqs = omap2420_mailbox_irqs,
472 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mailbox_irqs),
473 .main_clk = "mailboxes_ick",
474 .prcm = {
475 .omap2 = {
476 @@ -1711,6 +1711,7 @@ static struct omap_hwmod_class omap2420_mcspi_class = {
477 /* mcspi1 */
478 static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = {
479 { .irq = 65 },
480 + { .irq = -1 }
481 };
483 static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = {
484 @@ -1735,7 +1736,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
485 static struct omap_hwmod omap2420_mcspi1_hwmod = {
486 .name = "mcspi1_hwmod",
487 .mpu_irqs = omap2420_mcspi1_mpu_irqs,
488 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi1_mpu_irqs),
489 .sdma_reqs = omap2420_mcspi1_sdma_reqs,
490 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs),
491 .main_clk = "mcspi1_fck",
492 @@ -1758,6 +1758,7 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = {
493 /* mcspi2 */
494 static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = {
495 { .irq = 66 },
496 + { .irq = -1 }
497 };
499 static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = {
500 @@ -1778,7 +1779,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
501 static struct omap_hwmod omap2420_mcspi2_hwmod = {
502 .name = "mcspi2_hwmod",
503 .mpu_irqs = omap2420_mcspi2_mpu_irqs,
504 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi2_mpu_irqs),
505 .sdma_reqs = omap2420_mcspi2_sdma_reqs,
506 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs),
507 .main_clk = "mcspi2_fck",
508 @@ -1811,6 +1811,7 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = {
509 static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
510 { .name = "tx", .irq = 59 },
511 { .name = "rx", .irq = 60 },
512 + { .irq = -1 }
513 };
515 static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = {
516 @@ -1836,7 +1837,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
517 .name = "mcbsp1",
518 .class = &omap2420_mcbsp_hwmod_class,
519 .mpu_irqs = omap2420_mcbsp1_irqs,
520 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_irqs),
521 .sdma_reqs = omap2420_mcbsp1_sdma_chs,
522 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs),
523 .main_clk = "mcbsp1_fck",
524 @@ -1858,6 +1858,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
525 static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = {
526 { .name = "tx", .irq = 62 },
527 { .name = "rx", .irq = 63 },
528 + { .irq = -1 }
529 };
531 static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = {
532 @@ -1883,7 +1884,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
533 .name = "mcbsp2",
534 .class = &omap2420_mcbsp_hwmod_class,
535 .mpu_irqs = omap2420_mcbsp2_irqs,
536 - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_irqs),
537 .sdma_reqs = omap2420_mcbsp2_sdma_chs,
538 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs),
539 .main_clk = "mcbsp2_fck",
540 diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
541 index 9531ef2..2c28468 100644
542 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
543 +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
544 @@ -369,6 +369,7 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = {
545 static struct omap_hwmod omap2430_timer1_hwmod;
546 static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = {
547 { .irq = 37, },
548 + { .irq = -1 }
549 };
551 static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = {
552 @@ -398,7 +399,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = {
553 static struct omap_hwmod omap2430_timer1_hwmod = {
554 .name = "timer1",
555 .mpu_irqs = omap2430_timer1_mpu_irqs,
556 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer1_mpu_irqs),
557 .main_clk = "gpt1_fck",
558 .prcm = {
559 .omap2 = {
560 @@ -419,6 +419,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = {
561 static struct omap_hwmod omap2430_timer2_hwmod;
562 static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = {
563 { .irq = 38, },
564 + { .irq = -1 }
565 };
567 /* l4_core -> timer2 */
568 @@ -439,7 +440,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = {
569 static struct omap_hwmod omap2430_timer2_hwmod = {
570 .name = "timer2",
571 .mpu_irqs = omap2430_timer2_mpu_irqs,
572 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer2_mpu_irqs),
573 .main_clk = "gpt2_fck",
574 .prcm = {
575 .omap2 = {
576 @@ -460,6 +460,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = {
577 static struct omap_hwmod omap2430_timer3_hwmod;
578 static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = {
579 { .irq = 39, },
580 + { .irq = -1 }
581 };
583 /* l4_core -> timer3 */
584 @@ -480,7 +481,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = {
585 static struct omap_hwmod omap2430_timer3_hwmod = {
586 .name = "timer3",
587 .mpu_irqs = omap2430_timer3_mpu_irqs,
588 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer3_mpu_irqs),
589 .main_clk = "gpt3_fck",
590 .prcm = {
591 .omap2 = {
592 @@ -501,6 +501,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = {
593 static struct omap_hwmod omap2430_timer4_hwmod;
594 static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = {
595 { .irq = 40, },
596 + { .irq = -1 }
597 };
599 /* l4_core -> timer4 */
600 @@ -521,7 +522,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = {
601 static struct omap_hwmod omap2430_timer4_hwmod = {
602 .name = "timer4",
603 .mpu_irqs = omap2430_timer4_mpu_irqs,
604 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer4_mpu_irqs),
605 .main_clk = "gpt4_fck",
606 .prcm = {
607 .omap2 = {
608 @@ -542,6 +542,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = {
609 static struct omap_hwmod omap2430_timer5_hwmod;
610 static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = {
611 { .irq = 41, },
612 + { .irq = -1 }
613 };
615 /* l4_core -> timer5 */
616 @@ -562,7 +563,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = {
617 static struct omap_hwmod omap2430_timer5_hwmod = {
618 .name = "timer5",
619 .mpu_irqs = omap2430_timer5_mpu_irqs,
620 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer5_mpu_irqs),
621 .main_clk = "gpt5_fck",
622 .prcm = {
623 .omap2 = {
624 @@ -583,6 +583,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = {
625 static struct omap_hwmod omap2430_timer6_hwmod;
626 static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = {
627 { .irq = 42, },
628 + { .irq = -1 }
629 };
631 /* l4_core -> timer6 */
632 @@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = {
633 static struct omap_hwmod omap2430_timer6_hwmod = {
634 .name = "timer6",
635 .mpu_irqs = omap2430_timer6_mpu_irqs,
636 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer6_mpu_irqs),
637 .main_clk = "gpt6_fck",
638 .prcm = {
639 .omap2 = {
640 @@ -624,6 +624,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = {
641 static struct omap_hwmod omap2430_timer7_hwmod;
642 static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = {
643 { .irq = 43, },
644 + { .irq = -1 }
645 };
647 /* l4_core -> timer7 */
648 @@ -644,7 +645,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = {
649 static struct omap_hwmod omap2430_timer7_hwmod = {
650 .name = "timer7",
651 .mpu_irqs = omap2430_timer7_mpu_irqs,
652 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer7_mpu_irqs),
653 .main_clk = "gpt7_fck",
654 .prcm = {
655 .omap2 = {
656 @@ -665,6 +665,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = {
657 static struct omap_hwmod omap2430_timer8_hwmod;
658 static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = {
659 { .irq = 44, },
660 + { .irq = -1 }
661 };
663 /* l4_core -> timer8 */
664 @@ -685,7 +686,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = {
665 static struct omap_hwmod omap2430_timer8_hwmod = {
666 .name = "timer8",
667 .mpu_irqs = omap2430_timer8_mpu_irqs,
668 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer8_mpu_irqs),
669 .main_clk = "gpt8_fck",
670 .prcm = {
671 .omap2 = {
672 @@ -706,6 +706,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = {
673 static struct omap_hwmod omap2430_timer9_hwmod;
674 static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = {
675 { .irq = 45, },
676 + { .irq = -1 }
677 };
679 /* l4_core -> timer9 */
680 @@ -726,7 +727,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = {
681 static struct omap_hwmod omap2430_timer9_hwmod = {
682 .name = "timer9",
683 .mpu_irqs = omap2430_timer9_mpu_irqs,
684 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer9_mpu_irqs),
685 .main_clk = "gpt9_fck",
686 .prcm = {
687 .omap2 = {
688 @@ -747,6 +747,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = {
689 static struct omap_hwmod omap2430_timer10_hwmod;
690 static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = {
691 { .irq = 46, },
692 + { .irq = -1 }
693 };
695 /* l4_core -> timer10 */
696 @@ -767,7 +768,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = {
697 static struct omap_hwmod omap2430_timer10_hwmod = {
698 .name = "timer10",
699 .mpu_irqs = omap2430_timer10_mpu_irqs,
700 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer10_mpu_irqs),
701 .main_clk = "gpt10_fck",
702 .prcm = {
703 .omap2 = {
704 @@ -788,6 +788,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = {
705 static struct omap_hwmod omap2430_timer11_hwmod;
706 static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = {
707 { .irq = 47, },
708 + { .irq = -1 }
709 };
711 /* l4_core -> timer11 */
712 @@ -808,7 +809,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = {
713 static struct omap_hwmod omap2430_timer11_hwmod = {
714 .name = "timer11",
715 .mpu_irqs = omap2430_timer11_mpu_irqs,
716 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer11_mpu_irqs),
717 .main_clk = "gpt11_fck",
718 .prcm = {
719 .omap2 = {
720 @@ -829,6 +829,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = {
721 static struct omap_hwmod omap2430_timer12_hwmod;
722 static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = {
723 { .irq = 48, },
724 + { .irq = -1 }
725 };
727 /* l4_core -> timer12 */
728 @@ -849,7 +850,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = {
729 static struct omap_hwmod omap2430_timer12_hwmod = {
730 .name = "timer12",
731 .mpu_irqs = omap2430_timer12_mpu_irqs,
732 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer12_mpu_irqs),
733 .main_clk = "gpt12_fck",
734 .prcm = {
735 .omap2 = {
736 @@ -950,6 +950,7 @@ static struct omap_hwmod_class uart_class = {
738 static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
739 { .irq = INT_24XX_UART1_IRQ, },
740 + { .irq = -1 }
741 };
743 static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
744 @@ -964,7 +965,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
745 static struct omap_hwmod omap2430_uart1_hwmod = {
746 .name = "uart1",
747 .mpu_irqs = uart1_mpu_irqs,
748 - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs),
749 .sdma_reqs = uart1_sdma_reqs,
750 .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
751 .main_clk = "uart1_fck",
752 @@ -987,6 +987,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = {
754 static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
755 { .irq = INT_24XX_UART2_IRQ, },
756 + { .irq = -1 }
757 };
759 static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
760 @@ -1001,7 +1002,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {
761 static struct omap_hwmod omap2430_uart2_hwmod = {
762 .name = "uart2",
763 .mpu_irqs = uart2_mpu_irqs,
764 - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs),
765 .sdma_reqs = uart2_sdma_reqs,
766 .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
767 .main_clk = "uart2_fck",
768 @@ -1024,6 +1024,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = {
770 static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
771 { .irq = INT_24XX_UART3_IRQ, },
772 + { .irq = -1 }
773 };
775 static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
776 @@ -1038,7 +1039,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {
777 static struct omap_hwmod omap2430_uart3_hwmod = {
778 .name = "uart3",
779 .mpu_irqs = uart3_mpu_irqs,
780 - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs),
781 .sdma_reqs = uart3_sdma_reqs,
782 .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
783 .main_clk = "uart3_fck",
784 @@ -1152,6 +1152,7 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = {
786 static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = {
787 { .irq = 25 },
788 + { .irq = -1 }
789 };
791 /* l4_core -> dss_dispc */
792 @@ -1172,7 +1173,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = {
793 .name = "dss_dispc",
794 .class = &omap2430_dispc_hwmod_class,
795 .mpu_irqs = omap2430_dispc_irqs,
796 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dispc_irqs),
797 .main_clk = "dss1_fck",
798 .prcm = {
799 .omap2 = {
800 @@ -1304,6 +1304,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = {
802 static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
803 { .irq = INT_24XX_I2C1_IRQ, },
804 + { .irq = -1 }
805 };
807 static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
808 @@ -1318,7 +1319,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {
809 static struct omap_hwmod omap2430_i2c1_hwmod = {
810 .name = "i2c1",
811 .mpu_irqs = i2c1_mpu_irqs,
812 - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
813 .sdma_reqs = i2c1_sdma_reqs,
814 .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
815 .main_clk = "i2chs1_fck",
816 @@ -1350,6 +1350,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
818 static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
819 { .irq = INT_24XX_I2C2_IRQ, },
820 + { .irq = -1 }
821 };
823 static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
824 @@ -1364,7 +1365,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {
825 static struct omap_hwmod omap2430_i2c2_hwmod = {
826 .name = "i2c2",
827 .mpu_irqs = i2c2_mpu_irqs,
828 - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs),
829 .sdma_reqs = i2c2_sdma_reqs,
830 .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs),
831 .main_clk = "i2chs2_fck",
832 @@ -1504,6 +1504,7 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = {
833 /* gpio1 */
834 static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = {
835 { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
836 + { .irq = -1 }
837 };
839 static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
840 @@ -1514,7 +1515,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = {
841 .name = "gpio1",
842 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
843 .mpu_irqs = omap243x_gpio1_irqs,
844 - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs),
845 .main_clk = "gpios_fck",
846 .prcm = {
847 .omap2 = {
848 @@ -1535,6 +1535,7 @@ static struct omap_hwmod omap2430_gpio1_hwmod = {
849 /* gpio2 */
850 static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = {
851 { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
852 + { .irq = -1 }
853 };
855 static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = {
856 @@ -1545,7 +1546,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = {
857 .name = "gpio2",
858 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
859 .mpu_irqs = omap243x_gpio2_irqs,
860 - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs),
861 .main_clk = "gpios_fck",
862 .prcm = {
863 .omap2 = {
864 @@ -1566,6 +1566,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod = {
865 /* gpio3 */
866 static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = {
867 { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
868 + { .irq = -1 }
869 };
871 static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = {
872 @@ -1576,7 +1577,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = {
873 .name = "gpio3",
874 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
875 .mpu_irqs = omap243x_gpio3_irqs,
876 - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs),
877 .main_clk = "gpios_fck",
878 .prcm = {
879 .omap2 = {
880 @@ -1597,6 +1597,7 @@ static struct omap_hwmod omap2430_gpio3_hwmod = {
881 /* gpio4 */
882 static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = {
883 { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
884 + { .irq = -1 }
885 };
887 static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = {
888 @@ -1607,7 +1608,6 @@ static struct omap_hwmod omap2430_gpio4_hwmod = {
889 .name = "gpio4",
890 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
891 .mpu_irqs = omap243x_gpio4_irqs,
892 - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs),
893 .main_clk = "gpios_fck",
894 .prcm = {
895 .omap2 = {
896 @@ -1628,6 +1628,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = {
897 /* gpio5 */
898 static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = {
899 { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */
900 + { .irq = -1 }
901 };
903 static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = {
904 @@ -1638,7 +1639,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
905 .name = "gpio5",
906 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
907 .mpu_irqs = omap243x_gpio5_irqs,
908 - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs),
909 .main_clk = "gpio5_fck",
910 .prcm = {
911 .omap2 = {
912 @@ -1685,6 +1685,7 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
913 { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
914 { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
915 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
916 + { .irq = -1 }
917 };
919 /* dma_system -> L3 */
920 @@ -1718,7 +1719,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = {
921 .name = "dma",
922 .class = &omap2430_dma_hwmod_class,
923 .mpu_irqs = omap2430_dma_system_irqs,
924 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs),
925 .main_clk = "core_l3_ck",
926 .slaves = omap2430_dma_system_slaves,
927 .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves),
928 @@ -1754,6 +1754,7 @@ static struct omap_hwmod_class omap2430_mailbox_hwmod_class = {
929 static struct omap_hwmod omap2430_mailbox_hwmod;
930 static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {
931 { .irq = 26 },
932 + { .irq = -1 }
933 };
935 /* l4_core -> mailbox */
936 @@ -1773,7 +1774,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
937 .name = "mailbox",
938 .class = &omap2430_mailbox_hwmod_class,
939 .mpu_irqs = omap2430_mailbox_irqs,
940 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mailbox_irqs),
941 .main_clk = "mailboxes_ick",
942 .prcm = {
943 .omap2 = {
944 @@ -1815,6 +1815,7 @@ static struct omap_hwmod_class omap2430_mcspi_class = {
945 /* mcspi1 */
946 static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = {
947 { .irq = 65 },
948 + { .irq = -1 }
949 };
951 static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = {
952 @@ -1839,7 +1840,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
953 static struct omap_hwmod omap2430_mcspi1_hwmod = {
954 .name = "mcspi1_hwmod",
955 .mpu_irqs = omap2430_mcspi1_mpu_irqs,
956 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs),
957 .sdma_reqs = omap2430_mcspi1_sdma_reqs,
958 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs),
959 .main_clk = "mcspi1_fck",
960 @@ -1862,6 +1862,7 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = {
961 /* mcspi2 */
962 static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = {
963 { .irq = 66 },
964 + { .irq = -1 }
965 };
967 static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = {
968 @@ -1882,7 +1883,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
969 static struct omap_hwmod omap2430_mcspi2_hwmod = {
970 .name = "mcspi2_hwmod",
971 .mpu_irqs = omap2430_mcspi2_mpu_irqs,
972 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs),
973 .sdma_reqs = omap2430_mcspi2_sdma_reqs,
974 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs),
975 .main_clk = "mcspi2_fck",
976 @@ -1905,6 +1905,7 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = {
977 /* mcspi3 */
978 static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = {
979 { .irq = 91 },
980 + { .irq = -1 }
981 };
983 static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = {
984 @@ -1925,7 +1926,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
985 static struct omap_hwmod omap2430_mcspi3_hwmod = {
986 .name = "mcspi3_hwmod",
987 .mpu_irqs = omap2430_mcspi3_mpu_irqs,
988 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs),
989 .sdma_reqs = omap2430_mcspi3_sdma_reqs,
990 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs),
991 .main_clk = "mcspi3_fck",
992 @@ -1970,12 +1970,12 @@ static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = {
994 { .name = "mc", .irq = 92 },
995 { .name = "dma", .irq = 93 },
996 + { .irq = -1 }
997 };
999 static struct omap_hwmod omap2430_usbhsotg_hwmod = {
1000 .name = "usb_otg_hs",
1001 .mpu_irqs = omap2430_usbhsotg_mpu_irqs,
1002 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_usbhsotg_mpu_irqs),
1003 .main_clk = "usbhs_ick",
1004 .prcm = {
1005 .omap2 = {
1006 @@ -2025,6 +2025,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
1007 { .name = "rx", .irq = 60 },
1008 { .name = "ovr", .irq = 61 },
1009 { .name = "common", .irq = 64 },
1010 + { .irq = -1 }
1011 };
1013 static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = {
1014 @@ -2050,7 +2051,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
1015 .name = "mcbsp1",
1016 .class = &omap2430_mcbsp_hwmod_class,
1017 .mpu_irqs = omap2430_mcbsp1_irqs,
1018 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_irqs),
1019 .sdma_reqs = omap2430_mcbsp1_sdma_chs,
1020 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs),
1021 .main_clk = "mcbsp1_fck",
1022 @@ -2073,6 +2073,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = {
1023 { .name = "tx", .irq = 62 },
1024 { .name = "rx", .irq = 63 },
1025 { .name = "common", .irq = 16 },
1026 + { .irq = -1 }
1027 };
1029 static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = {
1030 @@ -2098,7 +2099,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
1031 .name = "mcbsp2",
1032 .class = &omap2430_mcbsp_hwmod_class,
1033 .mpu_irqs = omap2430_mcbsp2_irqs,
1034 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_irqs),
1035 .sdma_reqs = omap2430_mcbsp2_sdma_chs,
1036 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs),
1037 .main_clk = "mcbsp2_fck",
1038 @@ -2121,6 +2121,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = {
1039 { .name = "tx", .irq = 89 },
1040 { .name = "rx", .irq = 90 },
1041 { .name = "common", .irq = 17 },
1042 + { .irq = -1 }
1043 };
1045 static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = {
1046 @@ -2156,7 +2157,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
1047 .name = "mcbsp3",
1048 .class = &omap2430_mcbsp_hwmod_class,
1049 .mpu_irqs = omap2430_mcbsp3_irqs,
1050 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_irqs),
1051 .sdma_reqs = omap2430_mcbsp3_sdma_chs,
1052 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs),
1053 .main_clk = "mcbsp3_fck",
1054 @@ -2179,6 +2179,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = {
1055 { .name = "tx", .irq = 54 },
1056 { .name = "rx", .irq = 55 },
1057 { .name = "common", .irq = 18 },
1058 + { .irq = -1 }
1059 };
1061 static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = {
1062 @@ -2214,7 +2215,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
1063 .name = "mcbsp4",
1064 .class = &omap2430_mcbsp_hwmod_class,
1065 .mpu_irqs = omap2430_mcbsp4_irqs,
1066 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_irqs),
1067 .sdma_reqs = omap2430_mcbsp4_sdma_chs,
1068 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs),
1069 .main_clk = "mcbsp4_fck",
1070 @@ -2237,6 +2237,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = {
1071 { .name = "tx", .irq = 81 },
1072 { .name = "rx", .irq = 82 },
1073 { .name = "common", .irq = 19 },
1074 + { .irq = -1 }
1075 };
1077 static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = {
1078 @@ -2272,7 +2273,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {
1079 .name = "mcbsp5",
1080 .class = &omap2430_mcbsp_hwmod_class,
1081 .mpu_irqs = omap2430_mcbsp5_irqs,
1082 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_irqs),
1083 .sdma_reqs = omap2430_mcbsp5_sdma_chs,
1084 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs),
1085 .main_clk = "mcbsp5_fck",
1086 @@ -2312,6 +2312,7 @@ static struct omap_hwmod_class omap2430_mmc_class = {
1088 static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = {
1089 { .irq = 83 },
1090 + { .irq = -1 }
1091 };
1093 static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = {
1094 @@ -2335,7 +2336,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
1095 .name = "mmc1",
1096 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1097 .mpu_irqs = omap2430_mmc1_mpu_irqs,
1098 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc1_mpu_irqs),
1099 .sdma_reqs = omap2430_mmc1_sdma_reqs,
1100 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs),
1101 .opt_clks = omap2430_mmc1_opt_clks,
1102 @@ -2361,6 +2361,7 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
1104 static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = {
1105 { .irq = 86 },
1106 + { .irq = -1 }
1107 };
1109 static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = {
1110 @@ -2380,7 +2381,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {
1111 .name = "mmc2",
1112 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1113 .mpu_irqs = omap2430_mmc2_mpu_irqs,
1114 - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc2_mpu_irqs),
1115 .sdma_reqs = omap2430_mmc2_sdma_reqs,
1116 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs),
1117 .opt_clks = omap2430_mmc2_opt_clks,
1118 diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
1119 index 791f9b2..cc178b5 100644
1120 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
1121 +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
1122 @@ -103,6 +103,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = {
1123 static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = {
1124 { .irq = INT_34XX_L3_DBG_IRQ },
1125 { .irq = INT_34XX_L3_APP_IRQ },
1126 + { .irq = -1 }
1127 };
1129 static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = {
1130 @@ -151,7 +152,6 @@ static struct omap_hwmod omap3xxx_l3_main_hwmod = {
1131 .name = "l3_main",
1132 .class = &l3_hwmod_class,
1133 .mpu_irqs = omap3xxx_l3_main_irqs,
1134 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_l3_main_irqs),
1135 .masters = omap3xxx_l3_main_masters,
1136 .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters),
1137 .slaves = omap3xxx_l3_main_slaves,
1138 @@ -574,6 +574,7 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = {
1139 static struct omap_hwmod omap3xxx_timer1_hwmod;
1140 static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = {
1141 { .irq = 37, },
1142 + { .irq = -1 }
1143 };
1145 static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = {
1146 @@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = {
1147 static struct omap_hwmod omap3xxx_timer1_hwmod = {
1148 .name = "timer1",
1149 .mpu_irqs = omap3xxx_timer1_mpu_irqs,
1150 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer1_mpu_irqs),
1151 .main_clk = "gpt1_fck",
1152 .prcm = {
1153 .omap2 = {
1154 @@ -624,6 +624,7 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
1155 static struct omap_hwmod omap3xxx_timer2_hwmod;
1156 static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = {
1157 { .irq = 38, },
1158 + { .irq = -1 }
1159 };
1161 static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = {
1162 @@ -653,7 +654,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = {
1163 static struct omap_hwmod omap3xxx_timer2_hwmod = {
1164 .name = "timer2",
1165 .mpu_irqs = omap3xxx_timer2_mpu_irqs,
1166 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer2_mpu_irqs),
1167 .main_clk = "gpt2_fck",
1168 .prcm = {
1169 .omap2 = {
1170 @@ -674,6 +674,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
1171 static struct omap_hwmod omap3xxx_timer3_hwmod;
1172 static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = {
1173 { .irq = 39, },
1174 + { .irq = -1 }
1175 };
1177 static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = {
1178 @@ -703,7 +704,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = {
1179 static struct omap_hwmod omap3xxx_timer3_hwmod = {
1180 .name = "timer3",
1181 .mpu_irqs = omap3xxx_timer3_mpu_irqs,
1182 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer3_mpu_irqs),
1183 .main_clk = "gpt3_fck",
1184 .prcm = {
1185 .omap2 = {
1186 @@ -724,6 +724,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {
1187 static struct omap_hwmod omap3xxx_timer4_hwmod;
1188 static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = {
1189 { .irq = 40, },
1190 + { .irq = -1 }
1191 };
1193 static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = {
1194 @@ -753,7 +754,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = {
1195 static struct omap_hwmod omap3xxx_timer4_hwmod = {
1196 .name = "timer4",
1197 .mpu_irqs = omap3xxx_timer4_mpu_irqs,
1198 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer4_mpu_irqs),
1199 .main_clk = "gpt4_fck",
1200 .prcm = {
1201 .omap2 = {
1202 @@ -774,6 +774,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {
1203 static struct omap_hwmod omap3xxx_timer5_hwmod;
1204 static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = {
1205 { .irq = 41, },
1206 + { .irq = -1 }
1207 };
1209 static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = {
1210 @@ -803,7 +804,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = {
1211 static struct omap_hwmod omap3xxx_timer5_hwmod = {
1212 .name = "timer5",
1213 .mpu_irqs = omap3xxx_timer5_mpu_irqs,
1214 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer5_mpu_irqs),
1215 .main_clk = "gpt5_fck",
1216 .prcm = {
1217 .omap2 = {
1218 @@ -824,6 +824,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
1219 static struct omap_hwmod omap3xxx_timer6_hwmod;
1220 static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = {
1221 { .irq = 42, },
1222 + { .irq = -1 }
1223 };
1225 static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = {
1226 @@ -853,7 +854,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = {
1227 static struct omap_hwmod omap3xxx_timer6_hwmod = {
1228 .name = "timer6",
1229 .mpu_irqs = omap3xxx_timer6_mpu_irqs,
1230 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer6_mpu_irqs),
1231 .main_clk = "gpt6_fck",
1232 .prcm = {
1233 .omap2 = {
1234 @@ -874,6 +874,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
1235 static struct omap_hwmod omap3xxx_timer7_hwmod;
1236 static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = {
1237 { .irq = 43, },
1238 + { .irq = -1 }
1239 };
1241 static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = {
1242 @@ -903,7 +904,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = {
1243 static struct omap_hwmod omap3xxx_timer7_hwmod = {
1244 .name = "timer7",
1245 .mpu_irqs = omap3xxx_timer7_mpu_irqs,
1246 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer7_mpu_irqs),
1247 .main_clk = "gpt7_fck",
1248 .prcm = {
1249 .omap2 = {
1250 @@ -924,6 +924,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
1251 static struct omap_hwmod omap3xxx_timer8_hwmod;
1252 static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = {
1253 { .irq = 44, },
1254 + { .irq = -1 }
1255 };
1257 static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = {
1258 @@ -953,7 +954,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = {
1259 static struct omap_hwmod omap3xxx_timer8_hwmod = {
1260 .name = "timer8",
1261 .mpu_irqs = omap3xxx_timer8_mpu_irqs,
1262 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer8_mpu_irqs),
1263 .main_clk = "gpt8_fck",
1264 .prcm = {
1265 .omap2 = {
1266 @@ -974,6 +974,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {
1267 static struct omap_hwmod omap3xxx_timer9_hwmod;
1268 static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = {
1269 { .irq = 45, },
1270 + { .irq = -1 }
1271 };
1273 static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = {
1274 @@ -1003,7 +1004,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = {
1275 static struct omap_hwmod omap3xxx_timer9_hwmod = {
1276 .name = "timer9",
1277 .mpu_irqs = omap3xxx_timer9_mpu_irqs,
1278 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer9_mpu_irqs),
1279 .main_clk = "gpt9_fck",
1280 .prcm = {
1281 .omap2 = {
1282 @@ -1024,6 +1024,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {
1283 static struct omap_hwmod omap3xxx_timer10_hwmod;
1284 static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = {
1285 { .irq = 46, },
1286 + { .irq = -1 }
1287 };
1289 /* l4_core -> timer10 */
1290 @@ -1044,7 +1045,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = {
1291 static struct omap_hwmod omap3xxx_timer10_hwmod = {
1292 .name = "timer10",
1293 .mpu_irqs = omap3xxx_timer10_mpu_irqs,
1294 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer10_mpu_irqs),
1295 .main_clk = "gpt10_fck",
1296 .prcm = {
1297 .omap2 = {
1298 @@ -1065,6 +1065,7 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
1299 static struct omap_hwmod omap3xxx_timer11_hwmod;
1300 static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = {
1301 { .irq = 47, },
1302 + { .irq = -1 }
1303 };
1305 /* l4_core -> timer11 */
1306 @@ -1085,7 +1086,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = {
1307 static struct omap_hwmod omap3xxx_timer11_hwmod = {
1308 .name = "timer11",
1309 .mpu_irqs = omap3xxx_timer11_mpu_irqs,
1310 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer11_mpu_irqs),
1311 .main_clk = "gpt11_fck",
1312 .prcm = {
1313 .omap2 = {
1314 @@ -1106,6 +1106,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
1315 static struct omap_hwmod omap3xxx_timer12_hwmod;
1316 static struct omap_hwmod_irq_info omap3xxx_timer12_mpu_irqs[] = {
1317 { .irq = 95, },
1318 + { .irq = -1 }
1319 };
1321 static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = {
1322 @@ -1135,7 +1136,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer12_slaves[] = {
1323 static struct omap_hwmod omap3xxx_timer12_hwmod = {
1324 .name = "timer12",
1325 .mpu_irqs = omap3xxx_timer12_mpu_irqs,
1326 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer12_mpu_irqs),
1327 .main_clk = "gpt12_fck",
1328 .prcm = {
1329 .omap2 = {
1330 @@ -1256,6 +1256,7 @@ static struct omap_hwmod_class uart_class = {
1332 static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
1333 { .irq = INT_24XX_UART1_IRQ, },
1334 + { .irq = -1 }
1335 };
1337 static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
1338 @@ -1270,7 +1271,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = {
1339 static struct omap_hwmod omap3xxx_uart1_hwmod = {
1340 .name = "uart1",
1341 .mpu_irqs = uart1_mpu_irqs,
1342 - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs),
1343 .sdma_reqs = uart1_sdma_reqs,
1344 .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
1345 .main_clk = "uart1_fck",
1346 @@ -1293,6 +1293,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
1348 static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
1349 { .irq = INT_24XX_UART2_IRQ, },
1350 + { .irq = -1 }
1351 };
1353 static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
1354 @@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = {
1355 static struct omap_hwmod omap3xxx_uart2_hwmod = {
1356 .name = "uart2",
1357 .mpu_irqs = uart2_mpu_irqs,
1358 - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs),
1359 .sdma_reqs = uart2_sdma_reqs,
1360 .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
1361 .main_clk = "uart2_fck",
1362 @@ -1330,6 +1330,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
1364 static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
1365 { .irq = INT_24XX_UART3_IRQ, },
1366 + { .irq = -1 }
1367 };
1369 static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
1370 @@ -1344,7 +1345,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = {
1371 static struct omap_hwmod omap3xxx_uart3_hwmod = {
1372 .name = "uart3",
1373 .mpu_irqs = uart3_mpu_irqs,
1374 - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs),
1375 .sdma_reqs = uart3_sdma_reqs,
1376 .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
1377 .main_clk = "uart3_fck",
1378 @@ -1367,6 +1367,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
1380 static struct omap_hwmod_irq_info uart4_mpu_irqs[] = {
1381 { .irq = INT_36XX_UART4_IRQ, },
1382 + { .irq = -1 }
1383 };
1385 static struct omap_hwmod_dma_info uart4_sdma_reqs[] = {
1386 @@ -1381,7 +1382,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = {
1387 static struct omap_hwmod omap3xxx_uart4_hwmod = {
1388 .name = "uart4",
1389 .mpu_irqs = uart4_mpu_irqs,
1390 - .mpu_irqs_cnt = ARRAY_SIZE(uart4_mpu_irqs),
1391 .sdma_reqs = uart4_sdma_reqs,
1392 .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs),
1393 .main_clk = "uart4_fck",
1394 @@ -1557,6 +1557,7 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = {
1396 static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = {
1397 { .irq = 25 },
1398 + { .irq = -1 }
1399 };
1401 /* l4_core -> dss_dispc */
1402 @@ -1584,7 +1585,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
1403 .name = "dss_dispc",
1404 .class = &omap3xxx_dispc_hwmod_class,
1405 .mpu_irqs = omap3xxx_dispc_irqs,
1406 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dispc_irqs),
1407 .main_clk = "dss1_alwon_fck",
1408 .prcm = {
1409 .omap2 = {
1410 @@ -1612,6 +1612,7 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = {
1412 static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = {
1413 { .irq = 25 },
1414 + { .irq = -1 }
1415 };
1417 /* dss_dsi1 */
1418 @@ -1648,7 +1649,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1419 .name = "dss_dsi1",
1420 .class = &omap3xxx_dsi_hwmod_class,
1421 .mpu_irqs = omap3xxx_dsi1_irqs,
1422 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dsi1_irqs),
1423 .main_clk = "dss1_alwon_fck",
1424 .prcm = {
1425 .omap2 = {
1426 @@ -1783,6 +1783,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = {
1428 static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
1429 { .irq = INT_24XX_I2C1_IRQ, },
1430 + { .irq = -1 }
1431 };
1433 static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
1434 @@ -1797,7 +1798,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
1435 static struct omap_hwmod omap3xxx_i2c1_hwmod = {
1436 .name = "i2c1",
1437 .mpu_irqs = i2c1_mpu_irqs,
1438 - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
1439 .sdma_reqs = i2c1_sdma_reqs,
1440 .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
1441 .main_clk = "i2c1_fck",
1442 @@ -1825,6 +1825,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = {
1444 static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
1445 { .irq = INT_24XX_I2C2_IRQ, },
1446 + { .irq = -1 }
1447 };
1449 static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
1450 @@ -1839,7 +1840,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
1451 static struct omap_hwmod omap3xxx_i2c2_hwmod = {
1452 .name = "i2c2",
1453 .mpu_irqs = i2c2_mpu_irqs,
1454 - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs),
1455 .sdma_reqs = i2c2_sdma_reqs,
1456 .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs),
1457 .main_clk = "i2c2_fck",
1458 @@ -1867,6 +1867,7 @@ static struct omap_i2c_dev_attr i2c3_dev_attr = {
1460 static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = {
1461 { .irq = INT_34XX_I2C3_IRQ, },
1462 + { .irq = -1 }
1463 };
1465 static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = {
1466 @@ -1881,7 +1882,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {
1467 static struct omap_hwmod omap3xxx_i2c3_hwmod = {
1468 .name = "i2c3",
1469 .mpu_irqs = i2c3_mpu_irqs,
1470 - .mpu_irqs_cnt = ARRAY_SIZE(i2c3_mpu_irqs),
1471 .sdma_reqs = i2c3_sdma_reqs,
1472 .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs),
1473 .main_clk = "i2c3_fck",
1474 @@ -2034,6 +2034,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
1475 /* gpio1 */
1476 static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = {
1477 { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */
1478 + { .irq = -1 }
1479 };
1481 static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
1482 @@ -2048,7 +2049,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = {
1483 .name = "gpio1",
1484 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1485 .mpu_irqs = omap3xxx_gpio1_irqs,
1486 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs),
1487 .main_clk = "gpio1_ick",
1488 .opt_clks = gpio1_opt_clks,
1489 .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks),
1490 @@ -2071,6 +2071,7 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = {
1491 /* gpio2 */
1492 static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = {
1493 { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */
1494 + { .irq = -1 }
1495 };
1497 static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {
1498 @@ -2085,7 +2086,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = {
1499 .name = "gpio2",
1500 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1501 .mpu_irqs = omap3xxx_gpio2_irqs,
1502 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs),
1503 .main_clk = "gpio2_ick",
1504 .opt_clks = gpio2_opt_clks,
1505 .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks),
1506 @@ -2108,6 +2108,7 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = {
1507 /* gpio3 */
1508 static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = {
1509 { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */
1510 + { .irq = -1 }
1511 };
1513 static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {
1514 @@ -2122,7 +2123,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = {
1515 .name = "gpio3",
1516 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1517 .mpu_irqs = omap3xxx_gpio3_irqs,
1518 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs),
1519 .main_clk = "gpio3_ick",
1520 .opt_clks = gpio3_opt_clks,
1521 .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks),
1522 @@ -2145,6 +2145,7 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = {
1523 /* gpio4 */
1524 static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = {
1525 { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */
1526 + { .irq = -1 }
1527 };
1529 static struct omap_hwmod_opt_clk gpio4_opt_clks[] = {
1530 @@ -2159,7 +2160,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = {
1531 .name = "gpio4",
1532 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1533 .mpu_irqs = omap3xxx_gpio4_irqs,
1534 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs),
1535 .main_clk = "gpio4_ick",
1536 .opt_clks = gpio4_opt_clks,
1537 .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks),
1538 @@ -2182,6 +2182,7 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = {
1539 /* gpio5 */
1540 static struct omap_hwmod_irq_info omap3xxx_gpio5_irqs[] = {
1541 { .irq = 33 }, /* INT_34XX_GPIO_BANK5 */
1542 + { .irq = -1 }
1543 };
1545 static struct omap_hwmod_opt_clk gpio5_opt_clks[] = {
1546 @@ -2196,7 +2197,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {
1547 .name = "gpio5",
1548 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1549 .mpu_irqs = omap3xxx_gpio5_irqs,
1550 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs),
1551 .main_clk = "gpio5_ick",
1552 .opt_clks = gpio5_opt_clks,
1553 .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks),
1554 @@ -2219,6 +2219,7 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {
1555 /* gpio6 */
1556 static struct omap_hwmod_irq_info omap3xxx_gpio6_irqs[] = {
1557 { .irq = 34 }, /* INT_34XX_GPIO_BANK6 */
1558 + { .irq = -1 }
1559 };
1561 static struct omap_hwmod_opt_clk gpio6_opt_clks[] = {
1562 @@ -2233,7 +2234,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {
1563 .name = "gpio6",
1564 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1565 .mpu_irqs = omap3xxx_gpio6_irqs,
1566 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs),
1567 .main_clk = "gpio6_ick",
1568 .opt_clks = gpio6_opt_clks,
1569 .opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks),
1570 @@ -2292,6 +2292,7 @@ static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = {
1571 { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
1572 { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
1573 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
1574 + { .irq = -1 }
1575 };
1577 static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {
1578 @@ -2326,7 +2327,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = {
1579 .name = "dma",
1580 .class = &omap3xxx_dma_hwmod_class,
1581 .mpu_irqs = omap3xxx_dma_system_irqs,
1582 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dma_system_irqs),
1583 .main_clk = "core_l3_ick",
1584 .prcm = {
1585 .omap2 = {
1586 @@ -2371,6 +2371,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = {
1587 { .name = "irq", .irq = 16 },
1588 { .name = "tx", .irq = 59 },
1589 { .name = "rx", .irq = 60 },
1590 + { .irq = -1 }
1591 };
1593 static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = {
1594 @@ -2406,7 +2407,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
1595 .name = "mcbsp1",
1596 .class = &omap3xxx_mcbsp_hwmod_class,
1597 .mpu_irqs = omap3xxx_mcbsp1_irqs,
1598 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_irqs),
1599 .sdma_reqs = omap3xxx_mcbsp1_sdma_chs,
1600 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs),
1601 .main_clk = "mcbsp1_fck",
1602 @@ -2429,6 +2429,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = {
1603 { .name = "irq", .irq = 17 },
1604 { .name = "tx", .irq = 62 },
1605 { .name = "rx", .irq = 63 },
1606 + { .irq = -1 }
1607 };
1609 static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = {
1610 @@ -2469,7 +2470,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
1611 .name = "mcbsp2",
1612 .class = &omap3xxx_mcbsp_hwmod_class,
1613 .mpu_irqs = omap3xxx_mcbsp2_irqs,
1614 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_irqs),
1615 .sdma_reqs = omap3xxx_mcbsp2_sdma_chs,
1616 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs),
1617 .main_clk = "mcbsp2_fck",
1618 @@ -2493,6 +2493,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = {
1619 { .name = "irq", .irq = 22 },
1620 { .name = "tx", .irq = 89 },
1621 { .name = "rx", .irq = 90 },
1622 + { .irq = -1 }
1623 };
1625 static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = {
1626 @@ -2532,7 +2533,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
1627 .name = "mcbsp3",
1628 .class = &omap3xxx_mcbsp_hwmod_class,
1629 .mpu_irqs = omap3xxx_mcbsp3_irqs,
1630 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_irqs),
1631 .sdma_reqs = omap3xxx_mcbsp3_sdma_chs,
1632 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs),
1633 .main_clk = "mcbsp3_fck",
1634 @@ -2556,6 +2556,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = {
1635 { .name = "irq", .irq = 23 },
1636 { .name = "tx", .irq = 54 },
1637 { .name = "rx", .irq = 55 },
1638 + { .irq = -1 }
1639 };
1641 static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = {
1642 @@ -2591,7 +2592,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
1643 .name = "mcbsp4",
1644 .class = &omap3xxx_mcbsp_hwmod_class,
1645 .mpu_irqs = omap3xxx_mcbsp4_irqs,
1646 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_irqs),
1647 .sdma_reqs = omap3xxx_mcbsp4_sdma_chs,
1648 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs),
1649 .main_clk = "mcbsp4_fck",
1650 @@ -2614,6 +2614,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = {
1651 { .name = "irq", .irq = 27 },
1652 { .name = "tx", .irq = 81 },
1653 { .name = "rx", .irq = 82 },
1654 + { .irq = -1 }
1655 };
1657 static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = {
1658 @@ -2649,7 +2650,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
1659 .name = "mcbsp5",
1660 .class = &omap3xxx_mcbsp_hwmod_class,
1661 .mpu_irqs = omap3xxx_mcbsp5_irqs,
1662 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_irqs),
1663 .sdma_reqs = omap3xxx_mcbsp5_sdma_chs,
1664 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs),
1665 .main_clk = "mcbsp5_fck",
1666 @@ -2682,6 +2682,7 @@ static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = {
1667 /* mcbsp2_sidetone */
1668 static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = {
1669 { .name = "irq", .irq = 4 },
1670 + { .irq = -1 }
1671 };
1673 static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = {
1674 @@ -2712,7 +2713,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
1675 .name = "mcbsp2_sidetone",
1676 .class = &omap3xxx_mcbsp_sidetone_hwmod_class,
1677 .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs,
1678 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_irqs),
1679 .main_clk = "mcbsp2_fck",
1680 .prcm = {
1681 .omap2 = {
1682 @@ -2731,6 +2731,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
1683 /* mcbsp3_sidetone */
1684 static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = {
1685 { .name = "irq", .irq = 5 },
1686 + { .irq = -1 }
1687 };
1689 static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = {
1690 @@ -2761,7 +2762,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {
1691 .name = "mcbsp3_sidetone",
1692 .class = &omap3xxx_mcbsp_sidetone_hwmod_class,
1693 .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs,
1694 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_irqs),
1695 .main_clk = "mcbsp3_fck",
1696 .prcm = {
1697 .omap2 = {
1698 @@ -2931,6 +2931,7 @@ static struct omap_hwmod_class omap3xxx_mailbox_hwmod_class = {
1699 static struct omap_hwmod omap3xxx_mailbox_hwmod;
1700 static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = {
1701 { .irq = 26 },
1702 + { .irq = -1 }
1703 };
1705 static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = {
1706 @@ -2959,7 +2960,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = {
1707 .name = "mailbox",
1708 .class = &omap3xxx_mailbox_hwmod_class,
1709 .mpu_irqs = omap3xxx_mailbox_irqs,
1710 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mailbox_irqs),
1711 .main_clk = "mailboxes_ick",
1712 .prcm = {
1713 .omap2 = {
1714 @@ -3046,6 +3046,7 @@ static struct omap_hwmod_class omap34xx_mcspi_class = {
1715 /* mcspi1 */
1716 static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = {
1717 { .name = "irq", .irq = 65 },
1718 + { .irq = -1 }
1719 };
1721 static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = {
1722 @@ -3070,7 +3071,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
1723 static struct omap_hwmod omap34xx_mcspi1 = {
1724 .name = "mcspi1",
1725 .mpu_irqs = omap34xx_mcspi1_mpu_irqs,
1726 - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_mpu_irqs),
1727 .sdma_reqs = omap34xx_mcspi1_sdma_reqs,
1728 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs),
1729 .main_clk = "mcspi1_fck",
1730 @@ -3093,6 +3093,7 @@ static struct omap_hwmod omap34xx_mcspi1 = {
1731 /* mcspi2 */
1732 static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = {
1733 { .name = "irq", .irq = 66 },
1734 + { .irq = -1 }
1735 };
1737 static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = {
1738 @@ -3113,7 +3114,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
1739 static struct omap_hwmod omap34xx_mcspi2 = {
1740 .name = "mcspi2",
1741 .mpu_irqs = omap34xx_mcspi2_mpu_irqs,
1742 - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_mpu_irqs),
1743 .sdma_reqs = omap34xx_mcspi2_sdma_reqs,
1744 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs),
1745 .main_clk = "mcspi2_fck",
1746 @@ -3136,6 +3136,7 @@ static struct omap_hwmod omap34xx_mcspi2 = {
1747 /* mcspi3 */
1748 static struct omap_hwmod_irq_info omap34xx_mcspi3_mpu_irqs[] = {
1749 { .name = "irq", .irq = 91 }, /* 91 */
1750 + { .irq = -1 }
1751 };
1753 static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = {
1754 @@ -3156,7 +3157,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
1755 static struct omap_hwmod omap34xx_mcspi3 = {
1756 .name = "mcspi3",
1757 .mpu_irqs = omap34xx_mcspi3_mpu_irqs,
1758 - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_mpu_irqs),
1759 .sdma_reqs = omap34xx_mcspi3_sdma_reqs,
1760 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs),
1761 .main_clk = "mcspi3_fck",
1762 @@ -3179,6 +3179,7 @@ static struct omap_hwmod omap34xx_mcspi3 = {
1763 /* SPI4 */
1764 static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = {
1765 { .name = "irq", .irq = INT_34XX_SPI4_IRQ }, /* 48 */
1766 + { .irq = -1 }
1767 };
1769 static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = {
1770 @@ -3197,7 +3198,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = {
1771 static struct omap_hwmod omap34xx_mcspi4 = {
1772 .name = "mcspi4",
1773 .mpu_irqs = omap34xx_mcspi4_mpu_irqs,
1774 - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_mpu_irqs),
1775 .sdma_reqs = omap34xx_mcspi4_sdma_reqs,
1776 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs),
1777 .main_clk = "mcspi4_fck",
1778 @@ -3241,12 +3241,12 @@ static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = {
1780 { .name = "mc", .irq = 92 },
1781 { .name = "dma", .irq = 93 },
1782 + { .irq = -1 }
1783 };
1785 static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
1786 .name = "usb_otg_hs",
1787 .mpu_irqs = omap3xxx_usbhsotg_mpu_irqs,
1788 - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_mpu_irqs),
1789 .main_clk = "hsotgusb_ick",
1790 .prcm = {
1791 .omap2 = {
1792 @@ -3278,6 +3278,7 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
1793 static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = {
1795 { .name = "mc", .irq = 71 },
1796 + { .irq = -1 }
1797 };
1799 static struct omap_hwmod_class am35xx_usbotg_class = {
1800 @@ -3288,7 +3289,6 @@ static struct omap_hwmod_class am35xx_usbotg_class = {
1801 static struct omap_hwmod am35xx_usbhsotg_hwmod = {
1802 .name = "am35x_otg_hs",
1803 .mpu_irqs = am35xx_usbhsotg_mpu_irqs,
1804 - .mpu_irqs_cnt = ARRAY_SIZE(am35xx_usbhsotg_mpu_irqs),
1805 .main_clk = NULL,
1806 .prcm = {
1807 .omap2 = {
1808 @@ -3324,6 +3324,7 @@ static struct omap_hwmod_class omap34xx_mmc_class = {
1810 static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = {
1811 { .irq = 83, },
1812 + { .irq = -1 }
1813 };
1815 static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = {
1816 @@ -3346,7 +3347,6 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = {
1817 static struct omap_hwmod omap3xxx_mmc1_hwmod = {
1818 .name = "mmc1",
1819 .mpu_irqs = omap34xx_mmc1_mpu_irqs,
1820 - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc1_mpu_irqs),
1821 .sdma_reqs = omap34xx_mmc1_sdma_reqs,
1822 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs),
1823 .opt_clks = omap34xx_mmc1_opt_clks,
1824 @@ -3372,6 +3372,7 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = {
1826 static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = {
1827 { .irq = INT_24XX_MMC2_IRQ, },
1828 + { .irq = -1 }
1829 };
1831 static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = {
1832 @@ -3390,7 +3391,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = {
1833 static struct omap_hwmod omap3xxx_mmc2_hwmod = {
1834 .name = "mmc2",
1835 .mpu_irqs = omap34xx_mmc2_mpu_irqs,
1836 - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc2_mpu_irqs),
1837 .sdma_reqs = omap34xx_mmc2_sdma_reqs,
1838 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs),
1839 .opt_clks = omap34xx_mmc2_opt_clks,
1840 @@ -3415,6 +3415,7 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = {
1842 static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = {
1843 { .irq = 94, },
1844 + { .irq = -1 }
1845 };
1847 static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = {
1848 @@ -3433,7 +3434,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc3_slaves[] = {
1849 static struct omap_hwmod omap3xxx_mmc3_hwmod = {
1850 .name = "mmc3",
1851 .mpu_irqs = omap34xx_mmc3_mpu_irqs,
1852 - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc3_mpu_irqs),
1853 .sdma_reqs = omap34xx_mmc3_sdma_reqs,
1854 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs),
1855 .opt_clks = omap34xx_mmc3_opt_clks,
1856 diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
1857 index f8ccc4a..f7ff937 100644
1858 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
1859 +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
1860 @@ -115,6 +115,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = {
1862 static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = {
1863 { .irq = 113 + OMAP44XX_IRQ_GIC_START },
1864 + { .irq = -1 }
1865 };
1867 static struct omap_hwmod omap44xx_dmm_hwmod = {
1868 @@ -123,7 +124,6 @@ static struct omap_hwmod omap44xx_dmm_hwmod = {
1869 .slaves = omap44xx_dmm_slaves,
1870 .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves),
1871 .mpu_irqs = omap44xx_dmm_irqs,
1872 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmm_irqs),
1873 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1874 };
1876 @@ -268,6 +268,7 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = {
1877 static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = {
1878 { .irq = 9 + OMAP44XX_IRQ_GIC_START },
1879 { .irq = 10 + OMAP44XX_IRQ_GIC_START },
1880 + { .irq = -1 }
1881 };
1883 static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = {
1884 @@ -303,7 +304,6 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
1885 .name = "l3_main_1",
1886 .class = &omap44xx_l3_hwmod_class,
1887 .mpu_irqs = omap44xx_l3_targ_irqs,
1888 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_l3_targ_irqs),
1889 .slaves = omap44xx_l3_main_1_slaves,
1890 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves),
1891 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
1892 @@ -673,6 +673,7 @@ static struct omap_hwmod_class omap44xx_aess_hwmod_class = {
1893 /* aess */
1894 static struct omap_hwmod_irq_info omap44xx_aess_irqs[] = {
1895 { .irq = 99 + OMAP44XX_IRQ_GIC_START },
1896 + { .irq = -1 }
1897 };
1899 static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = {
1900 @@ -737,7 +738,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
1901 .name = "aess",
1902 .class = &omap44xx_aess_hwmod_class,
1903 .mpu_irqs = omap44xx_aess_irqs,
1904 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_aess_irqs),
1905 .sdma_reqs = omap44xx_aess_sdma_reqs,
1906 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs),
1907 .main_clk = "aess_fck",
1908 @@ -876,6 +876,7 @@ static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = {
1909 { .name = "1", .irq = 13 + OMAP44XX_IRQ_GIC_START },
1910 { .name = "2", .irq = 14 + OMAP44XX_IRQ_GIC_START },
1911 { .name = "3", .irq = 15 + OMAP44XX_IRQ_GIC_START },
1912 + { .irq = -1 }
1913 };
1915 /* dma_system master ports */
1916 @@ -910,7 +911,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = {
1917 .name = "dma_system",
1918 .class = &omap44xx_dma_hwmod_class,
1919 .mpu_irqs = omap44xx_dma_system_irqs,
1920 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dma_system_irqs),
1921 .main_clk = "l3_div_ck",
1922 .prcm = {
1923 .omap4 = {
1924 @@ -949,6 +949,7 @@ static struct omap_hwmod_class omap44xx_dmic_hwmod_class = {
1925 static struct omap_hwmod omap44xx_dmic_hwmod;
1926 static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = {
1927 { .irq = 114 + OMAP44XX_IRQ_GIC_START },
1928 + { .irq = -1 }
1929 };
1931 static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = {
1932 @@ -1001,7 +1002,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = {
1933 .name = "dmic",
1934 .class = &omap44xx_dmic_hwmod_class,
1935 .mpu_irqs = omap44xx_dmic_irqs,
1936 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmic_irqs),
1937 .sdma_reqs = omap44xx_dmic_sdma_reqs,
1938 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs),
1939 .main_clk = "dmic_fck",
1940 @@ -1027,6 +1027,7 @@ static struct omap_hwmod_class omap44xx_dsp_hwmod_class = {
1941 /* dsp */
1942 static struct omap_hwmod_irq_info omap44xx_dsp_irqs[] = {
1943 { .irq = 28 + OMAP44XX_IRQ_GIC_START },
1944 + { .irq = -1 }
1945 };
1947 static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = {
1948 @@ -1083,7 +1084,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
1949 .name = "dsp",
1950 .class = &omap44xx_dsp_hwmod_class,
1951 .mpu_irqs = omap44xx_dsp_irqs,
1952 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dsp_irqs),
1953 .rst_lines = omap44xx_dsp_resets,
1954 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets),
1955 .main_clk = "dsp_fck",
1956 @@ -1216,6 +1216,7 @@ static struct omap_hwmod_class omap44xx_dispc_hwmod_class = {
1957 static struct omap_hwmod omap44xx_dss_dispc_hwmod;
1958 static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = {
1959 { .irq = 25 + OMAP44XX_IRQ_GIC_START },
1960 + { .irq = -1 }
1961 };
1963 static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = {
1964 @@ -1268,7 +1269,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
1965 .name = "dss_dispc",
1966 .class = &omap44xx_dispc_hwmod_class,
1967 .mpu_irqs = omap44xx_dss_dispc_irqs,
1968 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_irqs),
1969 .sdma_reqs = omap44xx_dss_dispc_sdma_reqs,
1970 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs),
1971 .main_clk = "dss_fck",
1972 @@ -1307,6 +1307,7 @@ static struct omap_hwmod_class omap44xx_dsi_hwmod_class = {
1973 static struct omap_hwmod omap44xx_dss_dsi1_hwmod;
1974 static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = {
1975 { .irq = 53 + OMAP44XX_IRQ_GIC_START },
1976 + { .irq = -1 }
1977 };
1979 static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = {
1980 @@ -1359,7 +1360,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
1981 .name = "dss_dsi1",
1982 .class = &omap44xx_dsi_hwmod_class,
1983 .mpu_irqs = omap44xx_dss_dsi1_irqs,
1984 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_irqs),
1985 .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs,
1986 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs),
1987 .main_clk = "dss_fck",
1988 @@ -1377,6 +1377,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
1989 static struct omap_hwmod omap44xx_dss_dsi2_hwmod;
1990 static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = {
1991 { .irq = 84 + OMAP44XX_IRQ_GIC_START },
1992 + { .irq = -1 }
1993 };
1995 static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = {
1996 @@ -1429,7 +1430,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
1997 .name = "dss_dsi2",
1998 .class = &omap44xx_dsi_hwmod_class,
1999 .mpu_irqs = omap44xx_dss_dsi2_irqs,
2000 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_irqs),
2001 .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs,
2002 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs),
2003 .main_clk = "dss_fck",
2004 @@ -1467,6 +1467,7 @@ static struct omap_hwmod_class omap44xx_hdmi_hwmod_class = {
2005 static struct omap_hwmod omap44xx_dss_hdmi_hwmod;
2006 static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = {
2007 { .irq = 101 + OMAP44XX_IRQ_GIC_START },
2008 + { .irq = -1 }
2009 };
2011 static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = {
2012 @@ -1519,7 +1520,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
2013 .name = "dss_hdmi",
2014 .class = &omap44xx_hdmi_hwmod_class,
2015 .mpu_irqs = omap44xx_dss_hdmi_irqs,
2016 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_irqs),
2017 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
2018 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs),
2019 .main_clk = "dss_fck",
2020 @@ -1717,6 +1717,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
2021 static struct omap_hwmod omap44xx_gpio1_hwmod;
2022 static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = {
2023 { .irq = 29 + OMAP44XX_IRQ_GIC_START },
2024 + { .irq = -1 }
2025 };
2027 static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = {
2028 @@ -1750,7 +1751,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
2029 .name = "gpio1",
2030 .class = &omap44xx_gpio_hwmod_class,
2031 .mpu_irqs = omap44xx_gpio1_irqs,
2032 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio1_irqs),
2033 .main_clk = "gpio1_ick",
2034 .prcm = {
2035 .omap4 = {
2036 @@ -1769,6 +1769,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
2037 static struct omap_hwmod omap44xx_gpio2_hwmod;
2038 static struct omap_hwmod_irq_info omap44xx_gpio2_irqs[] = {
2039 { .irq = 30 + OMAP44XX_IRQ_GIC_START },
2040 + { .irq = -1 }
2041 };
2043 static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = {
2044 @@ -1803,7 +1804,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
2045 .class = &omap44xx_gpio_hwmod_class,
2046 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2047 .mpu_irqs = omap44xx_gpio2_irqs,
2048 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio2_irqs),
2049 .main_clk = "gpio2_ick",
2050 .prcm = {
2051 .omap4 = {
2052 @@ -1822,6 +1822,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
2053 static struct omap_hwmod omap44xx_gpio3_hwmod;
2054 static struct omap_hwmod_irq_info omap44xx_gpio3_irqs[] = {
2055 { .irq = 31 + OMAP44XX_IRQ_GIC_START },
2056 + { .irq = -1 }
2057 };
2059 static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = {
2060 @@ -1856,7 +1857,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
2061 .class = &omap44xx_gpio_hwmod_class,
2062 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2063 .mpu_irqs = omap44xx_gpio3_irqs,
2064 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio3_irqs),
2065 .main_clk = "gpio3_ick",
2066 .prcm = {
2067 .omap4 = {
2068 @@ -1875,6 +1875,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
2069 static struct omap_hwmod omap44xx_gpio4_hwmod;
2070 static struct omap_hwmod_irq_info omap44xx_gpio4_irqs[] = {
2071 { .irq = 32 + OMAP44XX_IRQ_GIC_START },
2072 + { .irq = -1 }
2073 };
2075 static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = {
2076 @@ -1909,7 +1910,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
2077 .class = &omap44xx_gpio_hwmod_class,
2078 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2079 .mpu_irqs = omap44xx_gpio4_irqs,
2080 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio4_irqs),
2081 .main_clk = "gpio4_ick",
2082 .prcm = {
2083 .omap4 = {
2084 @@ -1928,6 +1928,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
2085 static struct omap_hwmod omap44xx_gpio5_hwmod;
2086 static struct omap_hwmod_irq_info omap44xx_gpio5_irqs[] = {
2087 { .irq = 33 + OMAP44XX_IRQ_GIC_START },
2088 + { .irq = -1 }
2089 };
2091 static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = {
2092 @@ -1962,7 +1963,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
2093 .class = &omap44xx_gpio_hwmod_class,
2094 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2095 .mpu_irqs = omap44xx_gpio5_irqs,
2096 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio5_irqs),
2097 .main_clk = "gpio5_ick",
2098 .prcm = {
2099 .omap4 = {
2100 @@ -1981,6 +1981,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
2101 static struct omap_hwmod omap44xx_gpio6_hwmod;
2102 static struct omap_hwmod_irq_info omap44xx_gpio6_irqs[] = {
2103 { .irq = 34 + OMAP44XX_IRQ_GIC_START },
2104 + { .irq = -1 }
2105 };
2107 static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = {
2108 @@ -2015,7 +2016,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {
2109 .class = &omap44xx_gpio_hwmod_class,
2110 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2111 .mpu_irqs = omap44xx_gpio6_irqs,
2112 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio6_irqs),
2113 .main_clk = "gpio6_ick",
2114 .prcm = {
2115 .omap4 = {
2116 @@ -2059,6 +2059,7 @@ static struct omap_hwmod_irq_info omap44xx_hsi_irqs[] = {
2117 { .name = "mpu_p1", .irq = 67 + OMAP44XX_IRQ_GIC_START },
2118 { .name = "mpu_p2", .irq = 68 + OMAP44XX_IRQ_GIC_START },
2119 { .name = "mpu_dma", .irq = 71 + OMAP44XX_IRQ_GIC_START },
2120 + { .irq = -1 }
2121 };
2123 /* hsi master ports */
2124 @@ -2093,7 +2094,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = {
2125 .name = "hsi",
2126 .class = &omap44xx_hsi_hwmod_class,
2127 .mpu_irqs = omap44xx_hsi_irqs,
2128 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_hsi_irqs),
2129 .main_clk = "hsi_fck",
2130 .prcm = {
2131 .omap4 = {
2132 @@ -2132,6 +2132,7 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = {
2133 static struct omap_hwmod omap44xx_i2c1_hwmod;
2134 static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = {
2135 { .irq = 56 + OMAP44XX_IRQ_GIC_START },
2136 + { .irq = -1 }
2137 };
2139 static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = {
2140 @@ -2167,7 +2168,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
2141 .class = &omap44xx_i2c_hwmod_class,
2142 .flags = HWMOD_INIT_NO_RESET,
2143 .mpu_irqs = omap44xx_i2c1_irqs,
2144 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs),
2145 .sdma_reqs = omap44xx_i2c1_sdma_reqs,
2146 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs),
2147 .main_clk = "i2c1_fck",
2148 @@ -2185,6 +2185,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
2149 static struct omap_hwmod omap44xx_i2c2_hwmod;
2150 static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = {
2151 { .irq = 57 + OMAP44XX_IRQ_GIC_START },
2152 + { .irq = -1 }
2153 };
2155 static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = {
2156 @@ -2220,7 +2221,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
2157 .class = &omap44xx_i2c_hwmod_class,
2158 .flags = HWMOD_INIT_NO_RESET,
2159 .mpu_irqs = omap44xx_i2c2_irqs,
2160 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs),
2161 .sdma_reqs = omap44xx_i2c2_sdma_reqs,
2162 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs),
2163 .main_clk = "i2c2_fck",
2164 @@ -2238,6 +2238,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
2165 static struct omap_hwmod omap44xx_i2c3_hwmod;
2166 static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = {
2167 { .irq = 61 + OMAP44XX_IRQ_GIC_START },
2168 + { .irq = -1 }
2169 };
2171 static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = {
2172 @@ -2273,7 +2274,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
2173 .class = &omap44xx_i2c_hwmod_class,
2174 .flags = HWMOD_INIT_NO_RESET,
2175 .mpu_irqs = omap44xx_i2c3_irqs,
2176 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c3_irqs),
2177 .sdma_reqs = omap44xx_i2c3_sdma_reqs,
2178 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs),
2179 .main_clk = "i2c3_fck",
2180 @@ -2291,6 +2291,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
2181 static struct omap_hwmod omap44xx_i2c4_hwmod;
2182 static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = {
2183 { .irq = 62 + OMAP44XX_IRQ_GIC_START },
2184 + { .irq = -1 }
2185 };
2187 static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = {
2188 @@ -2326,7 +2327,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
2189 .class = &omap44xx_i2c_hwmod_class,
2190 .flags = HWMOD_INIT_NO_RESET,
2191 .mpu_irqs = omap44xx_i2c4_irqs,
2192 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c4_irqs),
2193 .sdma_reqs = omap44xx_i2c4_sdma_reqs,
2194 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs),
2195 .main_clk = "i2c4_fck",
2196 @@ -2352,6 +2352,7 @@ static struct omap_hwmod_class omap44xx_ipu_hwmod_class = {
2197 /* ipu */
2198 static struct omap_hwmod_irq_info omap44xx_ipu_irqs[] = {
2199 { .irq = 100 + OMAP44XX_IRQ_GIC_START },
2200 + { .irq = -1 }
2201 };
2203 static struct omap_hwmod_rst_info omap44xx_ipu_c0_resets[] = {
2204 @@ -2418,7 +2419,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
2205 .name = "ipu",
2206 .class = &omap44xx_ipu_hwmod_class,
2207 .mpu_irqs = omap44xx_ipu_irqs,
2208 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_ipu_irqs),
2209 .rst_lines = omap44xx_ipu_resets,
2210 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets),
2211 .main_clk = "ipu_fck",
2212 @@ -2459,6 +2459,7 @@ static struct omap_hwmod_class omap44xx_iss_hwmod_class = {
2213 /* iss */
2214 static struct omap_hwmod_irq_info omap44xx_iss_irqs[] = {
2215 { .irq = 24 + OMAP44XX_IRQ_GIC_START },
2216 + { .irq = -1 }
2217 };
2219 static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = {
2220 @@ -2504,7 +2505,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = {
2221 .name = "iss",
2222 .class = &omap44xx_iss_hwmod_class,
2223 .mpu_irqs = omap44xx_iss_irqs,
2224 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iss_irqs),
2225 .sdma_reqs = omap44xx_iss_sdma_reqs,
2226 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs),
2227 .main_clk = "iss_fck",
2228 @@ -2536,6 +2536,7 @@ static struct omap_hwmod_irq_info omap44xx_iva_irqs[] = {
2229 { .name = "sync_1", .irq = 103 + OMAP44XX_IRQ_GIC_START },
2230 { .name = "sync_0", .irq = 104 + OMAP44XX_IRQ_GIC_START },
2231 { .name = "mailbox_0", .irq = 107 + OMAP44XX_IRQ_GIC_START },
2232 + { .irq = -1 }
2233 };
2235 static struct omap_hwmod_rst_info omap44xx_iva_resets[] = {
2236 @@ -2614,7 +2615,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = {
2237 .name = "iva",
2238 .class = &omap44xx_iva_hwmod_class,
2239 .mpu_irqs = omap44xx_iva_irqs,
2240 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iva_irqs),
2241 .rst_lines = omap44xx_iva_resets,
2242 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets),
2243 .main_clk = "iva_fck",
2244 @@ -2657,6 +2657,7 @@ static struct omap_hwmod_class omap44xx_kbd_hwmod_class = {
2245 static struct omap_hwmod omap44xx_kbd_hwmod;
2246 static struct omap_hwmod_irq_info omap44xx_kbd_irqs[] = {
2247 { .irq = 120 + OMAP44XX_IRQ_GIC_START },
2248 + { .irq = -1 }
2249 };
2251 static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = {
2252 @@ -2686,7 +2687,6 @@ static struct omap_hwmod omap44xx_kbd_hwmod = {
2253 .name = "kbd",
2254 .class = &omap44xx_kbd_hwmod_class,
2255 .mpu_irqs = omap44xx_kbd_irqs,
2256 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_kbd_irqs),
2257 .main_clk = "kbd_fck",
2258 .prcm = {
2259 .omap4 = {
2260 @@ -2722,6 +2722,7 @@ static struct omap_hwmod_class omap44xx_mailbox_hwmod_class = {
2261 static struct omap_hwmod omap44xx_mailbox_hwmod;
2262 static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = {
2263 { .irq = 26 + OMAP44XX_IRQ_GIC_START },
2264 + { .irq = -1 }
2265 };
2267 static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = {
2268 @@ -2751,7 +2752,6 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = {
2269 .name = "mailbox",
2270 .class = &omap44xx_mailbox_hwmod_class,
2271 .mpu_irqs = omap44xx_mailbox_irqs,
2272 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mailbox_irqs),
2273 .prcm = {
2274 .omap4 = {
2275 .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL,
2276 @@ -2785,6 +2785,7 @@ static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = {
2277 static struct omap_hwmod omap44xx_mcbsp1_hwmod;
2278 static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = {
2279 { .irq = 17 + OMAP44XX_IRQ_GIC_START },
2280 + { .irq = -1 }
2281 };
2283 static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = {
2284 @@ -2840,7 +2841,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
2285 .name = "mcbsp1",
2286 .class = &omap44xx_mcbsp_hwmod_class,
2287 .mpu_irqs = omap44xx_mcbsp1_irqs,
2288 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_irqs),
2289 .sdma_reqs = omap44xx_mcbsp1_sdma_reqs,
2290 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs),
2291 .main_clk = "mcbsp1_fck",
2292 @@ -2858,6 +2858,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
2293 static struct omap_hwmod omap44xx_mcbsp2_hwmod;
2294 static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = {
2295 { .irq = 22 + OMAP44XX_IRQ_GIC_START },
2296 + { .irq = -1 }
2297 };
2299 static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = {
2300 @@ -2913,7 +2914,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
2301 .name = "mcbsp2",
2302 .class = &omap44xx_mcbsp_hwmod_class,
2303 .mpu_irqs = omap44xx_mcbsp2_irqs,
2304 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_irqs),
2305 .sdma_reqs = omap44xx_mcbsp2_sdma_reqs,
2306 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs),
2307 .main_clk = "mcbsp2_fck",
2308 @@ -2931,6 +2931,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
2309 static struct omap_hwmod omap44xx_mcbsp3_hwmod;
2310 static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = {
2311 { .irq = 23 + OMAP44XX_IRQ_GIC_START },
2312 + { .irq = -1 }
2313 };
2315 static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = {
2316 @@ -2986,7 +2987,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
2317 .name = "mcbsp3",
2318 .class = &omap44xx_mcbsp_hwmod_class,
2319 .mpu_irqs = omap44xx_mcbsp3_irqs,
2320 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_irqs),
2321 .sdma_reqs = omap44xx_mcbsp3_sdma_reqs,
2322 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs),
2323 .main_clk = "mcbsp3_fck",
2324 @@ -3004,6 +3004,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
2325 static struct omap_hwmod omap44xx_mcbsp4_hwmod;
2326 static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = {
2327 { .irq = 16 + OMAP44XX_IRQ_GIC_START },
2328 + { .irq = -1 }
2329 };
2331 static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {
2332 @@ -3038,7 +3039,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
2333 .name = "mcbsp4",
2334 .class = &omap44xx_mcbsp_hwmod_class,
2335 .mpu_irqs = omap44xx_mcbsp4_irqs,
2336 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_irqs),
2337 .sdma_reqs = omap44xx_mcbsp4_sdma_reqs,
2338 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs),
2339 .main_clk = "mcbsp4_fck",
2340 @@ -3077,6 +3077,7 @@ static struct omap_hwmod_class omap44xx_mcpdm_hwmod_class = {
2341 static struct omap_hwmod omap44xx_mcpdm_hwmod;
2342 static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = {
2343 { .irq = 112 + OMAP44XX_IRQ_GIC_START },
2344 + { .irq = -1 }
2345 };
2347 static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = {
2348 @@ -3130,7 +3131,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
2349 .name = "mcpdm",
2350 .class = &omap44xx_mcpdm_hwmod_class,
2351 .mpu_irqs = omap44xx_mcpdm_irqs,
2352 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_irqs),
2353 .sdma_reqs = omap44xx_mcpdm_sdma_reqs,
2354 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs),
2355 .main_clk = "mcpdm_fck",
2356 @@ -3170,6 +3170,7 @@ static struct omap_hwmod_class omap44xx_mcspi_hwmod_class = {
2357 static struct omap_hwmod omap44xx_mcspi1_hwmod;
2358 static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = {
2359 { .irq = 65 + OMAP44XX_IRQ_GIC_START },
2360 + { .irq = -1 }
2361 };
2363 static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = {
2364 @@ -3215,7 +3216,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
2365 .name = "mcspi1",
2366 .class = &omap44xx_mcspi_hwmod_class,
2367 .mpu_irqs = omap44xx_mcspi1_irqs,
2368 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_irqs),
2369 .sdma_reqs = omap44xx_mcspi1_sdma_reqs,
2370 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs),
2371 .main_clk = "mcspi1_fck",
2372 @@ -3234,6 +3234,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
2373 static struct omap_hwmod omap44xx_mcspi2_hwmod;
2374 static struct omap_hwmod_irq_info omap44xx_mcspi2_irqs[] = {
2375 { .irq = 66 + OMAP44XX_IRQ_GIC_START },
2376 + { .irq = -1 }
2377 };
2379 static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = {
2380 @@ -3275,7 +3276,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
2381 .name = "mcspi2",
2382 .class = &omap44xx_mcspi_hwmod_class,
2383 .mpu_irqs = omap44xx_mcspi2_irqs,
2384 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_irqs),
2385 .sdma_reqs = omap44xx_mcspi2_sdma_reqs,
2386 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs),
2387 .main_clk = "mcspi2_fck",
2388 @@ -3294,6 +3294,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
2389 static struct omap_hwmod omap44xx_mcspi3_hwmod;
2390 static struct omap_hwmod_irq_info omap44xx_mcspi3_irqs[] = {
2391 { .irq = 91 + OMAP44XX_IRQ_GIC_START },
2392 + { .irq = -1 }
2393 };
2395 static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = {
2396 @@ -3335,7 +3336,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
2397 .name = "mcspi3",
2398 .class = &omap44xx_mcspi_hwmod_class,
2399 .mpu_irqs = omap44xx_mcspi3_irqs,
2400 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_irqs),
2401 .sdma_reqs = omap44xx_mcspi3_sdma_reqs,
2402 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs),
2403 .main_clk = "mcspi3_fck",
2404 @@ -3354,6 +3354,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
2405 static struct omap_hwmod omap44xx_mcspi4_hwmod;
2406 static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = {
2407 { .irq = 48 + OMAP44XX_IRQ_GIC_START },
2408 + { .irq = -1 }
2409 };
2411 static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = {
2412 @@ -3393,7 +3394,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = {
2413 .name = "mcspi4",
2414 .class = &omap44xx_mcspi_hwmod_class,
2415 .mpu_irqs = omap44xx_mcspi4_irqs,
2416 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_irqs),
2417 .sdma_reqs = omap44xx_mcspi4_sdma_reqs,
2418 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs),
2419 .main_clk = "mcspi4_fck",
2420 @@ -3434,6 +3434,7 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = {
2422 static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = {
2423 { .irq = 83 + OMAP44XX_IRQ_GIC_START },
2424 + { .irq = -1 }
2425 };
2427 static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = {
2428 @@ -3478,7 +3479,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
2429 .name = "mmc1",
2430 .class = &omap44xx_mmc_hwmod_class,
2431 .mpu_irqs = omap44xx_mmc1_irqs,
2432 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc1_irqs),
2433 .sdma_reqs = omap44xx_mmc1_sdma_reqs,
2434 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs),
2435 .main_clk = "mmc1_fck",
2436 @@ -3498,6 +3498,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
2437 /* mmc2 */
2438 static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = {
2439 { .irq = 86 + OMAP44XX_IRQ_GIC_START },
2440 + { .irq = -1 }
2441 };
2443 static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = {
2444 @@ -3537,7 +3538,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
2445 .name = "mmc2",
2446 .class = &omap44xx_mmc_hwmod_class,
2447 .mpu_irqs = omap44xx_mmc2_irqs,
2448 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc2_irqs),
2449 .sdma_reqs = omap44xx_mmc2_sdma_reqs,
2450 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs),
2451 .main_clk = "mmc2_fck",
2452 @@ -3557,6 +3557,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
2453 static struct omap_hwmod omap44xx_mmc3_hwmod;
2454 static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = {
2455 { .irq = 94 + OMAP44XX_IRQ_GIC_START },
2456 + { .irq = -1 }
2457 };
2459 static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = {
2460 @@ -3591,7 +3592,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
2461 .name = "mmc3",
2462 .class = &omap44xx_mmc_hwmod_class,
2463 .mpu_irqs = omap44xx_mmc3_irqs,
2464 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc3_irqs),
2465 .sdma_reqs = omap44xx_mmc3_sdma_reqs,
2466 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs),
2467 .main_clk = "mmc3_fck",
2468 @@ -3609,6 +3609,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
2469 static struct omap_hwmod omap44xx_mmc4_hwmod;
2470 static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = {
2471 { .irq = 96 + OMAP44XX_IRQ_GIC_START },
2472 + { .irq = -1 }
2473 };
2475 static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = {
2476 @@ -3643,7 +3644,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
2477 .name = "mmc4",
2478 .class = &omap44xx_mmc_hwmod_class,
2479 .mpu_irqs = omap44xx_mmc4_irqs,
2480 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc4_irqs),
2481 +
2482 .sdma_reqs = omap44xx_mmc4_sdma_reqs,
2483 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs),
2484 .main_clk = "mmc4_fck",
2485 @@ -3661,6 +3662,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
2486 static struct omap_hwmod omap44xx_mmc5_hwmod;
2487 static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = {
2488 { .irq = 59 + OMAP44XX_IRQ_GIC_START },
2489 + { .irq = -1 }
2490 };
2492 static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = {
2493 @@ -3695,7 +3697,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = {
2494 .name = "mmc5",
2495 .class = &omap44xx_mmc_hwmod_class,
2496 .mpu_irqs = omap44xx_mmc5_irqs,
2497 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc5_irqs),
2498 .sdma_reqs = omap44xx_mmc5_sdma_reqs,
2499 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs),
2500 .main_clk = "mmc5_fck",
2501 @@ -3723,6 +3724,7 @@ static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = {
2502 { .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START },
2503 { .name = "cti0", .irq = 1 + OMAP44XX_IRQ_GIC_START },
2504 { .name = "cti1", .irq = 2 + OMAP44XX_IRQ_GIC_START },
2505 + { .irq = -1 }
2506 };
2508 /* mpu master ports */
2509 @@ -3737,7 +3739,6 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
2510 .class = &omap44xx_mpu_hwmod_class,
2511 .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
2512 .mpu_irqs = omap44xx_mpu_irqs,
2513 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mpu_irqs),
2514 .main_clk = "dpll_mpu_m2_ck",
2515 .prcm = {
2516 .omap4 = {
2517 @@ -3779,6 +3780,7 @@ static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = {
2518 static struct omap_hwmod omap44xx_smartreflex_core_hwmod;
2519 static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = {
2520 { .irq = 19 + OMAP44XX_IRQ_GIC_START },
2521 + { .irq = -1 }
2522 };
2524 static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = {
2525 @@ -3808,7 +3810,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
2526 .name = "smartreflex_core",
2527 .class = &omap44xx_smartreflex_hwmod_class,
2528 .mpu_irqs = omap44xx_smartreflex_core_irqs,
2529 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_irqs),
2530 +
2531 .main_clk = "smartreflex_core_fck",
2532 .vdd_name = "core",
2533 .prcm = {
2534 @@ -3825,6 +3827,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
2535 static struct omap_hwmod omap44xx_smartreflex_iva_hwmod;
2536 static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = {
2537 { .irq = 102 + OMAP44XX_IRQ_GIC_START },
2538 + { .irq = -1 }
2539 };
2541 static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = {
2542 @@ -3854,7 +3857,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
2543 .name = "smartreflex_iva",
2544 .class = &omap44xx_smartreflex_hwmod_class,
2545 .mpu_irqs = omap44xx_smartreflex_iva_irqs,
2546 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_irqs),
2547 .main_clk = "smartreflex_iva_fck",
2548 .vdd_name = "iva",
2549 .prcm = {
2550 @@ -3871,6 +3873,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
2551 static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod;
2552 static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = {
2553 { .irq = 18 + OMAP44XX_IRQ_GIC_START },
2554 + { .irq = -1 }
2555 };
2557 static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = {
2558 @@ -3900,7 +3903,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
2559 .name = "smartreflex_mpu",
2560 .class = &omap44xx_smartreflex_hwmod_class,
2561 .mpu_irqs = omap44xx_smartreflex_mpu_irqs,
2562 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_irqs),
2563 .main_clk = "smartreflex_mpu_fck",
2564 .vdd_name = "mpu",
2565 .prcm = {
2566 @@ -4016,6 +4018,7 @@ static struct omap_hwmod_class omap44xx_timer_hwmod_class = {
2567 static struct omap_hwmod omap44xx_timer1_hwmod;
2568 static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = {
2569 { .irq = 37 + OMAP44XX_IRQ_GIC_START },
2570 + { .irq = -1 }
2571 };
2573 static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = {
2574 @@ -4045,7 +4048,6 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
2575 .name = "timer1",
2576 .class = &omap44xx_timer_1ms_hwmod_class,
2577 .mpu_irqs = omap44xx_timer1_irqs,
2578 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer1_irqs),
2579 .main_clk = "timer1_fck",
2580 .prcm = {
2581 .omap4 = {
2582 @@ -4061,6 +4063,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
2583 static struct omap_hwmod omap44xx_timer2_hwmod;
2584 static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = {
2585 { .irq = 38 + OMAP44XX_IRQ_GIC_START },
2586 + { .irq = -1 }
2587 };
2589 static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = {
2590 @@ -4090,7 +4093,6 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
2591 .name = "timer2",
2592 .class = &omap44xx_timer_1ms_hwmod_class,
2593 .mpu_irqs = omap44xx_timer2_irqs,
2594 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer2_irqs),
2595 .main_clk = "timer2_fck",
2596 .prcm = {
2597 .omap4 = {
2598 @@ -4106,6 +4108,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
2599 static struct omap_hwmod omap44xx_timer3_hwmod;
2600 static struct omap_hwmod_irq_info omap44xx_timer3_irqs[] = {
2601 { .irq = 39 + OMAP44XX_IRQ_GIC_START },
2602 + { .irq = -1 }
2603 };
2605 static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = {
2606 @@ -4135,7 +4138,6 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {
2607 .name = "timer3",
2608 .class = &omap44xx_timer_hwmod_class,
2609 .mpu_irqs = omap44xx_timer3_irqs,
2610 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer3_irqs),
2611 .main_clk = "timer3_fck",
2612 .prcm = {
2613 .omap4 = {
2614 @@ -4151,6 +4153,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {
2615 static struct omap_hwmod omap44xx_timer4_hwmod;
2616 static struct omap_hwmod_irq_info omap44xx_timer4_irqs[] = {
2617 { .irq = 40 + OMAP44XX_IRQ_GIC_START },
2618 + { .irq = -1 }
2619 };
2621 static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = {
2622 @@ -4180,7 +4183,6 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {
2623 .name = "timer4",
2624 .class = &omap44xx_timer_hwmod_class,
2625 .mpu_irqs = omap44xx_timer4_irqs,
2626 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer4_irqs),
2627 .main_clk = "timer4_fck",
2628 .prcm = {
2629 .omap4 = {
2630 @@ -4196,6 +4198,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {
2631 static struct omap_hwmod omap44xx_timer5_hwmod;
2632 static struct omap_hwmod_irq_info omap44xx_timer5_irqs[] = {
2633 { .irq = 41 + OMAP44XX_IRQ_GIC_START },
2634 + { .irq = -1 }
2635 };
2637 static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = {
2638 @@ -4244,7 +4247,6 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
2639 .name = "timer5",
2640 .class = &omap44xx_timer_hwmod_class,
2641 .mpu_irqs = omap44xx_timer5_irqs,
2642 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer5_irqs),
2643 .main_clk = "timer5_fck",
2644 .prcm = {
2645 .omap4 = {
2646 @@ -4260,6 +4262,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
2647 static struct omap_hwmod omap44xx_timer6_hwmod;
2648 static struct omap_hwmod_irq_info omap44xx_timer6_irqs[] = {
2649 { .irq = 42 + OMAP44XX_IRQ_GIC_START },
2650 + { .irq = -1 }
2651 };
2653 static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = {
2654 @@ -4308,7 +4311,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
2655 .name = "timer6",
2656 .class = &omap44xx_timer_hwmod_class,
2657 .mpu_irqs = omap44xx_timer6_irqs,
2658 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer6_irqs),
2659 +
2660 .main_clk = "timer6_fck",
2661 .prcm = {
2662 .omap4 = {
2663 @@ -4324,6 +4327,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
2664 static struct omap_hwmod omap44xx_timer7_hwmod;
2665 static struct omap_hwmod_irq_info omap44xx_timer7_irqs[] = {
2666 { .irq = 43 + OMAP44XX_IRQ_GIC_START },
2667 + { .irq = -1 }
2668 };
2670 static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = {
2671 @@ -4372,7 +4376,6 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
2672 .name = "timer7",
2673 .class = &omap44xx_timer_hwmod_class,
2674 .mpu_irqs = omap44xx_timer7_irqs,
2675 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer7_irqs),
2676 .main_clk = "timer7_fck",
2677 .prcm = {
2678 .omap4 = {
2679 @@ -4388,6 +4391,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
2680 static struct omap_hwmod omap44xx_timer8_hwmod;
2681 static struct omap_hwmod_irq_info omap44xx_timer8_irqs[] = {
2682 { .irq = 44 + OMAP44XX_IRQ_GIC_START },
2683 + { .irq = -1 }
2684 };
2686 static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = {
2687 @@ -4436,7 +4440,6 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
2688 .name = "timer8",
2689 .class = &omap44xx_timer_hwmod_class,
2690 .mpu_irqs = omap44xx_timer8_irqs,
2691 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer8_irqs),
2692 .main_clk = "timer8_fck",
2693 .prcm = {
2694 .omap4 = {
2695 @@ -4452,6 +4455,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
2696 static struct omap_hwmod omap44xx_timer9_hwmod;
2697 static struct omap_hwmod_irq_info omap44xx_timer9_irqs[] = {
2698 { .irq = 45 + OMAP44XX_IRQ_GIC_START },
2699 + { .irq = -1 }
2700 };
2702 static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = {
2703 @@ -4481,7 +4485,6 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {
2704 .name = "timer9",
2705 .class = &omap44xx_timer_hwmod_class,
2706 .mpu_irqs = omap44xx_timer9_irqs,
2707 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer9_irqs),
2708 .main_clk = "timer9_fck",
2709 .prcm = {
2710 .omap4 = {
2711 @@ -4497,6 +4500,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {
2712 static struct omap_hwmod omap44xx_timer10_hwmod;
2713 static struct omap_hwmod_irq_info omap44xx_timer10_irqs[] = {
2714 { .irq = 46 + OMAP44XX_IRQ_GIC_START },
2715 + { .irq = -1 }
2716 };
2718 static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = {
2719 @@ -4526,7 +4530,6 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
2720 .name = "timer10",
2721 .class = &omap44xx_timer_1ms_hwmod_class,
2722 .mpu_irqs = omap44xx_timer10_irqs,
2723 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer10_irqs),
2724 .main_clk = "timer10_fck",
2725 .prcm = {
2726 .omap4 = {
2727 @@ -4542,6 +4545,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
2728 static struct omap_hwmod omap44xx_timer11_hwmod;
2729 static struct omap_hwmod_irq_info omap44xx_timer11_irqs[] = {
2730 { .irq = 47 + OMAP44XX_IRQ_GIC_START },
2731 + { .irq = -1 }
2732 };
2734 static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = {
2735 @@ -4571,7 +4575,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = {
2736 .name = "timer11",
2737 .class = &omap44xx_timer_hwmod_class,
2738 .mpu_irqs = omap44xx_timer11_irqs,
2739 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer11_irqs),
2740 .main_clk = "timer11_fck",
2741 .prcm = {
2742 .omap4 = {
2743 @@ -4609,6 +4612,7 @@ static struct omap_hwmod_class omap44xx_uart_hwmod_class = {
2744 static struct omap_hwmod omap44xx_uart1_hwmod;
2745 static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = {
2746 { .irq = 72 + OMAP44XX_IRQ_GIC_START },
2747 + { .irq = -1 }
2748 };
2750 static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = {
2751 @@ -4643,7 +4647,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
2752 .name = "uart1",
2753 .class = &omap44xx_uart_hwmod_class,
2754 .mpu_irqs = omap44xx_uart1_irqs,
2755 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart1_irqs),
2756 .sdma_reqs = omap44xx_uart1_sdma_reqs,
2757 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs),
2758 .main_clk = "uart1_fck",
2759 @@ -4661,6 +4664,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
2760 static struct omap_hwmod omap44xx_uart2_hwmod;
2761 static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = {
2762 { .irq = 73 + OMAP44XX_IRQ_GIC_START },
2763 + { .irq = -1 }
2764 };
2766 static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = {
2767 @@ -4695,7 +4699,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
2768 .name = "uart2",
2769 .class = &omap44xx_uart_hwmod_class,
2770 .mpu_irqs = omap44xx_uart2_irqs,
2771 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart2_irqs),
2772 .sdma_reqs = omap44xx_uart2_sdma_reqs,
2773 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs),
2774 .main_clk = "uart2_fck",
2775 @@ -4713,6 +4716,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
2776 static struct omap_hwmod omap44xx_uart3_hwmod;
2777 static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = {
2778 { .irq = 74 + OMAP44XX_IRQ_GIC_START },
2779 + { .irq = -1 }
2780 };
2782 static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = {
2783 @@ -4748,7 +4752,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
2784 .class = &omap44xx_uart_hwmod_class,
2785 .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
2786 .mpu_irqs = omap44xx_uart3_irqs,
2787 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart3_irqs),
2788 .sdma_reqs = omap44xx_uart3_sdma_reqs,
2789 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs),
2790 .main_clk = "uart3_fck",
2791 @@ -4766,6 +4769,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
2792 static struct omap_hwmod omap44xx_uart4_hwmod;
2793 static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = {
2794 { .irq = 70 + OMAP44XX_IRQ_GIC_START },
2795 + { .irq = -1 }
2796 };
2798 static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = {
2799 @@ -4800,7 +4804,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
2800 .name = "uart4",
2801 .class = &omap44xx_uart_hwmod_class,
2802 .mpu_irqs = omap44xx_uart4_irqs,
2803 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart4_irqs),
2804 .sdma_reqs = omap44xx_uart4_sdma_reqs,
2805 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs),
2806 .main_clk = "uart4_fck",
2807 @@ -4841,6 +4844,7 @@ static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = {
2808 static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = {
2809 { .name = "mc", .irq = 92 + OMAP44XX_IRQ_GIC_START },
2810 { .name = "dma", .irq = 93 + OMAP44XX_IRQ_GIC_START },
2811 + { .irq = -1 }
2812 };
2814 /* usb_otg_hs master ports */
2815 @@ -4880,7 +4884,6 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {
2816 .class = &omap44xx_usb_otg_hs_hwmod_class,
2817 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
2818 .mpu_irqs = omap44xx_usb_otg_hs_irqs,
2819 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_irqs),
2820 .main_clk = "usb_otg_hs_ick",
2821 .prcm = {
2822 .omap4 = {
2823 @@ -4923,6 +4926,7 @@ static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = {
2824 static struct omap_hwmod omap44xx_wd_timer2_hwmod;
2825 static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = {
2826 { .irq = 80 + OMAP44XX_IRQ_GIC_START },
2827 + { .irq = -1 }
2828 };
2830 static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = {
2831 @@ -4952,7 +4956,6 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
2832 .name = "wd_timer2",
2833 .class = &omap44xx_wd_timer_hwmod_class,
2834 .mpu_irqs = omap44xx_wd_timer2_irqs,
2835 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer2_irqs),
2836 .main_clk = "wd_timer2_fck",
2837 .prcm = {
2838 .omap4 = {
2839 @@ -4968,6 +4971,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
2840 static struct omap_hwmod omap44xx_wd_timer3_hwmod;
2841 static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = {
2842 { .irq = 36 + OMAP44XX_IRQ_GIC_START },
2843 + { .irq = -1 }
2844 };
2846 static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = {
2847 @@ -5016,7 +5020,6 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
2848 .name = "wd_timer3",
2849 .class = &omap44xx_wd_timer_hwmod_class,
2850 .mpu_irqs = omap44xx_wd_timer3_irqs,
2851 - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer3_irqs),
2852 .main_clk = "wd_timer3_fck",
2853 .prcm = {
2854 .omap4 = {
2855 diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
2856 index f3a3bff..b8385e2 100644
2857 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
2858 +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
2859 @@ -97,7 +97,7 @@ struct omap_hwmod_mux_info {
2860 /**
2861 * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
2862 * @name: name of the IRQ channel (module local name)
2863 - * @irq_ch: IRQ channel ID
2864 + * @irq: IRQ channel ID (should be non-negative except -1 = terminator)
2865 *
2866 * @name should be something short, e.g., "tx" or "rx". It is for use
2867 * by platform_get_resource_byname(). It is defined locally to the
2868 @@ -105,7 +105,7 @@ struct omap_hwmod_mux_info {
2869 */
2870 struct omap_hwmod_irq_info {
2871 const char *name;
2872 - u16 irq;
2873 + s16 irq;
2874 };
2876 /**
2877 @@ -466,7 +466,7 @@ struct omap_hwmod_class {
2878 * @name: name of the hwmod
2879 * @class: struct omap_hwmod_class * to the class of this hwmod
2880 * @od: struct omap_device currently associated with this hwmod (internal use)
2881 - * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
2882 + * @mpu_irqs: ptr to an array of MPU IRQs
2883 * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt)
2884 * @prcm: PRCM data pertaining to this hwmod
2885 * @main_clk: main clock: OMAP clock name
2886 @@ -480,7 +480,6 @@ struct omap_hwmod_class {
2887 * @_sysc_cache: internal-use hwmod flags
2888 * @_mpu_rt_va: cached register target start address (internal use)
2889 * @_mpu_port_index: cached MPU register target slave ID (internal use)
2890 - * @mpu_irqs_cnt: number of @mpu_irqs
2891 * @sdma_reqs_cnt: number of @sdma_reqs
2892 * @opt_clks_cnt: number of @opt_clks
2893 * @master_cnt: number of @master entries
2894 @@ -529,7 +528,6 @@ struct omap_hwmod {
2895 u16 flags;
2896 u8 _mpu_port_index;
2897 u8 response_lat;
2898 - u8 mpu_irqs_cnt;
2899 u8 sdma_reqs_cnt;
2900 u8 rst_lines_cnt;
2901 u8 opt_clks_cnt;
2902 --
2903 1.6.6.1