[glsdk/meta-ti-glsdk.git] / recipes-kernel / linux / linux-3.0 / pm-wip / voltdm / 0043-omap_hwmod-share-identical-omap_hwmod_class-omap_hwm.patch
1 From 7fb59da1fff606542858e006b001e1cb63e1d708 Mon Sep 17 00:00:00 2001
2 From: Paul Walmsley <paul@pwsan.com>
3 Date: Sat, 9 Jul 2011 19:14:08 -0600
4 Subject: [PATCH 043/149] omap_hwmod: share identical omap_hwmod_class, omap_hwmod_class_sysconfig arrays
6 To reduce kernel source file data duplication, share struct
7 omap_hwmod_class and omap_hwmod_class_sysconfig arrays across OMAP2xxx
8 and 3xxx hwmod data files.
10 Signed-off-by: Paul Walmsley <paul@pwsan.com>
11 ---
12 arch/arm/mach-omap2/omap_hwmod_2420_data.c | 267 +++-----------------
13 arch/arm/mach-omap2/omap_hwmod_2430_data.c | 273 +++-----------------
14 .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 228 +++++++++++-----
15 arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 123 +++++++++
16 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 105 +-------
17 arch/arm/mach-omap2/omap_hwmod_common_data.h | 11 +
18 6 files changed, 364 insertions(+), 643 deletions(-)
20 diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
21 index 6acc01f..f3901ab 100644
22 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
23 +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
24 @@ -274,24 +274,6 @@ static struct omap_hwmod omap2420_iva_hwmod = {
25 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
26 };
28 -/* Timer Common */
29 -static struct omap_hwmod_class_sysconfig omap2420_timer_sysc = {
30 - .rev_offs = 0x0000,
31 - .sysc_offs = 0x0010,
32 - .syss_offs = 0x0014,
33 - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
34 - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
35 - SYSC_HAS_AUTOIDLE),
36 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
37 - .sysc_fields = &omap_hwmod_sysc_type1,
38 -};
39 -
40 -static struct omap_hwmod_class omap2420_timer_hwmod_class = {
41 - .name = "timer",
42 - .sysc = &omap2420_timer_sysc,
43 - .rev = OMAP_TIMER_IP_VERSION_1,
44 -};
45 -
46 /* timer1 */
47 static struct omap_hwmod omap2420_timer1_hwmod;
49 @@ -334,7 +316,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = {
50 },
51 .slaves = omap2420_timer1_slaves,
52 .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves),
53 - .class = &omap2420_timer_hwmod_class,
54 + .class = &omap2xxx_timer_hwmod_class,
55 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
56 };
58 @@ -371,7 +353,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = {
59 },
60 .slaves = omap2420_timer2_slaves,
61 .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves),
62 - .class = &omap2420_timer_hwmod_class,
63 + .class = &omap2xxx_timer_hwmod_class,
64 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
65 };
67 @@ -408,7 +390,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = {
68 },
69 .slaves = omap2420_timer3_slaves,
70 .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves),
71 - .class = &omap2420_timer_hwmod_class,
72 + .class = &omap2xxx_timer_hwmod_class,
73 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
74 };
76 @@ -445,7 +427,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = {
77 },
78 .slaves = omap2420_timer4_slaves,
79 .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves),
80 - .class = &omap2420_timer_hwmod_class,
81 + .class = &omap2xxx_timer_hwmod_class,
82 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
83 };
85 @@ -482,7 +464,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = {
86 },
87 .slaves = omap2420_timer5_slaves,
88 .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves),
89 - .class = &omap2420_timer_hwmod_class,
90 + .class = &omap2xxx_timer_hwmod_class,
91 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
92 };
94 @@ -520,7 +502,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = {
95 },
96 .slaves = omap2420_timer6_slaves,
97 .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves),
98 - .class = &omap2420_timer_hwmod_class,
99 + .class = &omap2xxx_timer_hwmod_class,
100 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
101 };
103 @@ -557,7 +539,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = {
104 },
105 .slaves = omap2420_timer7_slaves,
106 .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves),
107 - .class = &omap2420_timer_hwmod_class,
108 + .class = &omap2xxx_timer_hwmod_class,
109 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
110 };
112 @@ -594,7 +576,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = {
113 },
114 .slaves = omap2420_timer8_slaves,
115 .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves),
116 - .class = &omap2420_timer_hwmod_class,
117 + .class = &omap2xxx_timer_hwmod_class,
118 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
119 };
121 @@ -631,7 +613,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = {
122 },
123 .slaves = omap2420_timer9_slaves,
124 .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves),
125 - .class = &omap2420_timer_hwmod_class,
126 + .class = &omap2xxx_timer_hwmod_class,
127 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
128 };
130 @@ -668,7 +650,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = {
131 },
132 .slaves = omap2420_timer10_slaves,
133 .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves),
134 - .class = &omap2420_timer_hwmod_class,
135 + .class = &omap2xxx_timer_hwmod_class,
136 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
137 };
139 @@ -705,7 +687,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = {
140 },
141 .slaves = omap2420_timer11_slaves,
142 .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves),
143 - .class = &omap2420_timer_hwmod_class,
144 + .class = &omap2xxx_timer_hwmod_class,
145 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
146 };
148 @@ -742,7 +724,7 @@ static struct omap_hwmod omap2420_timer12_hwmod = {
149 },
150 .slaves = omap2420_timer12_slaves,
151 .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves),
152 - .class = &omap2420_timer_hwmod_class,
153 + .class = &omap2xxx_timer_hwmod_class,
154 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
155 };
157 @@ -764,27 +746,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = {
158 .user = OCP_USER_MPU | OCP_USER_SDMA,
159 };
161 -/*
162 - * 'wd_timer' class
163 - * 32-bit watchdog upward counter that generates a pulse on the reset pin on
164 - * overflow condition
165 - */
166 -
167 -static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = {
168 - .rev_offs = 0x0000,
169 - .sysc_offs = 0x0010,
170 - .syss_offs = 0x0014,
171 - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
172 - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
173 - .sysc_fields = &omap_hwmod_sysc_type1,
174 -};
175 -
176 -static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = {
177 - .name = "wd_timer",
178 - .sysc = &omap2420_wd_timer_sysc,
179 - .pre_shutdown = &omap2_wd_timer_disable
180 -};
181 -
182 /* wd_timer2 */
183 static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = {
184 &omap2420_l4_wkup__wd_timer2,
185 @@ -792,7 +753,7 @@ static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = {
187 static struct omap_hwmod omap2420_wd_timer2_hwmod = {
188 .name = "wd_timer2",
189 - .class = &omap2420_wd_timer_hwmod_class,
190 + .class = &omap2xxx_wd_timer_hwmod_class,
191 .main_clk = "mpu_wdt_fck",
192 .prcm = {
193 .omap2 = {
194 @@ -808,24 +769,6 @@ static struct omap_hwmod omap2420_wd_timer2_hwmod = {
195 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
196 };
198 -/* UART */
199 -
200 -static struct omap_hwmod_class_sysconfig uart_sysc = {
201 - .rev_offs = 0x50,
202 - .sysc_offs = 0x54,
203 - .syss_offs = 0x58,
204 - .sysc_flags = (SYSC_HAS_SIDLEMODE |
205 - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
206 - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
207 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
208 - .sysc_fields = &omap_hwmod_sysc_type1,
209 -};
210 -
211 -static struct omap_hwmod_class uart_class = {
212 - .name = "uart",
213 - .sysc = &uart_sysc,
214 -};
215 -
216 /* UART1 */
218 static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {
219 @@ -848,7 +791,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = {
220 },
221 .slaves = omap2420_uart1_slaves,
222 .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves),
223 - .class = &uart_class,
224 + .class = &omap2_uart_class,
225 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
226 };
228 @@ -874,7 +817,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = {
229 },
230 .slaves = omap2420_uart2_slaves,
231 .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves),
232 - .class = &uart_class,
233 + .class = &omap2_uart_class,
234 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
235 };
237 @@ -900,28 +843,10 @@ static struct omap_hwmod omap2420_uart3_hwmod = {
238 },
239 .slaves = omap2420_uart3_slaves,
240 .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves),
241 - .class = &uart_class,
242 + .class = &omap2_uart_class,
243 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
244 };
246 -/*
247 - * 'dss' class
248 - * display sub-system
249 - */
250 -
251 -static struct omap_hwmod_class_sysconfig omap2420_dss_sysc = {
252 - .rev_offs = 0x0000,
253 - .sysc_offs = 0x0010,
254 - .syss_offs = 0x0014,
255 - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
256 - .sysc_fields = &omap_hwmod_sysc_type1,
257 -};
258 -
259 -static struct omap_hwmod_class omap2420_dss_hwmod_class = {
260 - .name = "dss",
261 - .sysc = &omap2420_dss_sysc,
262 -};
263 -
264 /* dss */
265 /* dss master ports */
266 static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = {
267 @@ -955,7 +880,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
269 static struct omap_hwmod omap2420_dss_core_hwmod = {
270 .name = "dss_core",
271 - .class = &omap2420_dss_hwmod_class,
272 + .class = &omap2_dss_hwmod_class,
273 .main_clk = "dss1_fck", /* instead of dss_fck */
274 .sdma_reqs = omap2xxx_dss_sdma_chs,
275 .prcm = {
276 @@ -977,27 +902,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
277 .flags = HWMOD_NO_IDLEST,
278 };
280 -/*
281 - * 'dispc' class
282 - * display controller
283 - */
284 -
285 -static struct omap_hwmod_class_sysconfig omap2420_dispc_sysc = {
286 - .rev_offs = 0x0000,
287 - .sysc_offs = 0x0010,
288 - .syss_offs = 0x0014,
289 - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
290 - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
291 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
292 - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
293 - .sysc_fields = &omap_hwmod_sysc_type1,
294 -};
295 -
296 -static struct omap_hwmod_class omap2420_dispc_hwmod_class = {
297 - .name = "dispc",
298 - .sysc = &omap2420_dispc_sysc,
299 -};
300 -
301 /* l4_core -> dss_dispc */
302 static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = {
303 .master = &omap2420_l4_core_hwmod,
304 @@ -1020,7 +924,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = {
306 static struct omap_hwmod omap2420_dss_dispc_hwmod = {
307 .name = "dss_dispc",
308 - .class = &omap2420_dispc_hwmod_class,
309 + .class = &omap2_dispc_hwmod_class,
310 .mpu_irqs = omap2_dispc_irqs,
311 .main_clk = "dss1_fck",
312 .prcm = {
313 @@ -1038,26 +942,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = {
314 .flags = HWMOD_NO_IDLEST,
315 };
317 -/*
318 - * 'rfbi' class
319 - * remote frame buffer interface
320 - */
321 -
322 -static struct omap_hwmod_class_sysconfig omap2420_rfbi_sysc = {
323 - .rev_offs = 0x0000,
324 - .sysc_offs = 0x0010,
325 - .syss_offs = 0x0014,
326 - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
327 - SYSC_HAS_AUTOIDLE),
328 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
329 - .sysc_fields = &omap_hwmod_sysc_type1,
330 -};
331 -
332 -static struct omap_hwmod_class omap2420_rfbi_hwmod_class = {
333 - .name = "rfbi",
334 - .sysc = &omap2420_rfbi_sysc,
335 -};
336 -
337 /* l4_core -> dss_rfbi */
338 static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = {
339 .master = &omap2420_l4_core_hwmod,
340 @@ -1080,7 +964,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = {
342 static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
343 .name = "dss_rfbi",
344 - .class = &omap2420_rfbi_hwmod_class,
345 + .class = &omap2_rfbi_hwmod_class,
346 .main_clk = "dss1_fck",
347 .prcm = {
348 .omap2 = {
349 @@ -1095,15 +979,6 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
350 .flags = HWMOD_NO_IDLEST,
351 };
353 -/*
354 - * 'venc' class
355 - * video encoder
356 - */
357 -
358 -static struct omap_hwmod_class omap2420_venc_hwmod_class = {
359 - .name = "venc",
360 -};
361 -
362 /* l4_core -> dss_venc */
363 static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
364 .master = &omap2420_l4_core_hwmod,
365 @@ -1127,7 +1002,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = {
367 static struct omap_hwmod omap2420_dss_venc_hwmod = {
368 .name = "dss_venc",
369 - .class = &omap2420_venc_hwmod_class,
370 + .class = &omap2_venc_hwmod_class,
371 .main_clk = "dss1_fck",
372 .prcm = {
373 .omap2 = {
374 @@ -1292,27 +1167,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
375 .dbck_flag = false,
376 };
378 -static struct omap_hwmod_class_sysconfig omap242x_gpio_sysc = {
379 - .rev_offs = 0x0000,
380 - .sysc_offs = 0x0010,
381 - .syss_offs = 0x0014,
382 - .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
383 - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
384 - SYSS_HAS_RESET_STATUS),
385 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
386 - .sysc_fields = &omap_hwmod_sysc_type1,
387 -};
388 -
389 -/*
390 - * 'gpio' class
391 - * general purpose io module
392 - */
393 -static struct omap_hwmod_class omap242x_gpio_hwmod_class = {
394 - .name = "gpio",
395 - .sysc = &omap242x_gpio_sysc,
396 - .rev = 0,
397 -};
398 -
399 /* gpio1 */
400 static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {
401 &omap2420_l4_wkup__gpio1,
402 @@ -1334,7 +1188,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod = {
403 },
404 .slaves = omap2420_gpio1_slaves,
405 .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves),
406 - .class = &omap242x_gpio_hwmod_class,
407 + .class = &omap2xxx_gpio_hwmod_class,
408 .dev_attr = &gpio_dev_attr,
409 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
410 };
411 @@ -1360,7 +1214,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod = {
412 },
413 .slaves = omap2420_gpio2_slaves,
414 .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves),
415 - .class = &omap242x_gpio_hwmod_class,
416 + .class = &omap2xxx_gpio_hwmod_class,
417 .dev_attr = &gpio_dev_attr,
418 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
419 };
420 @@ -1386,7 +1240,7 @@ static struct omap_hwmod omap2420_gpio3_hwmod = {
421 },
422 .slaves = omap2420_gpio3_slaves,
423 .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves),
424 - .class = &omap242x_gpio_hwmod_class,
425 + .class = &omap2xxx_gpio_hwmod_class,
426 .dev_attr = &gpio_dev_attr,
427 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
428 };
429 @@ -1412,28 +1266,11 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
430 },
431 .slaves = omap2420_gpio4_slaves,
432 .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves),
433 - .class = &omap242x_gpio_hwmod_class,
434 + .class = &omap2xxx_gpio_hwmod_class,
435 .dev_attr = &gpio_dev_attr,
436 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
437 };
439 -/* system dma */
440 -static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = {
441 - .rev_offs = 0x0000,
442 - .sysc_offs = 0x002c,
443 - .syss_offs = 0x0028,
444 - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
445 - SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
446 - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
447 - .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
448 - .sysc_fields = &omap_hwmod_sysc_type1,
449 -};
450 -
451 -static struct omap_hwmod_class omap2420_dma_hwmod_class = {
452 - .name = "dma",
453 - .sysc = &omap2420_dma_sysc,
454 -};
455 -
456 /* dma attributes */
457 static struct omap_dma_dev_attr dma_dev_attr = {
458 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
459 @@ -1470,7 +1307,7 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
461 static struct omap_hwmod omap2420_dma_system_hwmod = {
462 .name = "dma",
463 - .class = &omap2420_dma_hwmod_class,
464 + .class = &omap2xxx_dma_hwmod_class,
465 .mpu_irqs = omap2_dma_system_irqs,
466 .main_clk = "core_l3_ck",
467 .slaves = omap2420_dma_system_slaves,
468 @@ -1482,27 +1319,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = {
469 .flags = HWMOD_NO_IDLEST,
470 };
472 -/*
473 - * 'mailbox' class
474 - * mailbox module allowing communication between the on-chip processors
475 - * using a queued mailbox-interrupt mechanism.
476 - */
477 -
478 -static struct omap_hwmod_class_sysconfig omap2420_mailbox_sysc = {
479 - .rev_offs = 0x000,
480 - .sysc_offs = 0x010,
481 - .syss_offs = 0x014,
482 - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
483 - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
484 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
485 - .sysc_fields = &omap_hwmod_sysc_type1,
486 -};
487 -
488 -static struct omap_hwmod_class omap2420_mailbox_hwmod_class = {
489 - .name = "mailbox",
490 - .sysc = &omap2420_mailbox_sysc,
491 -};
492 -
493 /* mailbox */
494 static struct omap_hwmod omap2420_mailbox_hwmod;
495 static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {
496 @@ -1526,7 +1342,7 @@ static struct omap_hwmod_ocp_if *omap2420_mailbox_slaves[] = {
498 static struct omap_hwmod omap2420_mailbox_hwmod = {
499 .name = "mailbox",
500 - .class = &omap2420_mailbox_hwmod_class,
501 + .class = &omap2xxx_mailbox_hwmod_class,
502 .mpu_irqs = omap2420_mailbox_irqs,
503 .main_clk = "mailboxes_ick",
504 .prcm = {
505 @@ -1543,29 +1359,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = {
506 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
507 };
509 -/*
510 - * 'mcspi' class
511 - * multichannel serial port interface (mcspi) / master/slave synchronous serial
512 - * bus
513 - */
514 -
515 -static struct omap_hwmod_class_sysconfig omap2420_mcspi_sysc = {
516 - .rev_offs = 0x0000,
517 - .sysc_offs = 0x0010,
518 - .syss_offs = 0x0014,
519 - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
520 - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
521 - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
522 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
523 - .sysc_fields = &omap_hwmod_sysc_type1,
524 -};
525 -
526 -static struct omap_hwmod_class omap2420_mcspi_class = {
527 - .name = "mcspi",
528 - .sysc = &omap2420_mcspi_sysc,
529 - .rev = OMAP2_MCSPI_REV,
530 -};
531 -
532 /* mcspi1 */
533 static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = {
534 &omap2420_l4_core__mcspi1,
535 @@ -1591,8 +1384,8 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = {
536 },
537 .slaves = omap2420_mcspi1_slaves,
538 .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves),
539 - .class = &omap2420_mcspi_class,
540 - .dev_attr = &omap_mcspi1_dev_attr,
541 + .class = &omap2xxx_mcspi_class,
542 + .dev_attr = &omap_mcspi1_dev_attr,
543 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
544 };
546 @@ -1621,8 +1414,8 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = {
547 },
548 .slaves = omap2420_mcspi2_slaves,
549 .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves),
550 - .class = &omap2420_mcspi_class,
551 - .dev_attr = &omap_mcspi2_dev_attr,
552 + .class = &omap2xxx_mcspi_class,
553 + .dev_attr = &omap_mcspi2_dev_attr,
554 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
555 };
557 diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
558 index 639acd5..2a52f02 100644
559 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
560 +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
561 @@ -347,24 +347,6 @@ static struct omap_hwmod omap2430_iva_hwmod = {
562 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
563 };
565 -/* Timer Common */
566 -static struct omap_hwmod_class_sysconfig omap2430_timer_sysc = {
567 - .rev_offs = 0x0000,
568 - .sysc_offs = 0x0010,
569 - .syss_offs = 0x0014,
570 - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
571 - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
572 - SYSC_HAS_AUTOIDLE),
573 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
574 - .sysc_fields = &omap_hwmod_sysc_type1,
575 -};
576 -
577 -static struct omap_hwmod_class omap2430_timer_hwmod_class = {
578 - .name = "timer",
579 - .sysc = &omap2430_timer_sysc,
580 - .rev = OMAP_TIMER_IP_VERSION_1,
581 -};
582 -
583 /* timer1 */
584 static struct omap_hwmod omap2430_timer1_hwmod;
586 @@ -407,7 +389,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = {
587 },
588 .slaves = omap2430_timer1_slaves,
589 .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves),
590 - .class = &omap2430_timer_hwmod_class,
591 + .class = &omap2xxx_timer_hwmod_class,
592 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
593 };
595 @@ -444,7 +426,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = {
596 },
597 .slaves = omap2430_timer2_slaves,
598 .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves),
599 - .class = &omap2430_timer_hwmod_class,
600 + .class = &omap2xxx_timer_hwmod_class,
601 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
602 };
604 @@ -481,7 +463,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = {
605 },
606 .slaves = omap2430_timer3_slaves,
607 .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves),
608 - .class = &omap2430_timer_hwmod_class,
609 + .class = &omap2xxx_timer_hwmod_class,
610 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
611 };
613 @@ -518,7 +500,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = {
614 },
615 .slaves = omap2430_timer4_slaves,
616 .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves),
617 - .class = &omap2430_timer_hwmod_class,
618 + .class = &omap2xxx_timer_hwmod_class,
619 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
620 };
622 @@ -555,7 +537,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = {
623 },
624 .slaves = omap2430_timer5_slaves,
625 .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves),
626 - .class = &omap2430_timer_hwmod_class,
627 + .class = &omap2xxx_timer_hwmod_class,
628 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
629 };
631 @@ -592,7 +574,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = {
632 },
633 .slaves = omap2430_timer6_slaves,
634 .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves),
635 - .class = &omap2430_timer_hwmod_class,
636 + .class = &omap2xxx_timer_hwmod_class,
637 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
638 };
640 @@ -629,7 +611,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = {
641 },
642 .slaves = omap2430_timer7_slaves,
643 .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves),
644 - .class = &omap2430_timer_hwmod_class,
645 + .class = &omap2xxx_timer_hwmod_class,
646 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
647 };
649 @@ -666,7 +648,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = {
650 },
651 .slaves = omap2430_timer8_slaves,
652 .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves),
653 - .class = &omap2430_timer_hwmod_class,
654 + .class = &omap2xxx_timer_hwmod_class,
655 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
656 };
658 @@ -703,7 +685,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = {
659 },
660 .slaves = omap2430_timer9_slaves,
661 .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves),
662 - .class = &omap2430_timer_hwmod_class,
663 + .class = &omap2xxx_timer_hwmod_class,
664 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
665 };
667 @@ -740,7 +722,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = {
668 },
669 .slaves = omap2430_timer10_slaves,
670 .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves),
671 - .class = &omap2430_timer_hwmod_class,
672 + .class = &omap2xxx_timer_hwmod_class,
673 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
674 };
676 @@ -777,7 +759,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = {
677 },
678 .slaves = omap2430_timer11_slaves,
679 .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves),
680 - .class = &omap2430_timer_hwmod_class,
681 + .class = &omap2xxx_timer_hwmod_class,
682 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
683 };
685 @@ -814,7 +796,7 @@ static struct omap_hwmod omap2430_timer12_hwmod = {
686 },
687 .slaves = omap2430_timer12_slaves,
688 .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves),
689 - .class = &omap2430_timer_hwmod_class,
690 + .class = &omap2xxx_timer_hwmod_class,
691 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
692 };
694 @@ -836,27 +818,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {
695 .user = OCP_USER_MPU | OCP_USER_SDMA,
696 };
698 -/*
699 - * 'wd_timer' class
700 - * 32-bit watchdog upward counter that generates a pulse on the reset pin on
701 - * overflow condition
702 - */
703 -
704 -static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = {
705 - .rev_offs = 0x0,
706 - .sysc_offs = 0x0010,
707 - .syss_offs = 0x0014,
708 - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
709 - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
710 - .sysc_fields = &omap_hwmod_sysc_type1,
711 -};
712 -
713 -static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = {
714 - .name = "wd_timer",
715 - .sysc = &omap2430_wd_timer_sysc,
716 - .pre_shutdown = &omap2_wd_timer_disable
717 -};
718 -
719 /* wd_timer2 */
720 static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = {
721 &omap2430_l4_wkup__wd_timer2,
722 @@ -864,7 +825,7 @@ static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = {
724 static struct omap_hwmod omap2430_wd_timer2_hwmod = {
725 .name = "wd_timer2",
726 - .class = &omap2430_wd_timer_hwmod_class,
727 + .class = &omap2xxx_wd_timer_hwmod_class,
728 .main_clk = "mpu_wdt_fck",
729 .prcm = {
730 .omap2 = {
731 @@ -880,24 +841,6 @@ static struct omap_hwmod omap2430_wd_timer2_hwmod = {
732 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
733 };
735 -/* UART */
736 -
737 -static struct omap_hwmod_class_sysconfig uart_sysc = {
738 - .rev_offs = 0x50,
739 - .sysc_offs = 0x54,
740 - .syss_offs = 0x58,
741 - .sysc_flags = (SYSC_HAS_SIDLEMODE |
742 - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
743 - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
744 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
745 - .sysc_fields = &omap_hwmod_sysc_type1,
746 -};
747 -
748 -static struct omap_hwmod_class uart_class = {
749 - .name = "uart",
750 - .sysc = &uart_sysc,
751 -};
752 -
753 /* UART1 */
755 static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
756 @@ -920,7 +863,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = {
757 },
758 .slaves = omap2430_uart1_slaves,
759 .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves),
760 - .class = &uart_class,
761 + .class = &omap2_uart_class,
762 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
763 };
765 @@ -946,7 +889,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = {
766 },
767 .slaves = omap2430_uart2_slaves,
768 .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves),
769 - .class = &uart_class,
770 + .class = &omap2_uart_class,
771 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
772 };
774 @@ -972,28 +915,10 @@ static struct omap_hwmod omap2430_uart3_hwmod = {
775 },
776 .slaves = omap2430_uart3_slaves,
777 .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves),
778 - .class = &uart_class,
779 + .class = &omap2_uart_class,
780 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
781 };
783 -/*
784 - * 'dss' class
785 - * display sub-system
786 - */
787 -
788 -static struct omap_hwmod_class_sysconfig omap2430_dss_sysc = {
789 - .rev_offs = 0x0000,
790 - .sysc_offs = 0x0010,
791 - .syss_offs = 0x0014,
792 - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
793 - .sysc_fields = &omap_hwmod_sysc_type1,
794 -};
795 -
796 -static struct omap_hwmod_class omap2430_dss_hwmod_class = {
797 - .name = "dss",
798 - .sysc = &omap2430_dss_sysc,
799 -};
800 -
801 /* dss */
802 /* dss master ports */
803 static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = {
804 @@ -1021,7 +946,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
806 static struct omap_hwmod omap2430_dss_core_hwmod = {
807 .name = "dss_core",
808 - .class = &omap2430_dss_hwmod_class,
809 + .class = &omap2_dss_hwmod_class,
810 .main_clk = "dss1_fck", /* instead of dss_fck */
811 .sdma_reqs = omap2xxx_dss_sdma_chs,
812 .prcm = {
813 @@ -1043,27 +968,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
814 .flags = HWMOD_NO_IDLEST,
815 };
817 -/*
818 - * 'dispc' class
819 - * display controller
820 - */
821 -
822 -static struct omap_hwmod_class_sysconfig omap2430_dispc_sysc = {
823 - .rev_offs = 0x0000,
824 - .sysc_offs = 0x0010,
825 - .syss_offs = 0x0014,
826 - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
827 - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
828 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
829 - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
830 - .sysc_fields = &omap_hwmod_sysc_type1,
831 -};
832 -
833 -static struct omap_hwmod_class omap2430_dispc_hwmod_class = {
834 - .name = "dispc",
835 - .sysc = &omap2430_dispc_sysc,
836 -};
837 -
838 /* l4_core -> dss_dispc */
839 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = {
840 .master = &omap2430_l4_core_hwmod,
841 @@ -1080,7 +984,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = {
843 static struct omap_hwmod omap2430_dss_dispc_hwmod = {
844 .name = "dss_dispc",
845 - .class = &omap2430_dispc_hwmod_class,
846 + .class = &omap2_dispc_hwmod_class,
847 .mpu_irqs = omap2_dispc_irqs,
848 .main_clk = "dss1_fck",
849 .prcm = {
850 @@ -1098,26 +1002,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = {
851 .flags = HWMOD_NO_IDLEST,
852 };
854 -/*
855 - * 'rfbi' class
856 - * remote frame buffer interface
857 - */
858 -
859 -static struct omap_hwmod_class_sysconfig omap2430_rfbi_sysc = {
860 - .rev_offs = 0x0000,
861 - .sysc_offs = 0x0010,
862 - .syss_offs = 0x0014,
863 - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
864 - SYSC_HAS_AUTOIDLE),
865 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
866 - .sysc_fields = &omap_hwmod_sysc_type1,
867 -};
868 -
869 -static struct omap_hwmod_class omap2430_rfbi_hwmod_class = {
870 - .name = "rfbi",
871 - .sysc = &omap2430_rfbi_sysc,
872 -};
873 -
874 /* l4_core -> dss_rfbi */
875 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = {
876 .master = &omap2430_l4_core_hwmod,
877 @@ -1134,7 +1018,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
879 static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
880 .name = "dss_rfbi",
881 - .class = &omap2430_rfbi_hwmod_class,
882 + .class = &omap2_rfbi_hwmod_class,
883 .main_clk = "dss1_fck",
884 .prcm = {
885 .omap2 = {
886 @@ -1149,15 +1033,6 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
887 .flags = HWMOD_NO_IDLEST,
888 };
890 -/*
891 - * 'venc' class
892 - * video encoder
893 - */
894 -
895 -static struct omap_hwmod_class omap2430_venc_hwmod_class = {
896 - .name = "venc",
897 -};
898 -
899 /* l4_core -> dss_venc */
900 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
901 .master = &omap2430_l4_core_hwmod,
902 @@ -1175,7 +1050,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
904 static struct omap_hwmod omap2430_dss_venc_hwmod = {
905 .name = "dss_venc",
906 - .class = &omap2430_venc_hwmod_class,
907 + .class = &omap2_venc_hwmod_class,
908 .main_clk = "dss1_fck",
909 .prcm = {
910 .omap2 = {
911 @@ -1367,27 +1242,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
912 .dbck_flag = false,
913 };
915 -static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = {
916 - .rev_offs = 0x0000,
917 - .sysc_offs = 0x0010,
918 - .syss_offs = 0x0014,
919 - .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
920 - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
921 - SYSS_HAS_RESET_STATUS),
922 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
923 - .sysc_fields = &omap_hwmod_sysc_type1,
924 -};
925 -
926 -/*
927 - * 'gpio' class
928 - * general purpose io module
929 - */
930 -static struct omap_hwmod_class omap243x_gpio_hwmod_class = {
931 - .name = "gpio",
932 - .sysc = &omap243x_gpio_sysc,
933 - .rev = 0,
934 -};
935 -
936 /* gpio1 */
937 static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
938 &omap2430_l4_wkup__gpio1,
939 @@ -1409,7 +1263,7 @@ static struct omap_hwmod omap2430_gpio1_hwmod = {
940 },
941 .slaves = omap2430_gpio1_slaves,
942 .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves),
943 - .class = &omap243x_gpio_hwmod_class,
944 + .class = &omap2xxx_gpio_hwmod_class,
945 .dev_attr = &gpio_dev_attr,
946 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
947 };
948 @@ -1435,7 +1289,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod = {
949 },
950 .slaves = omap2430_gpio2_slaves,
951 .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves),
952 - .class = &omap243x_gpio_hwmod_class,
953 + .class = &omap2xxx_gpio_hwmod_class,
954 .dev_attr = &gpio_dev_attr,
955 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
956 };
957 @@ -1461,7 +1315,7 @@ static struct omap_hwmod omap2430_gpio3_hwmod = {
958 },
959 .slaves = omap2430_gpio3_slaves,
960 .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves),
961 - .class = &omap243x_gpio_hwmod_class,
962 + .class = &omap2xxx_gpio_hwmod_class,
963 .dev_attr = &gpio_dev_attr,
964 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
965 };
966 @@ -1487,7 +1341,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = {
967 },
968 .slaves = omap2430_gpio4_slaves,
969 .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves),
970 - .class = &omap243x_gpio_hwmod_class,
971 + .class = &omap2xxx_gpio_hwmod_class,
972 .dev_attr = &gpio_dev_attr,
973 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
974 };
975 @@ -1518,28 +1372,11 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
976 },
977 .slaves = omap2430_gpio5_slaves,
978 .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves),
979 - .class = &omap243x_gpio_hwmod_class,
980 + .class = &omap2xxx_gpio_hwmod_class,
981 .dev_attr = &gpio_dev_attr,
982 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
983 };
985 -/* dma_system */
986 -static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = {
987 - .rev_offs = 0x0000,
988 - .sysc_offs = 0x002c,
989 - .syss_offs = 0x0028,
990 - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
991 - SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
992 - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
993 - .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
994 - .sysc_fields = &omap_hwmod_sysc_type1,
995 -};
996 -
997 -static struct omap_hwmod_class omap2430_dma_hwmod_class = {
998 - .name = "dma",
999 - .sysc = &omap2430_dma_sysc,
1000 -};
1001 -
1002 /* dma attributes */
1003 static struct omap_dma_dev_attr dma_dev_attr = {
1004 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
1005 @@ -1576,7 +1413,7 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
1007 static struct omap_hwmod omap2430_dma_system_hwmod = {
1008 .name = "dma",
1009 - .class = &omap2430_dma_hwmod_class,
1010 + .class = &omap2xxx_dma_hwmod_class,
1011 .mpu_irqs = omap2_dma_system_irqs,
1012 .main_clk = "core_l3_ck",
1013 .slaves = omap2430_dma_system_slaves,
1014 @@ -1588,27 +1425,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = {
1015 .flags = HWMOD_NO_IDLEST,
1016 };
1018 -/*
1019 - * 'mailbox' class
1020 - * mailbox module allowing communication between the on-chip processors
1021 - * using a queued mailbox-interrupt mechanism.
1022 - */
1023 -
1024 -static struct omap_hwmod_class_sysconfig omap2430_mailbox_sysc = {
1025 - .rev_offs = 0x000,
1026 - .sysc_offs = 0x010,
1027 - .syss_offs = 0x014,
1028 - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
1029 - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
1030 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1031 - .sysc_fields = &omap_hwmod_sysc_type1,
1032 -};
1033 -
1034 -static struct omap_hwmod_class omap2430_mailbox_hwmod_class = {
1035 - .name = "mailbox",
1036 - .sysc = &omap2430_mailbox_sysc,
1037 -};
1038 -
1039 /* mailbox */
1040 static struct omap_hwmod omap2430_mailbox_hwmod;
1041 static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {
1042 @@ -1631,7 +1447,7 @@ static struct omap_hwmod_ocp_if *omap2430_mailbox_slaves[] = {
1044 static struct omap_hwmod omap2430_mailbox_hwmod = {
1045 .name = "mailbox",
1046 - .class = &omap2430_mailbox_hwmod_class,
1047 + .class = &omap2xxx_mailbox_hwmod_class,
1048 .mpu_irqs = omap2430_mailbox_irqs,
1049 .main_clk = "mailboxes_ick",
1050 .prcm = {
1051 @@ -1648,29 +1464,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
1052 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1053 };
1055 -/*
1056 - * 'mcspi' class
1057 - * multichannel serial port interface (mcspi) / master/slave synchronous serial
1058 - * bus
1059 - */
1060 -
1061 -static struct omap_hwmod_class_sysconfig omap2430_mcspi_sysc = {
1062 - .rev_offs = 0x0000,
1063 - .sysc_offs = 0x0010,
1064 - .syss_offs = 0x0014,
1065 - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
1066 - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1067 - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1068 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1069 - .sysc_fields = &omap_hwmod_sysc_type1,
1070 -};
1071 -
1072 -static struct omap_hwmod_class omap2430_mcspi_class = {
1073 - .name = "mcspi",
1074 - .sysc = &omap2430_mcspi_sysc,
1075 - .rev = OMAP2_MCSPI_REV,
1076 -};
1077 -
1078 /* mcspi1 */
1079 static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = {
1080 &omap2430_l4_core__mcspi1,
1081 @@ -1696,8 +1489,8 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = {
1082 },
1083 .slaves = omap2430_mcspi1_slaves,
1084 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves),
1085 - .class = &omap2430_mcspi_class,
1086 - .dev_attr = &omap_mcspi1_dev_attr,
1087 + .class = &omap2xxx_mcspi_class,
1088 + .dev_attr = &omap_mcspi1_dev_attr,
1089 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1090 };
1092 @@ -1726,8 +1519,8 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = {
1093 },
1094 .slaves = omap2430_mcspi2_slaves,
1095 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves),
1096 - .class = &omap2430_mcspi_class,
1097 - .dev_attr = &omap_mcspi2_dev_attr,
1098 + .class = &omap2xxx_mcspi_class,
1099 + .dev_attr = &omap_mcspi2_dev_attr,
1100 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1101 };
1103 @@ -1769,8 +1562,8 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = {
1104 },
1105 .slaves = omap2430_mcspi3_slaves,
1106 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves),
1107 - .class = &omap2430_mcspi_class,
1108 - .dev_attr = &omap_mcspi3_dev_attr,
1109 + .class = &omap2xxx_mcspi_class,
1110 + .dev_attr = &omap_mcspi3_dev_attr,
1111 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1112 };
1114 diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
1115 index 7c4f5ab..c451729 100644
1116 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
1117 +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
1118 @@ -16,6 +16,164 @@
1120 #include "omap_hwmod_common_data.h"
1122 +/* UART */
1123 +
1124 +static struct omap_hwmod_class_sysconfig omap2_uart_sysc = {
1125 + .rev_offs = 0x50,
1126 + .sysc_offs = 0x54,
1127 + .syss_offs = 0x58,
1128 + .sysc_flags = (SYSC_HAS_SIDLEMODE |
1129 + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1130 + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1131 + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1132 + .sysc_fields = &omap_hwmod_sysc_type1,
1133 +};
1134 +
1135 +struct omap_hwmod_class omap2_uart_class = {
1136 + .name = "uart",
1137 + .sysc = &omap2_uart_sysc,
1138 +};
1139 +
1140 +/*
1141 + * 'dss' class
1142 + * display sub-system
1143 + */
1144 +
1145 +static struct omap_hwmod_class_sysconfig omap2_dss_sysc = {
1146 + .rev_offs = 0x0000,
1147 + .sysc_offs = 0x0010,
1148 + .syss_offs = 0x0014,
1149 + .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
1150 + .sysc_fields = &omap_hwmod_sysc_type1,
1151 +};
1152 +
1153 +struct omap_hwmod_class omap2_dss_hwmod_class = {
1154 + .name = "dss",
1155 + .sysc = &omap2_dss_sysc,
1156 +};
1157 +
1158 +/*
1159 + * 'dispc' class
1160 + * display controller
1161 + */
1162 +
1163 +static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = {
1164 + .rev_offs = 0x0000,
1165 + .sysc_offs = 0x0010,
1166 + .syss_offs = 0x0014,
1167 + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
1168 + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
1169 + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1170 + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1171 + .sysc_fields = &omap_hwmod_sysc_type1,
1172 +};
1173 +
1174 +struct omap_hwmod_class omap2_dispc_hwmod_class = {
1175 + .name = "dispc",
1176 + .sysc = &omap2_dispc_sysc,
1177 +};
1178 +
1179 +/*
1180 + * 'rfbi' class
1181 + * remote frame buffer interface
1182 + */
1183 +
1184 +static struct omap_hwmod_class_sysconfig omap2_rfbi_sysc = {
1185 + .rev_offs = 0x0000,
1186 + .sysc_offs = 0x0010,
1187 + .syss_offs = 0x0014,
1188 + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
1189 + SYSC_HAS_AUTOIDLE),
1190 + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1191 + .sysc_fields = &omap_hwmod_sysc_type1,
1192 +};
1193 +
1194 +struct omap_hwmod_class omap2_rfbi_hwmod_class = {
1195 + .name = "rfbi",
1196 + .sysc = &omap2_rfbi_sysc,
1197 +};
1198 +
1199 +/*
1200 + * 'venc' class
1201 + * video encoder
1202 + */
1203 +
1204 +struct omap_hwmod_class omap2_venc_hwmod_class = {
1205 + .name = "venc",
1206 +};
1207 +
1208 +
1209 +/* Common DMA request line data */
1210 +struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = {
1211 + { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
1212 + { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
1213 + { .dma_req = -1 }
1214 +};
1215 +
1216 +struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = {
1217 + { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
1218 + { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
1219 + { .dma_req = -1 }
1220 +};
1221 +
1222 +struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = {
1223 + { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
1224 + { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
1225 + { .dma_req = -1 }
1226 +};
1227 +
1228 +struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = {
1229 + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
1230 + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
1231 + { .dma_req = -1 }
1232 +};
1233 +
1234 +struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = {
1235 + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
1236 + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
1237 + { .dma_req = -1 }
1238 +};
1239 +
1240 +struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = {
1241 + { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */
1242 + { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */
1243 + { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */
1244 + { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */
1245 + { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */
1246 + { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */
1247 + { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */
1248 + { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */
1249 + { .dma_req = -1 }
1250 +};
1251 +
1252 +struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = {
1253 + { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */
1254 + { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
1255 + { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */
1256 + { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */
1257 + { .dma_req = -1 }
1258 +};
1259 +
1260 +struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = {
1261 + { .name = "rx", .dma_req = 32 },
1262 + { .name = "tx", .dma_req = 31 },
1263 + { .dma_req = -1 }
1264 +};
1265 +
1266 +struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = {
1267 + { .name = "rx", .dma_req = 34 },
1268 + { .name = "tx", .dma_req = 33 },
1269 + { .dma_req = -1 }
1270 +};
1271 +
1272 +struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = {
1273 + { .name = "rx", .dma_req = 18 },
1274 + { .name = "tx", .dma_req = 17 },
1275 + { .dma_req = -1 }
1276 +};
1277 +
1278 +/* Other IP block data */
1279 +
1281 /*
1282 * omap_hwmod class data
1283 @@ -162,73 +320,3 @@ struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = {
1284 { .irq = -1 }
1285 };
1287 -/* Common DMA request line data */
1288 -struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = {
1289 - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
1290 - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
1291 - { .dma_req = -1 }
1292 -};
1293 -
1294 -struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = {
1295 - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
1296 - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
1297 - { .dma_req = -1 }
1298 -};
1299 -
1300 -struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = {
1301 - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
1302 - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
1303 - { .dma_req = -1 }
1304 -};
1305 -
1306 -struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = {
1307 - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
1308 - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
1309 - { .dma_req = -1 }
1310 -};
1311 -
1312 -struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = {
1313 - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
1314 - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
1315 - { .dma_req = -1 }
1316 -};
1317 -
1318 -struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = {
1319 - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */
1320 - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */
1321 - { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */
1322 - { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */
1323 - { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */
1324 - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */
1325 - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */
1326 - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */
1327 - { .dma_req = -1 }
1328 -};
1329 -
1330 -struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = {
1331 - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */
1332 - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
1333 - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */
1334 - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */
1335 - { .dma_req = -1 }
1336 -};
1337 -
1338 -struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = {
1339 - { .name = "rx", .dma_req = 32 },
1340 - { .name = "tx", .dma_req = 31 },
1341 - { .dma_req = -1 }
1342 -};
1343 -
1344 -struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = {
1345 - { .name = "rx", .dma_req = 34 },
1346 - { .name = "tx", .dma_req = 33 },
1347 - { .dma_req = -1 }
1348 -};
1349 -
1350 -struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = {
1351 - { .name = "rx", .dma_req = 18 },
1352 - { .name = "tx", .dma_req = 17 },
1353 - { .dma_req = -1 }
1354 -};
1355 -
1356 -
1357 diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
1358 index f5b63ef..177dee2 100644
1359 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
1360 +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
1361 @@ -11,10 +11,13 @@
1362 #include <plat/omap_hwmod.h>
1363 #include <plat/serial.h>
1364 #include <plat/dma.h>
1365 +#include <plat/dmtimer.h>
1366 +#include <plat/mcspi.h>
1368 #include <mach/irqs.h>
1370 #include "omap_hwmod_common_data.h"
1371 +#include "wd_timer.h"
1373 struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = {
1374 { .irq = 48, },
1375 @@ -25,3 +28,123 @@ struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = {
1376 { .name = "dispc", .dma_req = 5 },
1377 { .dma_req = -1 }
1378 };
1379 +/* OMAP2xxx Timer Common */
1380 +static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
1381 + .rev_offs = 0x0000,
1382 + .sysc_offs = 0x0010,
1383 + .syss_offs = 0x0014,
1384 + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
1385 + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1386 + SYSC_HAS_AUTOIDLE),
1387 + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1388 + .sysc_fields = &omap_hwmod_sysc_type1,
1389 +};
1390 +
1391 +struct omap_hwmod_class omap2xxx_timer_hwmod_class = {
1392 + .name = "timer",
1393 + .sysc = &omap2xxx_timer_sysc,
1394 + .rev = OMAP_TIMER_IP_VERSION_1,
1395 +};
1396 +
1397 +/*
1398 + * 'wd_timer' class
1399 + * 32-bit watchdog upward counter that generates a pulse on the reset pin on
1400 + * overflow condition
1401 + */
1402 +
1403 +static struct omap_hwmod_class_sysconfig omap2xxx_wd_timer_sysc = {
1404 + .rev_offs = 0x0000,
1405 + .sysc_offs = 0x0010,
1406 + .syss_offs = 0x0014,
1407 + .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
1408 + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1409 + .sysc_fields = &omap_hwmod_sysc_type1,
1410 +};
1411 +
1412 +struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class = {
1413 + .name = "wd_timer",
1414 + .sysc = &omap2xxx_wd_timer_sysc,
1415 + .pre_shutdown = &omap2_wd_timer_disable
1416 +};
1417 +
1418 +/*
1419 + * 'gpio' class
1420 + * general purpose io module
1421 + */
1422 +static struct omap_hwmod_class_sysconfig omap2xxx_gpio_sysc = {
1423 + .rev_offs = 0x0000,
1424 + .sysc_offs = 0x0010,
1425 + .syss_offs = 0x0014,
1426 + .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
1427 + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
1428 + SYSS_HAS_RESET_STATUS),
1429 + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1430 + .sysc_fields = &omap_hwmod_sysc_type1,
1431 +};
1432 +
1433 +struct omap_hwmod_class omap2xxx_gpio_hwmod_class = {
1434 + .name = "gpio",
1435 + .sysc = &omap2xxx_gpio_sysc,
1436 + .rev = 0,
1437 +};
1438 +
1439 +/* system dma */
1440 +static struct omap_hwmod_class_sysconfig omap2xxx_dma_sysc = {
1441 + .rev_offs = 0x0000,
1442 + .sysc_offs = 0x002c,
1443 + .syss_offs = 0x0028,
1444 + .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
1445 + SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
1446 + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1447 + .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1448 + .sysc_fields = &omap_hwmod_sysc_type1,
1449 +};
1450 +
1451 +struct omap_hwmod_class omap2xxx_dma_hwmod_class = {
1452 + .name = "dma",
1453 + .sysc = &omap2xxx_dma_sysc,
1454 +};
1455 +
1456 +/*
1457 + * 'mailbox' class
1458 + * mailbox module allowing communication between the on-chip processors
1459 + * using a queued mailbox-interrupt mechanism.
1460 + */
1461 +
1462 +static struct omap_hwmod_class_sysconfig omap2xxx_mailbox_sysc = {
1463 + .rev_offs = 0x000,
1464 + .sysc_offs = 0x010,
1465 + .syss_offs = 0x014,
1466 + .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
1467 + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
1468 + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1469 + .sysc_fields = &omap_hwmod_sysc_type1,
1470 +};
1471 +
1472 +struct omap_hwmod_class omap2xxx_mailbox_hwmod_class = {
1473 + .name = "mailbox",
1474 + .sysc = &omap2xxx_mailbox_sysc,
1475 +};
1476 +
1477 +/*
1478 + * 'mcspi' class
1479 + * multichannel serial port interface (mcspi) / master/slave synchronous serial
1480 + * bus
1481 + */
1482 +
1483 +static struct omap_hwmod_class_sysconfig omap2xxx_mcspi_sysc = {
1484 + .rev_offs = 0x0000,
1485 + .sysc_offs = 0x0010,
1486 + .syss_offs = 0x0014,
1487 + .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
1488 + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1489 + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1490 + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1491 + .sysc_fields = &omap_hwmod_sysc_type1,
1492 +};
1493 +
1494 +struct omap_hwmod_class omap2xxx_mcspi_class = {
1495 + .name = "mcspi",
1496 + .sysc = &omap2xxx_mcspi_sysc,
1497 + .rev = OMAP2_MCSPI_REV,
1498 +};
1499 diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
1500 index 001f67b..1a52716 100644
1501 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
1502 +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
1503 @@ -1190,24 +1190,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
1504 .flags = HWMOD_SWSUP_SIDLE,
1505 };
1507 -/* UART common */
1508 -
1509 -static struct omap_hwmod_class_sysconfig uart_sysc = {
1510 - .rev_offs = 0x50,
1511 - .sysc_offs = 0x54,
1512 - .syss_offs = 0x58,
1513 - .sysc_flags = (SYSC_HAS_SIDLEMODE |
1514 - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1515 - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1516 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1517 - .sysc_fields = &omap_hwmod_sysc_type1,
1518 -};
1519 -
1520 -static struct omap_hwmod_class uart_class = {
1521 - .name = "uart",
1522 - .sysc = &uart_sysc,
1523 -};
1524 -
1525 /* UART1 */
1527 static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = {
1528 @@ -1230,7 +1212,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
1529 },
1530 .slaves = omap3xxx_uart1_slaves,
1531 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart1_slaves),
1532 - .class = &uart_class,
1533 + .class = &omap2_uart_class,
1534 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1535 };
1537 @@ -1256,7 +1238,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
1538 },
1539 .slaves = omap3xxx_uart2_slaves,
1540 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart2_slaves),
1541 - .class = &uart_class,
1542 + .class = &omap2_uart_class,
1543 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1544 };
1546 @@ -1282,7 +1264,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
1547 },
1548 .slaves = omap3xxx_uart3_slaves,
1549 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart3_slaves),
1550 - .class = &uart_class,
1551 + .class = &omap2_uart_class,
1552 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1553 };
1555 @@ -1319,7 +1301,7 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
1556 },
1557 .slaves = omap3xxx_uart4_slaves,
1558 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart4_slaves),
1559 - .class = &uart_class,
1560 + .class = &omap2_uart_class,
1561 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
1562 };
1564 @@ -1328,24 +1310,6 @@ static struct omap_hwmod_class i2c_class = {
1565 .sysc = &i2c_sysc,
1566 };
1568 -/*
1569 - * 'dss' class
1570 - * display sub-system
1571 - */
1572 -
1573 -static struct omap_hwmod_class_sysconfig omap3xxx_dss_sysc = {
1574 - .rev_offs = 0x0000,
1575 - .sysc_offs = 0x0010,
1576 - .syss_offs = 0x0014,
1577 - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
1578 - .sysc_fields = &omap_hwmod_sysc_type1,
1579 -};
1580 -
1581 -static struct omap_hwmod_class omap3xxx_dss_hwmod_class = {
1582 - .name = "dss",
1583 - .sysc = &omap3xxx_dss_sysc,
1584 -};
1585 -
1586 static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = {
1587 { .name = "dispc", .dma_req = 5 },
1588 { .name = "dsi1", .dma_req = 74 },
1589 @@ -1406,7 +1370,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1591 static struct omap_hwmod omap3430es1_dss_core_hwmod = {
1592 .name = "dss_core",
1593 - .class = &omap3xxx_dss_hwmod_class,
1594 + .class = &omap2_dss_hwmod_class,
1595 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */
1596 .sdma_reqs = omap3xxx_dss_sdma_chs,
1597 .prcm = {
1598 @@ -1430,7 +1394,7 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
1600 static struct omap_hwmod omap3xxx_dss_core_hwmod = {
1601 .name = "dss_core",
1602 - .class = &omap3xxx_dss_hwmod_class,
1603 + .class = &omap2_dss_hwmod_class,
1604 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */
1605 .sdma_reqs = omap3xxx_dss_sdma_chs,
1606 .prcm = {
1607 @@ -1453,28 +1417,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
1608 CHIP_IS_OMAP3630ES1 | CHIP_GE_OMAP3630ES1_1),
1609 };
1611 -/*
1612 - * 'dispc' class
1613 - * display controller
1614 - */
1615 -
1616 -static struct omap_hwmod_class_sysconfig omap3xxx_dispc_sysc = {
1617 - .rev_offs = 0x0000,
1618 - .sysc_offs = 0x0010,
1619 - .syss_offs = 0x0014,
1620 - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
1621 - SYSC_HAS_MIDLEMODE | SYSC_HAS_ENAWAKEUP |
1622 - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
1623 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1624 - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1625 - .sysc_fields = &omap_hwmod_sysc_type1,
1626 -};
1627 -
1628 -static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = {
1629 - .name = "dispc",
1630 - .sysc = &omap3xxx_dispc_sysc,
1631 -};
1632 -
1633 /* l4_core -> dss_dispc */
1634 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = {
1635 .master = &omap3xxx_l4_core_hwmod,
1636 @@ -1498,7 +1440,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = {
1638 static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
1639 .name = "dss_dispc",
1640 - .class = &omap3xxx_dispc_hwmod_class,
1641 + .class = &omap2_dispc_hwmod_class,
1642 .mpu_irqs = omap2_dispc_irqs,
1643 .main_clk = "dss1_alwon_fck",
1644 .prcm = {
1645 @@ -1580,26 +1522,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1646 .flags = HWMOD_NO_IDLEST,
1647 };
1649 -/*
1650 - * 'rfbi' class
1651 - * remote frame buffer interface
1652 - */
1653 -
1654 -static struct omap_hwmod_class_sysconfig omap3xxx_rfbi_sysc = {
1655 - .rev_offs = 0x0000,
1656 - .sysc_offs = 0x0010,
1657 - .syss_offs = 0x0014,
1658 - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
1659 - SYSC_HAS_AUTOIDLE),
1660 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1661 - .sysc_fields = &omap_hwmod_sysc_type1,
1662 -};
1663 -
1664 -static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = {
1665 - .name = "rfbi",
1666 - .sysc = &omap3xxx_rfbi_sysc,
1667 -};
1668 -
1669 /* l4_core -> dss_rfbi */
1670 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = {
1671 .master = &omap3xxx_l4_core_hwmod,
1672 @@ -1623,7 +1545,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = {
1674 static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
1675 .name = "dss_rfbi",
1676 - .class = &omap3xxx_rfbi_hwmod_class,
1677 + .class = &omap2_rfbi_hwmod_class,
1678 .main_clk = "dss1_alwon_fck",
1679 .prcm = {
1680 .omap2 = {
1681 @@ -1640,15 +1562,6 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
1682 .flags = HWMOD_NO_IDLEST,
1683 };
1685 -/*
1686 - * 'venc' class
1687 - * video encoder
1688 - */
1689 -
1690 -static struct omap_hwmod_class omap3xxx_venc_hwmod_class = {
1691 - .name = "venc",
1692 -};
1693 -
1694 /* l4_core -> dss_venc */
1695 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
1696 .master = &omap3xxx_l4_core_hwmod,
1697 @@ -1673,7 +1586,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = {
1699 static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
1700 .name = "dss_venc",
1701 - .class = &omap3xxx_venc_hwmod_class,
1702 + .class = &omap2_venc_hwmod_class,
1703 .main_clk = "dss1_alwon_fck",
1704 .prcm = {
1705 .omap2 = {
1706 diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
1707 index b636cf6..39a7c37 100644
1708 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
1709 +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
1710 @@ -98,6 +98,17 @@ extern struct omap_hwmod_class l3_hwmod_class;
1711 extern struct omap_hwmod_class l4_hwmod_class;
1712 extern struct omap_hwmod_class mpu_hwmod_class;
1713 extern struct omap_hwmod_class iva_hwmod_class;
1714 +extern struct omap_hwmod_class omap2_uart_class;
1715 +extern struct omap_hwmod_class omap2_dss_hwmod_class;
1716 +extern struct omap_hwmod_class omap2_dispc_hwmod_class;
1717 +extern struct omap_hwmod_class omap2_rfbi_hwmod_class;
1718 +extern struct omap_hwmod_class omap2_venc_hwmod_class;
1720 +extern struct omap_hwmod_class omap2xxx_timer_hwmod_class;
1721 +extern struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class;
1722 +extern struct omap_hwmod_class omap2xxx_gpio_hwmod_class;
1723 +extern struct omap_hwmod_class omap2xxx_dma_hwmod_class;
1724 +extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class;
1725 +extern struct omap_hwmod_class omap2xxx_mcspi_class;
1727 #endif
1728 --
1729 1.7.2.5