cc154ad97ea035fb3b86c463e00eb1db430da657
[glsdk/meta-ti-glsdk.git] / recipes-kernel / linux / linux-3.0 / pm-wip / voltdm / 0079-OMAP4-hwmod-Replace-CLKCTRL-absolute-address-with-of.patch
1 From b37b8e0b5134f793a09513a9a5f9df9e51a77333 Mon Sep 17 00:00:00 2001
2 From: Benoit Cousson <b-cousson@ti.com>
3 Date: Sun, 10 Jul 2011 05:56:30 -0600
4 Subject: [PATCH 079/149] OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros
6 The CLKCTRL register was accessed using an absolute address.
7 The usage of hardcoded macros to calculate virtual address from physical
8 one should be avoided as much as possible.
9 The usage of a offset will allow future improvement like migration from
10 the current architecture code toward a module driver.
12 Update cm_xxx accessor, move definition to the proper header file and
13 update copyrights.
15 Signed-off-by: Benoit Cousson <b-cousson@ti.com>
16 Cc: Paul Walmsley <paul@pwsan.com>
17 Cc: Rajendra Nayak <rnayak@ti.com>
18 Cc: Todd Poynor <toddpoynor@google.com>
19 [paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; removed empty
20 fn prototype section from cm44xx.h; incorporated comments from Todd;
21 documented some functions]
22 Signed-off-by: Paul Walmsley <paul@pwsan.com>
23 ---
24 arch/arm/mach-omap2/cm44xx.h | 8 +-
25 arch/arm/mach-omap2/cminst44xx.c | 87 ++++++++++---
26 arch/arm/mach-omap2/cminst44xx.h | 4 +-
27 arch/arm/mach-omap2/omap_hwmod.c | 12 ++-
28 arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 182 ++++++++++++++++---------
29 arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 +-
30 6 files changed, 198 insertions(+), 97 deletions(-)
32 diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h
33 index 0b87ec8..3380bee 100644
34 --- a/arch/arm/mach-omap2/cm44xx.h
35 +++ b/arch/arm/mach-omap2/cm44xx.h
36 @@ -1,7 +1,7 @@
37 /*
38 * OMAP4 Clock Management (CM) definitions
39 *
40 - * Copyright (C) 2007-2009 Texas Instruments, Inc.
41 + * Copyright (C) 2007-2011 Texas Instruments, Inc.
42 * Copyright (C) 2007-2009 Nokia Corporation
43 *
44 * Written by Paul Walmsley
45 @@ -23,10 +23,4 @@
46 #define OMAP4_CM_CLKSTCTRL 0x0000
47 #define OMAP4_CM_STATICDEP 0x0004
49 -/* Function prototypes */
50 -# ifndef __ASSEMBLER__
51 -
52 -extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg);
53 -
54 -# endif
55 #endif
56 diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
57 index a482bfa..9033dd4 100644
58 --- a/arch/arm/mach-omap2/cminst44xx.c
59 +++ b/arch/arm/mach-omap2/cminst44xx.c
60 @@ -2,6 +2,7 @@
61 * OMAP4 CM instance functions
62 *
63 * Copyright (C) 2009 Nokia Corporation
64 + * Copyright (C) 2011 Texas Instruments, Inc.
65 * Paul Walmsley
66 *
67 * This program is free software; you can redistribute it and/or modify
68 @@ -32,6 +33,22 @@
69 #include "prm44xx.h"
70 #include "prcm_mpu44xx.h"
72 +/*
73 + * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
74 + *
75 + * 0x0 func: Module is fully functional, including OCP
76 + * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep
77 + * abortion
78 + * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if
79 + * using separate functional clock
80 + * 0x3 disabled: Module is disabled and cannot be accessed
81 + *
82 + */
83 +#define CLKCTRL_IDLEST_FUNCTIONAL 0x0
84 +#define CLKCTRL_IDLEST_INTRANSITION 0x1
85 +#define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2
86 +#define CLKCTRL_IDLEST_DISABLED 0x3
87 +
88 static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {
89 [OMAP4430_INVALID_PRCM_PARTITION] = 0,
90 [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
91 @@ -41,6 +58,48 @@ static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {
92 [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE,
93 };
95 +/* Private functions */
96 +
97 +/**
98 + * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
99 + * @part: PRCM partition ID that the CM_CLKCTRL register exists in
100 + * @inst: CM instance register offset (*_INST macro)
101 + * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
102 + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
103 + *
104 + * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to
105 + * bit 0.
106 + */
107 +static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs)
108 +{
109 + u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs);
110 + v &= OMAP4430_IDLEST_MASK;
111 + v >>= OMAP4430_IDLEST_SHIFT;
112 + return v;
113 +}
114 +
115 +/**
116 + * _is_module_ready - can module registers be accessed without causing an abort?
117 + * @part: PRCM partition ID that the CM_CLKCTRL register exists in
118 + * @inst: CM instance register offset (*_INST macro)
119 + * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
120 + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
121 + *
122 + * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either
123 + * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise.
124 + */
125 +static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs)
126 +{
127 + u32 v;
128 +
129 + v = _clkctrl_idlest(part, inst, cdoffs, clkctrl_offs);
130 +
131 + return (v == CLKCTRL_IDLEST_FUNCTIONAL ||
132 + v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
133 +}
134 +
135 +/* Public functions */
136 +
137 /* Read a register in a CM instance */
138 u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx)
139 {
140 @@ -200,35 +259,27 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs)
141 */
143 /**
144 - * omap4_cm_wait_module_ready - wait for a module to be in 'func' state
145 - * @clkctrl_reg: CLKCTRL module address
146 + * omap4_cminst_wait_module_ready - wait for a module to be in 'func' state
147 + * @part: PRCM partition ID that the CM_CLKCTRL register exists in
148 + * @inst: CM instance register offset (*_INST macro)
149 + * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
150 + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
151 *
152 * Wait for the module IDLEST to be functional. If the idle state is in any
153 * the non functional state (trans, idle or disabled), module and thus the
154 * sysconfig cannot be accessed and will probably lead to an "imprecise
155 * external abort"
156 - *
157 - * Module idle state:
158 - * 0x0 func: Module is fully functional, including OCP
159 - * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep
160 - * abortion
161 - * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if
162 - * using separate functional clock
163 - * 0x3 disabled: Module is disabled and cannot be accessed
164 - *
165 */
166 -int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg)
167 +int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs,
168 + u16 clkctrl_offs)
169 {
170 int i = 0;
172 - if (!clkctrl_reg)
173 + if (!clkctrl_offs)
174 return 0;
176 - omap_test_timeout((
177 - ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0) ||
178 - (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >>
179 - OMAP4430_IDLEST_SHIFT) == 0x2)),
180 - MAX_MODULE_READY_TIME, i);
181 + omap_test_timeout(_is_module_ready(part, inst, cdoffs, clkctrl_offs),
182 + MAX_MODULE_READY_TIME, i);
184 return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
185 }
186 diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
187 index 2b32c18..8eba2ae 100644
188 --- a/arch/arm/mach-omap2/cminst44xx.h
189 +++ b/arch/arm/mach-omap2/cminst44xx.h
190 @@ -17,6 +17,8 @@ extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs);
191 extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs);
192 extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs);
194 +extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs);
195 +
196 /*
197 * In an ideal world, we would not export these low-level functions,
198 * but this will probably take some time to fix properly
199 @@ -32,6 +34,4 @@ extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst,
200 extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
201 u32 mask);
203 -extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg);
204 -
205 #endif
206 diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
207 index 1f6f47f..00241ea 100644
208 --- a/arch/arm/mach-omap2/omap_hwmod.c
209 +++ b/arch/arm/mach-omap2/omap_hwmod.c
210 @@ -146,7 +146,7 @@
211 #include <plat/prcm.h>
213 #include "cm2xxx_3xxx.h"
214 -#include "cm44xx.h"
215 +#include "cminst44xx.h"
216 #include "prm2xxx_3xxx.h"
217 #include "prm44xx.h"
218 #include "mux.h"
219 @@ -1060,7 +1060,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data)
220 * Wait for a module @oh to leave slave idle. Returns 0 if the module
221 * does not have an IDLEST bit or if the module successfully leaves
222 * slave idle; otherwise, pass along the return value of the
223 - * appropriate *_cm_wait_module_ready() function.
224 + * appropriate *_cm*_wait_module_ready() function.
225 */
226 static int _wait_target_ready(struct omap_hwmod *oh)
227 {
228 @@ -1087,7 +1087,13 @@ static int _wait_target_ready(struct omap_hwmod *oh)
229 oh->prcm.omap2.idlest_reg_id,
230 oh->prcm.omap2.idlest_idle_bit);
231 } else if (cpu_is_omap44xx()) {
232 - ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
233 + if (!oh->clkdm)
234 + return -EINVAL;
235 +
236 + ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
237 + oh->clkdm->cm_inst,
238 + oh->clkdm->clkdm_offs,
239 + oh->prcm.omap4.clkctrl_offs);
240 } else {
241 BUG();
242 };
243 diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
244 index becae45..00d7130 100644
245 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
246 +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
247 @@ -124,6 +124,11 @@ static struct omap_hwmod omap44xx_dmm_hwmod = {
248 .name = "dmm",
249 .class = &omap44xx_dmm_hwmod_class,
250 .clkdm_name = "l3_emif_clkdm",
251 + .prcm = {
252 + .omap4 = {
253 + .clkctrl_offs = OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET,
254 + },
255 + },
256 .slaves = omap44xx_dmm_slaves,
257 .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves),
258 .mpu_irqs = omap44xx_dmm_irqs,
259 @@ -175,6 +180,11 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = {
260 .name = "emif_fw",
261 .class = &omap44xx_emif_fw_hwmod_class,
262 .clkdm_name = "l3_emif_clkdm",
263 + .prcm = {
264 + .omap4 = {
265 + .clkctrl_offs = OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET,
266 + },
267 + },
268 .slaves = omap44xx_emif_fw_slaves,
269 .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves),
270 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
271 @@ -215,6 +225,11 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {
272 .name = "l3_instr",
273 .class = &omap44xx_l3_hwmod_class,
274 .clkdm_name = "l3_instr_clkdm",
275 + .prcm = {
276 + .omap4 = {
277 + .clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET,
278 + },
279 + },
280 .slaves = omap44xx_l3_instr_slaves,
281 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves),
282 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
283 @@ -309,6 +324,11 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
284 .class = &omap44xx_l3_hwmod_class,
285 .clkdm_name = "l3_1_clkdm",
286 .mpu_irqs = omap44xx_l3_main_1_irqs,
287 + .prcm = {
288 + .omap4 = {
289 + .clkctrl_offs = OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET,
290 + },
291 + },
292 .slaves = omap44xx_l3_main_1_slaves,
293 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves),
294 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
295 @@ -405,6 +425,11 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = {
296 .name = "l3_main_2",
297 .class = &omap44xx_l3_hwmod_class,
298 .clkdm_name = "l3_2_clkdm",
299 + .prcm = {
300 + .omap4 = {
301 + .clkctrl_offs = OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET,
302 + },
303 + },
304 .slaves = omap44xx_l3_main_2_slaves,
305 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves),
306 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
307 @@ -456,6 +481,11 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = {
308 .name = "l3_main_3",
309 .class = &omap44xx_l3_hwmod_class,
310 .clkdm_name = "l3_instr_clkdm",
311 + .prcm = {
312 + .omap4 = {
313 + .clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET,
314 + },
315 + },
316 .slaves = omap44xx_l3_main_3_slaves,
317 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves),
318 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
319 @@ -514,6 +544,11 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = {
320 .name = "l4_abe",
321 .class = &omap44xx_l4_hwmod_class,
322 .clkdm_name = "abe_clkdm",
323 + .prcm = {
324 + .omap4 = {
325 + .clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET,
326 + },
327 + },
328 .slaves = omap44xx_l4_abe_slaves,
329 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves),
330 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
331 @@ -537,6 +572,11 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
332 .name = "l4_cfg",
333 .class = &omap44xx_l4_hwmod_class,
334 .clkdm_name = "l4_cfg_clkdm",
335 + .prcm = {
336 + .omap4 = {
337 + .clkctrl_offs = OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET,
338 + },
339 + },
340 .slaves = omap44xx_l4_cfg_slaves,
341 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves),
342 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
343 @@ -560,6 +600,11 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = {
344 .name = "l4_per",
345 .class = &omap44xx_l4_hwmod_class,
346 .clkdm_name = "l4_per_clkdm",
347 + .prcm = {
348 + .omap4 = {
349 + .clkctrl_offs = OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET,
350 + },
351 + },
352 .slaves = omap44xx_l4_per_slaves,
353 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves),
354 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
355 @@ -583,6 +628,11 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
356 .name = "l4_wkup",
357 .class = &omap44xx_l4_hwmod_class,
358 .clkdm_name = "l4_wkup_clkdm",
359 + .prcm = {
360 + .omap4 = {
361 + .clkctrl_offs = OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET,
362 + },
363 + },
364 .slaves = omap44xx_l4_wkup_slaves,
365 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves),
366 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
367 @@ -758,7 +808,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
368 .main_clk = "aess_fck",
369 .prcm = {
370 .omap4 = {
371 - .clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL,
372 + .clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET,
373 },
374 },
375 .slaves = omap44xx_aess_slaves,
376 @@ -788,7 +838,7 @@ static struct omap_hwmod omap44xx_bandgap_hwmod = {
377 .clkdm_name = "l4_wkup_clkdm",
378 .prcm = {
379 .omap4 = {
380 - .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL,
381 + .clkctrl_offs = OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET,
382 },
383 },
384 .opt_clks = bandgap_opt_clks,
385 @@ -848,7 +898,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = {
386 .main_clk = "sys_32k_ck",
387 .prcm = {
388 .omap4 = {
389 - .clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL,
390 + .clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET,
391 },
392 },
393 .slaves = omap44xx_counter_32k_slaves,
394 @@ -932,7 +982,7 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = {
395 .main_clk = "l3_div_ck",
396 .prcm = {
397 .omap4 = {
398 - .clkctrl_reg = OMAP4430_CM_SDMA_SDMA_CLKCTRL,
399 + .clkctrl_offs = OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET,
400 },
401 },
402 .dev_attr = &dma_dev_attr,
403 @@ -1026,7 +1076,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = {
404 .main_clk = "dmic_fck",
405 .prcm = {
406 .omap4 = {
407 - .clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL,
408 + .clkctrl_offs = OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET,
409 },
410 },
411 .slaves = omap44xx_dmic_slaves,
412 @@ -1110,7 +1160,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
413 .main_clk = "dsp_fck",
414 .prcm = {
415 .omap4 = {
416 - .clkctrl_reg = OMAP4430_CM_TESLA_TESLA_CLKCTRL,
417 + .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET,
418 .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL,
419 },
420 },
421 @@ -1199,7 +1249,7 @@ static struct omap_hwmod omap44xx_dss_hwmod = {
422 .main_clk = "dss_dss_clk",
423 .prcm = {
424 .omap4 = {
425 - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
426 + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
427 },
428 },
429 .opt_clks = dss_opt_clks,
430 @@ -1303,7 +1353,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
431 .main_clk = "dss_dss_clk",
432 .prcm = {
433 .omap4 = {
434 - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
435 + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
436 },
437 },
438 .opt_clks = dss_dispc_opt_clks,
439 @@ -1401,7 +1451,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
440 .main_clk = "dss_dss_clk",
441 .prcm = {
442 .omap4 = {
443 - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
444 + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
445 },
446 },
447 .opt_clks = dss_dsi1_opt_clks,
448 @@ -1478,7 +1528,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
449 .main_clk = "dss_dss_clk",
450 .prcm = {
451 .omap4 = {
452 - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
453 + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
454 },
455 },
456 .opt_clks = dss_dsi2_opt_clks,
457 @@ -1575,7 +1625,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
458 .main_clk = "dss_dss_clk",
459 .prcm = {
460 .omap4 = {
461 - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
462 + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
463 },
464 },
465 .opt_clks = dss_hdmi_opt_clks,
466 @@ -1666,7 +1716,7 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
467 .main_clk = "dss_dss_clk",
468 .prcm = {
469 .omap4 = {
470 - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
471 + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
472 },
473 },
474 .opt_clks = dss_rfbi_opt_clks,
475 @@ -1736,7 +1786,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
476 .main_clk = "dss_dss_clk",
477 .prcm = {
478 .omap4 = {
479 - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
480 + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
481 },
482 },
483 .slaves = omap44xx_dss_venc_slaves,
484 @@ -1815,7 +1865,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
485 .main_clk = "gpio1_ick",
486 .prcm = {
487 .omap4 = {
488 - .clkctrl_reg = OMAP4430_CM_WKUP_GPIO1_CLKCTRL,
489 + .clkctrl_offs = OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET,
490 },
491 },
492 .opt_clks = gpio1_opt_clks,
493 @@ -1869,7 +1919,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
494 .main_clk = "gpio2_ick",
495 .prcm = {
496 .omap4 = {
497 - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO2_CLKCTRL,
498 + .clkctrl_offs = OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET,
499 },
500 },
501 .opt_clks = gpio2_opt_clks,
502 @@ -1923,7 +1973,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
503 .main_clk = "gpio3_ick",
504 .prcm = {
505 .omap4 = {
506 - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO3_CLKCTRL,
507 + .clkctrl_offs = OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET,
508 },
509 },
510 .opt_clks = gpio3_opt_clks,
511 @@ -1977,7 +2027,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
512 .main_clk = "gpio4_ick",
513 .prcm = {
514 .omap4 = {
515 - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO4_CLKCTRL,
516 + .clkctrl_offs = OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET,
517 },
518 },
519 .opt_clks = gpio4_opt_clks,
520 @@ -2031,7 +2081,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
521 .main_clk = "gpio5_ick",
522 .prcm = {
523 .omap4 = {
524 - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO5_CLKCTRL,
525 + .clkctrl_offs = OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET,
526 },
527 },
528 .opt_clks = gpio5_opt_clks,
529 @@ -2085,7 +2135,7 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {
530 .main_clk = "gpio6_ick",
531 .prcm = {
532 .omap4 = {
533 - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO6_CLKCTRL,
534 + .clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET,
535 },
536 },
537 .opt_clks = gpio6_opt_clks,
538 @@ -2164,7 +2214,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = {
539 .main_clk = "hsi_fck",
540 .prcm = {
541 .omap4 = {
542 - .clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL,
543 + .clkctrl_offs = OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET,
544 },
545 },
546 .slaves = omap44xx_hsi_slaves,
547 @@ -2247,7 +2297,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
548 .main_clk = "i2c1_fck",
549 .prcm = {
550 .omap4 = {
551 - .clkctrl_reg = OMAP4430_CM_L4PER_I2C1_CLKCTRL,
552 + .clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET,
553 },
554 },
555 .slaves = omap44xx_i2c1_slaves,
556 @@ -2302,7 +2352,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
557 .main_clk = "i2c2_fck",
558 .prcm = {
559 .omap4 = {
560 - .clkctrl_reg = OMAP4430_CM_L4PER_I2C2_CLKCTRL,
561 + .clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET,
562 },
563 },
564 .slaves = omap44xx_i2c2_slaves,
565 @@ -2357,7 +2407,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
566 .main_clk = "i2c3_fck",
567 .prcm = {
568 .omap4 = {
569 - .clkctrl_reg = OMAP4430_CM_L4PER_I2C3_CLKCTRL,
570 + .clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET,
571 },
572 },
573 .slaves = omap44xx_i2c3_slaves,
574 @@ -2412,7 +2462,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
575 .main_clk = "i2c4_fck",
576 .prcm = {
577 .omap4 = {
578 - .clkctrl_reg = OMAP4430_CM_L4PER_I2C4_CLKCTRL,
579 + .clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET,
580 },
581 },
582 .slaves = omap44xx_i2c4_slaves,
583 @@ -2508,7 +2558,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
584 .main_clk = "ipu_fck",
585 .prcm = {
586 .omap4 = {
587 - .clkctrl_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL,
588 + .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET,
589 .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL,
590 },
591 },
592 @@ -2595,7 +2645,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = {
593 .main_clk = "iss_fck",
594 .prcm = {
595 .omap4 = {
596 - .clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL,
597 + .clkctrl_offs = OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET,
598 },
599 },
600 .opt_clks = iss_opt_clks,
601 @@ -2708,7 +2758,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = {
602 .main_clk = "iva_fck",
603 .prcm = {
604 .omap4 = {
605 - .clkctrl_reg = OMAP4430_CM_IVAHD_IVAHD_CLKCTRL,
606 + .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET,
607 .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL,
608 },
609 },
610 @@ -2779,7 +2829,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = {
611 .main_clk = "kbd_fck",
612 .prcm = {
613 .omap4 = {
614 - .clkctrl_reg = OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL,
615 + .clkctrl_offs = OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET,
616 },
617 },
618 .slaves = omap44xx_kbd_slaves,
619 @@ -2844,7 +2894,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = {
620 .mpu_irqs = omap44xx_mailbox_irqs,
621 .prcm = {
622 .omap4 = {
623 - .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL,
624 + .clkctrl_offs = OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET,
625 },
626 },
627 .slaves = omap44xx_mailbox_slaves,
628 @@ -2937,7 +2987,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
629 .main_clk = "mcbsp1_fck",
630 .prcm = {
631 .omap4 = {
632 - .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP1_CLKCTRL,
633 + .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET,
634 },
635 },
636 .slaves = omap44xx_mcbsp1_slaves,
637 @@ -3011,7 +3061,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
638 .main_clk = "mcbsp2_fck",
639 .prcm = {
640 .omap4 = {
641 - .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP2_CLKCTRL,
642 + .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET,
643 },
644 },
645 .slaves = omap44xx_mcbsp2_slaves,
646 @@ -3085,7 +3135,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
647 .main_clk = "mcbsp3_fck",
648 .prcm = {
649 .omap4 = {
650 - .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP3_CLKCTRL,
651 + .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET,
652 },
653 },
654 .slaves = omap44xx_mcbsp3_slaves,
655 @@ -3138,7 +3188,7 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
656 .main_clk = "mcbsp4_fck",
657 .prcm = {
658 .omap4 = {
659 - .clkctrl_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL,
660 + .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET,
661 },
662 },
663 .slaves = omap44xx_mcbsp4_slaves,
664 @@ -3231,7 +3281,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
665 .main_clk = "mcpdm_fck",
666 .prcm = {
667 .omap4 = {
668 - .clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL,
669 + .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET,
670 },
671 },
672 .slaves = omap44xx_mcpdm_slaves,
673 @@ -3317,7 +3367,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
674 .main_clk = "mcspi1_fck",
675 .prcm = {
676 .omap4 = {
677 - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI1_CLKCTRL,
678 + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET,
679 },
680 },
681 .dev_attr = &mcspi1_dev_attr,
682 @@ -3378,7 +3428,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
683 .main_clk = "mcspi2_fck",
684 .prcm = {
685 .omap4 = {
686 - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI2_CLKCTRL,
687 + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET,
688 },
689 },
690 .dev_attr = &mcspi2_dev_attr,
691 @@ -3439,7 +3489,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
692 .main_clk = "mcspi3_fck",
693 .prcm = {
694 .omap4 = {
695 - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI3_CLKCTRL,
696 + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET,
697 },
698 },
699 .dev_attr = &mcspi3_dev_attr,
700 @@ -3498,7 +3548,7 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = {
701 .main_clk = "mcspi4_fck",
702 .prcm = {
703 .omap4 = {
704 - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI4_CLKCTRL,
705 + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET,
706 },
707 },
708 .dev_attr = &mcspi4_dev_attr,
709 @@ -3583,7 +3633,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
710 .main_clk = "mmc1_fck",
711 .prcm = {
712 .omap4 = {
713 - .clkctrl_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL,
714 + .clkctrl_offs = OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET,
715 },
716 },
717 .dev_attr = &mmc1_dev_attr,
718 @@ -3643,7 +3693,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
719 .main_clk = "mmc2_fck",
720 .prcm = {
721 .omap4 = {
722 - .clkctrl_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL,
723 + .clkctrl_offs = OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET,
724 },
725 },
726 .slaves = omap44xx_mmc2_slaves,
727 @@ -3698,7 +3748,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
728 .main_clk = "mmc3_fck",
729 .prcm = {
730 .omap4 = {
731 - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL,
732 + .clkctrl_offs = OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET,
733 },
734 },
735 .slaves = omap44xx_mmc3_slaves,
736 @@ -3752,7 +3802,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
737 .main_clk = "mmc4_fck",
738 .prcm = {
739 .omap4 = {
740 - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL,
741 + .clkctrl_offs = OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET,
742 },
743 },
744 .slaves = omap44xx_mmc4_slaves,
745 @@ -3805,7 +3855,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = {
746 .main_clk = "mmc5_fck",
747 .prcm = {
748 .omap4 = {
749 - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL,
750 + .clkctrl_offs = OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET,
751 },
752 },
753 .slaves = omap44xx_mmc5_slaves,
754 @@ -3846,7 +3896,7 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
755 .main_clk = "dpll_mpu_m2_ck",
756 .prcm = {
757 .omap4 = {
758 - .clkctrl_reg = OMAP4430_CM_MPU_MPU_CLKCTRL,
759 + .clkctrl_offs = OMAP4_CM_MPU_MPU_CLKCTRL_OFFSET,
760 },
761 },
762 .masters = omap44xx_mpu_masters,
763 @@ -3920,7 +3970,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
764 .vdd_name = "core",
765 .prcm = {
766 .omap4 = {
767 - .clkctrl_reg = OMAP4430_CM_ALWON_SR_CORE_CLKCTRL,
768 + .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET,
769 },
770 },
771 .slaves = omap44xx_smartreflex_core_slaves,
772 @@ -3967,7 +4017,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
773 .vdd_name = "iva",
774 .prcm = {
775 .omap4 = {
776 - .clkctrl_reg = OMAP4430_CM_ALWON_SR_IVA_CLKCTRL,
777 + .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET,
778 },
779 },
780 .slaves = omap44xx_smartreflex_iva_slaves,
781 @@ -4014,7 +4064,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
782 .vdd_name = "mpu",
783 .prcm = {
784 .omap4 = {
785 - .clkctrl_reg = OMAP4430_CM_ALWON_SR_MPU_CLKCTRL,
786 + .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET,
787 },
788 },
789 .slaves = omap44xx_smartreflex_mpu_slaves,
790 @@ -4076,7 +4126,7 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = {
791 .clkdm_name = "l4_cfg_clkdm",
792 .prcm = {
793 .omap4 = {
794 - .clkctrl_reg = OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL,
795 + .clkctrl_offs = OMAP4_CM_L4CFG_HW_SEM_CLKCTRL_OFFSET,
796 },
797 },
798 .slaves = omap44xx_spinlock_slaves,
799 @@ -4160,7 +4210,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
800 .main_clk = "timer1_fck",
801 .prcm = {
802 .omap4 = {
803 - .clkctrl_reg = OMAP4430_CM_WKUP_TIMER1_CLKCTRL,
804 + .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET,
805 },
806 },
807 .slaves = omap44xx_timer1_slaves,
808 @@ -4206,7 +4256,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
809 .main_clk = "timer2_fck",
810 .prcm = {
811 .omap4 = {
812 - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL,
813 + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET,
814 },
815 },
816 .slaves = omap44xx_timer2_slaves,
817 @@ -4252,7 +4302,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {
818 .main_clk = "timer3_fck",
819 .prcm = {
820 .omap4 = {
821 - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL,
822 + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET,
823 },
824 },
825 .slaves = omap44xx_timer3_slaves,
826 @@ -4298,7 +4348,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {
827 .main_clk = "timer4_fck",
828 .prcm = {
829 .omap4 = {
830 - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL,
831 + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET,
832 },
833 },
834 .slaves = omap44xx_timer4_slaves,
835 @@ -4363,7 +4413,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
836 .main_clk = "timer5_fck",
837 .prcm = {
838 .omap4 = {
839 - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER5_CLKCTRL,
840 + .clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET,
841 },
842 },
843 .slaves = omap44xx_timer5_slaves,
844 @@ -4429,7 +4479,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
845 .main_clk = "timer6_fck",
846 .prcm = {
847 .omap4 = {
848 - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER6_CLKCTRL,
849 + .clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET,
850 },
851 },
852 .slaves = omap44xx_timer6_slaves,
853 @@ -4494,7 +4544,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
854 .main_clk = "timer7_fck",
855 .prcm = {
856 .omap4 = {
857 - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER7_CLKCTRL,
858 + .clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET,
859 },
860 },
861 .slaves = omap44xx_timer7_slaves,
862 @@ -4559,7 +4609,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
863 .main_clk = "timer8_fck",
864 .prcm = {
865 .omap4 = {
866 - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER8_CLKCTRL,
867 + .clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET,
868 },
869 },
870 .slaves = omap44xx_timer8_slaves,
871 @@ -4605,7 +4655,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {
872 .main_clk = "timer9_fck",
873 .prcm = {
874 .omap4 = {
875 - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL,
876 + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET,
877 },
878 },
879 .slaves = omap44xx_timer9_slaves,
880 @@ -4651,7 +4701,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
881 .main_clk = "timer10_fck",
882 .prcm = {
883 .omap4 = {
884 - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL,
885 + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET,
886 },
887 },
888 .slaves = omap44xx_timer10_slaves,
889 @@ -4697,7 +4747,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = {
890 .main_clk = "timer11_fck",
891 .prcm = {
892 .omap4 = {
893 - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL,
894 + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET,
895 },
896 },
897 .slaves = omap44xx_timer11_slaves,
898 @@ -4772,7 +4822,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
899 .main_clk = "uart1_fck",
900 .prcm = {
901 .omap4 = {
902 - .clkctrl_reg = OMAP4430_CM_L4PER_UART1_CLKCTRL,
903 + .clkctrl_offs = OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET,
904 },
905 },
906 .slaves = omap44xx_uart1_slaves,
907 @@ -4825,7 +4875,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
908 .main_clk = "uart2_fck",
909 .prcm = {
910 .omap4 = {
911 - .clkctrl_reg = OMAP4430_CM_L4PER_UART2_CLKCTRL,
912 + .clkctrl_offs = OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET,
913 },
914 },
915 .slaves = omap44xx_uart2_slaves,
916 @@ -4879,7 +4929,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
917 .main_clk = "uart3_fck",
918 .prcm = {
919 .omap4 = {
920 - .clkctrl_reg = OMAP4430_CM_L4PER_UART3_CLKCTRL,
921 + .clkctrl_offs = OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET,
922 },
923 },
924 .slaves = omap44xx_uart3_slaves,
925 @@ -4932,7 +4982,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
926 .main_clk = "uart4_fck",
927 .prcm = {
928 .omap4 = {
929 - .clkctrl_reg = OMAP4430_CM_L4PER_UART4_CLKCTRL,
930 + .clkctrl_offs = OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET,
931 },
932 },
933 .slaves = omap44xx_uart4_slaves,
934 @@ -5011,7 +5061,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {
935 .main_clk = "usb_otg_hs_ick",
936 .prcm = {
937 .omap4 = {
938 - .clkctrl_reg = OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL,
939 + .clkctrl_offs = OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET,
940 },
941 },
942 .opt_clks = usb_otg_hs_opt_clks,
943 @@ -5084,7 +5134,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
944 .main_clk = "wd_timer2_fck",
945 .prcm = {
946 .omap4 = {
947 - .clkctrl_reg = OMAP4430_CM_WKUP_WDT2_CLKCTRL,
948 + .clkctrl_offs = OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET,
949 },
950 },
951 .slaves = omap44xx_wd_timer2_slaves,
952 @@ -5149,7 +5199,7 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
953 .main_clk = "wd_timer3_fck",
954 .prcm = {
955 .omap4 = {
956 - .clkctrl_reg = OMAP4430_CM1_ABE_WDT3_CLKCTRL,
957 + .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET,
958 },
959 },
960 .slaves = omap44xx_wd_timer3_slaves,
961 diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
962 index 3306bdf..fc54355 100644
963 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
964 +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
965 @@ -360,7 +360,7 @@ struct omap_hwmod_omap2_prcm {
966 * @submodule_wkdep_bit: bit shift of the WKDEP range
967 */
968 struct omap_hwmod_omap4_prcm {
969 - void __iomem *clkctrl_reg;
970 + u16 clkctrl_offs;
971 void __iomem *rstctrl_reg;
972 u8 submodule_wkdep_bit;
973 };
974 --
975 1.6.6.1