[glsdk/meta-ti-glsdk.git] / recipes-kernel / linux / linux-am335x-psp-3.2 / 0002-crypto-omap4-sham-Use-finer-grained-PM-management.patch
1 From 0c910915e0b14538e4a539a26a1c632d29ed7131 Mon Sep 17 00:00:00 2001
2 From: "Mark A. Greer" <mgreer@animalcreek.com>
3 Date: Tue, 11 Dec 2012 09:40:05 -0700
4 Subject: [PATCH 02/10] crypto: omap4-sham: Use finer-grained PM management
6 Currently, the pm_runtime calls in omap4-sham enable
7 things when the driver is probed and leave them enabled
8 until the driver is removed. To fix this, move the
9 pm_runtime calls to only enable the sham module when
10 its actually in use.
12 Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
13 ---
14 drivers/crypto/omap4-sham.c | 23 ++++++++---------------
15 1 file changed, 8 insertions(+), 15 deletions(-)
17 diff --git a/drivers/crypto/omap4-sham.c b/drivers/crypto/omap4-sham.c
18 index 2fb71b9..6985c87 100644
19 --- a/drivers/crypto/omap4-sham.c
20 +++ b/drivers/crypto/omap4-sham.c
21 @@ -138,7 +138,6 @@ struct omap4_sham_dev {
22 struct device *dev;
23 void __iomem *io_base;
24 int irq;
25 - struct clk *iclk;
26 spinlock_t lock;
27 int err;
28 int dma;
29 @@ -701,6 +700,8 @@ static void omap4_sham_finish_req(struct ahash_request *req, int err)
30 dd->dflags &= ~(BIT(FLAGS_BUSY) | BIT(FLAGS_FINAL) | BIT(FLAGS_CPU) |
31 BIT(FLAGS_DMA_READY) | BIT(FLAGS_OUTPUT_READY));
33 + pm_runtime_put_sync(dd->dev);
34 +
35 if (req->base.complete)
36 req->base.complete(&req->base, err);
38 @@ -742,6 +743,8 @@ static int omap4_sham_handle_queue(struct omap4_sham_dev *dd,
39 dev_dbg(dd->dev, "handling new req, op: %lu, nbytes: %d\n",
40 ctx->op, req->nbytes);
42 + pm_runtime_get_sync(dd->dev);
43 +
44 if (!test_bit(FLAGS_INIT, &dd->dflags)) {
45 set_bit(FLAGS_INIT, &dd->dflags);
46 dd->err = 0;
47 @@ -1306,11 +1309,6 @@ static int __devinit omap4_sham_probe(struct platform_device *pdev)
48 if (err)
49 goto dma_err;
51 - pm_runtime_enable(dev);
52 - udelay(1);
53 - pm_runtime_get_sync(dev);
54 - udelay(1);
55 -
56 dd->io_base = ioremap(dd->phys_base, SZ_4K);
57 if (!dd->io_base) {
58 dev_err(dev, "can't ioremap\n");
59 @@ -1318,7 +1316,11 @@ static int __devinit omap4_sham_probe(struct platform_device *pdev)
60 goto io_err;
61 }
63 +
64 + pm_runtime_enable(dev);
65 + pm_runtime_get_sync(dev);
66 reg = omap4_sham_read(dd, SHA_REG_REV);
67 + pm_runtime_put_sync(&pdev->dev);
69 dev_info(dev, "AM33X SHA/MD5 hw accel rev: %u.%02u\n",
70 (reg & SHA_REG_REV_X_MAJOR_MASK) >> 8, reg & SHA_REG_REV_Y_MINOR_MASK);
71 @@ -1342,13 +1344,7 @@ err_algs:
72 crypto_unregister_ahash(&algs[j]);
73 iounmap(dd->io_base);
74 io_err:
75 - pm_runtime_put_sync(dev);
76 - udelay(1);
77 pm_runtime_disable(dev);
78 - udelay(1);
79 -
80 -//clk_err:
81 -// omap4_sham_dma_cleanup(dd);
83 dma_err:
84 if (dd->irq >= 0)
85 @@ -1377,10 +1373,7 @@ static int __devexit omap4_sham_remove(struct platform_device *pdev)
86 crypto_unregister_ahash(&algs[i]);
87 tasklet_kill(&dd->done_task);
88 iounmap(dd->io_base);
89 - pm_runtime_put_sync(&pdev->dev);
90 - udelay(1);
91 pm_runtime_disable(&pdev->dev);
92 - udelay(1);
94 omap4_sham_dma_cleanup(dd);
95 if (dd->irq >= 0)
96 --
97 1.7.12