| author | Sukumar Ghorai <s-ghorai@ti.com> | |
| Thu, 17 Dec 2009 22:07:14 +0000 (16:07 -0600) | ||
| committer | Vikram Pandita <vikram.pandita@ti.com> | |
| Fri, 18 Dec 2009 14:30:38 +0000 (08:30 -0600) | ||
| commit | 9c58aa0ebbe49373c12c94d98093122c56a2e6bb | |
| tree | 249506001e88c9c6928ed427dc8855aa91039904 | tree | snapshot (tar.xz tar.gz zip) |
| parent | ae686a2a1f3ce26d232a39e6af41ae6d100fe647 | commit | diff |
DPLL4 locked at 864MHZ for OMAP3630Zoom3
Default u-boot locked DPLL4 @1728MHz and changed to 864MHz.
With dpll4 locked at 1728, due to hw limitation,
we cannot set M3 value as 32 to get dpll4_M3 [TV out]
as 54 MHz. The hw limitation is the register width.
Therefore, we are locking dpll4 at 864 to get TV OUT
(dpll4 M3) to 54 MHz by using a clock divider [M3 value]
of 16.
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: Christina Warren <cawarren@ti.com>
Default u-boot locked DPLL4 @1728MHz and changed to 864MHz.
With dpll4 locked at 1728, due to hw limitation,
we cannot set M3 value as 32 to get dpll4_M3 [TV out]
as 54 MHz. The hw limitation is the register width.
Therefore, we are locking dpll4 at 864 to get TV OUT
(dpll4 M3) to 54 MHz by using a clock divider [M3 value]
of 16.
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: Christina Warren <cawarren@ti.com>
| include/configs/omap3630zoom3.h | diff | blob | history |