diff --git a/Basic-Test-Package/MSP432/Test_MSP432_3wSPI_M25P40/I3MSP432P401R.cmd b/Basic-Test-Package/MSP432/Test_MSP432_3wSPI_M25P40/I3MSP432P401R.cmd
--- /dev/null
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2015-2016, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * ======== MSP_EXP432P401R.cmd ========
+ * Define the memory block start/length for the MSP_EXP432P401R M4
+ */
+
+MEMORY
+{
+ MAIN (RX) : origin = 0x00000000, length = 0x00040000
+ INFO (RX) : origin = 0x00200000, length = 0x00004000
+ SRAM_CODE (RWX): origin = 0x01000000, length = 0x00010000
+ SRAM_DATA (RW) : origin = 0x20000000, length = 0x00010000
+}
+
+/* Section allocation in memory */
+
+SECTIONS
+{
+ .text : > MAIN
+ .const : > MAIN
+ .cinit : > MAIN
+ .pinit : > MAIN
+
+#ifdef __TI_COMPILER_VERSION__
+#if __TI_COMPILER_VERSION__ >= 15009000
+ .TI.ramfunc : {} load=MAIN, run=SRAM_CODE, table(BINIT)
+#endif
+#endif
+ .data : > SRAM_DATA
+ .bss : > SRAM_DATA
+ .sysmem : > SRAM_DATA
+ .stack : > SRAM_DATA (HIGH)
+}
+
+/* Symbolic definition of the WDTCTL register for RTS */
+WDTCTL_SYM = 0x4000480C;