f2bea45df2b344508bec40b4a7c5d42dd28089a3
1 /*
2 * Copyright (c) 2013-2014, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
33 var nameList = "";
34 switch (Program.cpu.deviceName) {
35 case "TMS320TCI6614":
36 case "TMS320TCI6630K2L":
37 nameList = ["CORE0", "CORE1", "CORE2", "CORE3"];
38 break;
40 case "Kepler":
41 case "TMS320TCI6636":
42 case "TMS320TCI6638":
43 nameList = ["CORE0", "CORE1", "CORE2", "CORE3", "CORE4", "CORE5",
44 "CORE6", "CORE7"];
45 break;
47 default:
48 throw("Device " + Program.cpu.deviceName +
49 " not supported by this example");
50 break;
51 }
53 /*
54 * Since this is a single-image example, we don't know (at build-time) which
55 * processor we're building for. We therefore supply 'null'
56 * as the local procName and allow IPC to set the local procId at runtime.
57 */
58 var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
59 MultiProc.setConfig(null, nameList);
61 var System = xdc.useModule('xdc.runtime.System');
63 /* Modules explicitly used in the application */
64 var MessageQ = xdc.useModule('ti.sdo.ipc.MessageQ');
65 var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');
66 var HeapBufMP = xdc.useModule('ti.sdo.ipc.heaps.HeapBufMP');
68 /* BIOS/XDC modules */
69 var BIOS = xdc.useModule('ti.sysbios.BIOS');
70 BIOS.heapSize = 0x8000;
71 var Task = xdc.useModule('ti.sysbios.knl.Task');
73 var tsk0 = Task.create('&tsk0_func');
74 tsk0.instance.name = "tsk0";
76 /* Synchronize all processors (this will be done in Ipc_start) */
77 Ipc.procSync = Ipc.ProcSync_ALL;
79 /* Shared Memory base address and length */
80 var SHAREDMEM = 0x0C000000;
81 var SHAREDMEMSIZE = 0x00200000;
83 /*
84 * Need to define the shared region. The IPC modules use this
85 * to make portable pointers. All processors need to add this
86 * call with their base address of the shared memory region.
87 * If the processor cannot access the memory, do not add it.
88 */
89 var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
90 SharedRegion.setEntryMeta(0,
91 { base: SHAREDMEM,
92 len: SHAREDMEMSIZE,
93 ownerProcId: 0,
94 isValid: true,
95 name: "DDR2 RAM",
96 });
98 /* Taken from messageq_common.cfg: */
99 var SysMin = xdc.useModule('xdc.runtime.SysMin');
100 System.SupportProxy = SysMin;
101 Program.global.sysMinBufSize = 0x8000;
102 SysMin.bufSize = Program.global.sysMinBufSize;
104 Program.sectMap[".text:_c_int00"] = new Program.SectionSpec();
105 Program.sectMap[".text:_c_int00"].loadSegment = "L2SRAM";
106 Program.sectMap[".text:_c_int00"].loadAlign = 0x400;
108 /* BIOS Resource Table: */
109 Program.sectMap[".resource_table"] = new Program.SectionSpec();
110 Program.sectMap[".resource_table"].type = "NOINIT";
111 Program.sectMap[".resource_table"] = "L2SRAM";
113 /* Get the trace buffer to show up! */
114 var Idle = xdc.useModule('ti.sysbios.knl.Idle');
115 Idle.addFunc('&traceBuf_cacheWb');