[ipc/ipcdev.git] / qnx / src / ipc3x_dev / ti / syslink / family / common / ti81xx / ti81xxdsp / Dm8168DspHalReset.c
1 /*
2 * @file Dm8168DspHalReset.c
3 *
4 * @brief Reset control module.
5 *
6 * This module is responsible for handling reset-related hardware-
7 * specific operations.
8 * The implementation is specific to DM8168DSP.
9 *
10 *
11 * ============================================================================
12 *
13 * Copyright (c) 2008-2012, Texas Instruments Incorporated
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 *
19 * * Redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer.
21 *
22 * * Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution.
25 *
26 * * Neither the name of Texas Instruments Incorporated nor the names of
27 * its contributors may be used to endorse or promote products derived
28 * from this software without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
31 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
32 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
34 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
35 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
36 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
37 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
38 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
39 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
40 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 * Contact information for paper mail:
42 * Texas Instruments
43 * Post Office Box 655303
44 * Dallas, Texas 75265
45 * Contact information:
46 * http://www-k.ext.ti.com/sc/technical-support/product-information-centers.htm?
47 * DCMP=TIHomeTracking&HQS=Other+OT+home_d_contact
48 * ============================================================================
49 *
50 */
54 #if defined(SYSLINK_BUILD_RTOS)
55 #include <xdc/std.h>
56 #include <xdc/runtime/Error.h>
57 #endif /* #if defined(SYSLINK_BUILD_RTOS) */
59 #if defined(SYSLINK_BUILD_HLOS)
60 #include <ti/syslink/Std.h>
61 #endif /* #if defined(SYSLINK_BUILD_HLOS) */
63 #include <ti/syslink/utils/Trace.h>
66 #include <Bitops.h>
67 /* Module level headers */
68 #include <_ProcDefs.h>
69 #include <Processor.h>
71 /* Hardware Abstraction Layer headers */
72 #include <Dm8168DspHal.h>
73 #include <Dm8168DspHalReset.h>
76 #if defined (__cplusplus)
77 extern "C" {
78 #endif
81 /* =============================================================================
82 * Macros and types
83 * =============================================================================
84 */
85 /*!
86 * @brief PRM address for GEM
87 */
88 #define CM_GEM_CLKSTCTRL 0x400
89 /*!
90 * @brief Clock mgmt for GEM
91 */
92 #define CM_ACTIVE_GEM_CLKCTRL 0x420
93 /*!
94 * @brief Reset control for GEM
95 */
96 #define RM_ACTIVE_RSTCTRL 0xA10
97 /*!
98 * @brief Reset status for GEM
99 */
100 #define RM_ACTIVE_RSTST 0xA14
102 /* =============================================================================
103 * APIs called by DM8168DSPPROC module
104 * =============================================================================
105 */
106 /*!
107 * @brief Function to control reset operations
108 *
109 * @param halObj Pointer to the HAL object
110 * @param cmd Reset control command
111 * @param arg Arguments specific to the reset control command
112 *
113 * @sa
114 */
115 Int
116 Dm8168DspHal_reset(Ptr halObj, Dm8168DspHal_ResetCmd cmd)
117 {
118 Int status = PROCESSOR_SUCCESS;
119 DM8168DSP_HalObject * halObject;
120 UInt32 prcmBase;
121 UInt32 addr;
122 UInt32 val;
124 GT_2trace(curTrace, GT_ENTER, "--> Dm8168DspHal_reset", halObj, cmd);
126 GT_assert(curTrace, (halObj != NULL));
127 GT_assert(curTrace, (cmd < Dm8168DspHal_Reset_EndValue));
129 halObject = (DM8168DSP_HalObject *)halObj;
130 prcmBase = halObject->prcmBase;
132 switch (cmd) {
133 case Dm8168DspHal_Reset_Attach:
134 {
135 /* assert GEM global and cpu resets */
136 addr = prcmBase + RM_ACTIVE_RSTCTRL;
137 REG(addr) = 0x3;
139 /* clear status bit, write-1 to clear bit */
140 addr = prcmBase + RM_ACTIVE_RSTST;
141 REG(addr) = 0x2;
143 /* release GEM global reset */
144 addr = prcmBase + RM_ACTIVE_RSTCTRL;
145 val = REG(addr);
146 val &= ~(0x2);
147 REG(addr) = val;
149 /* wait for reset done flag */
150 addr = prcmBase + RM_ACTIVE_RSTST;
151 do {
152 val = REG(addr);
153 val &= 0x2;
154 } while(val != 0x2);
155 }
156 break;
158 case Dm8168DspHal_Reset_Start:
159 {
160 /* clear status bit, write-1 to clear bit */
161 addr = prcmBase + RM_ACTIVE_RSTST;
162 REG(addr) = 1;
164 /* release cpu reset (and global to ensure proper boot) */
165 addr = prcmBase + RM_ACTIVE_RSTCTRL;
166 REG(addr) = 0;
168 /* wait for reset done flag */
169 addr = prcmBase + RM_ACTIVE_RSTST;
170 do {
171 val = REG(addr);
172 val &= 0x1;
173 } while(val != 0x1);
174 }
175 break;
177 case Dm8168DspHal_Reset_Stop:
178 {
179 /* assert only cpu reset */
180 addr = prcmBase + RM_ACTIVE_RSTCTRL;
181 REG(addr) = 0x1;
182 }
183 break;
185 case Dm8168DspHal_Reset_Detach:
186 {
187 /* assert both GEM global and cpu resets */
188 addr = prcmBase + RM_ACTIVE_RSTCTRL;
189 REG(addr) = 0x3;
190 }
191 break;
193 default:
194 {
195 /*! @retval PROCESSOR_E_INVALIDARG Invalid argument */
196 status = PROCESSOR_E_INVALIDARG;
197 GT_setFailureReason(curTrace, GT_4CLASS,
198 "DM8168DSP_halResetCtrl", status,
199 "Unsupported reset ctrl cmd specified");
200 }
201 break;
202 }
204 GT_1trace(curTrace, GT_LEAVE, "<-- Dm8168DspHal_reset", status);
206 /*! @retval PROCESSOR_SUCCESS Operation successful */
207 return status;
208 }
211 #if defined (__cplusplus)
212 }
213 #endif