0d23ed7a416fbbeedd7254d4e9016a5f10816043
[ipc/ipcdev.git] / qnx / src / ipc3x_dev / ti / syslink / family / common / vayu / vayuipu / VAYUIpuPhyShmem.c
1 /*
2 * @file VAYUIpuPhyShmem.c
3 *
4 * @brief Shared memory physical interface file for VAYUIPU.
5 *
6 * This module is responsible for handling boot-related hardware-
7 * specific operations.
8 * The implementation is specific to VAYUIPU.
9 *
10 *
11 * ============================================================================
12 *
13 * Copyright (c) 2013, Texas Instruments Incorporated
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 *
19 * * Redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer.
21 *
22 * * Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution.
25 *
26 * * Neither the name of Texas Instruments Incorporated nor the names of
27 * its contributors may be used to endorse or promote products derived
28 * from this software without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
31 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
32 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
34 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
35 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
36 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
37 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
38 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
39 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
40 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 * Contact information for paper mail:
42 * Texas Instruments
43 * Post Office Box 655303
44 * Dallas, Texas 75265
45 * Contact information:
46 * http://www-k.ext.ti.com/sc/technical-support/product-information-centers.htm?
47 * DCMP=TIHomeTracking&HQS=Other+OT+home_d_contact
48 * ============================================================================
49 *
50 */
54 /* Standard headers */
55 #include <ti/syslink/Std.h>
57 /* OSAL and utils */
58 #include <ti/syslink/utils/Memory.h>
60 #include <ti/syslink/utils/Trace.h>
62 /* Module headers */
63 #include <_ProcDefs.h>
64 #include <Processor.h>
67 /* Hardware Abstraction Layer headers */
68 #include <VAYUIpuHal.h>
69 #include <VAYUIpuHalBoot.h>
70 #include <VAYUIpuPhyShmem.h>
71 #include <VAYUIpuHalMmu.h>
74 #if defined (__cplusplus)
75 extern "C" {
76 #endif
79 /* =============================================================================
80 * Macros and types
81 * =============================================================================
82 */
85 /* =============================================================================
86 * APIs called by VAYUIPUPROC module
87 * =============================================================================
88 */
89 /*!
90 * @brief Function to initialize Shared Driver/device.
91 *
92 * @param halObj Pointer to the HAL object
93 *
94 * @sa VAYUIPU_phyShmemExit
95 * Memory_map
96 */
97 Int
98 VAYUIPU_phyShmemInit (Ptr halObj)
99 {
100 Int status = PROCESSOR_SUCCESS;
101 VAYUIPU_HalObject * halObject = NULL;
102 Memory_MapInfo mapInfo;
104 GT_1trace (curTrace, GT_ENTER, "VAYUIPU_phyShmemInit", halObj);
106 GT_assert (curTrace, (halObj != NULL));
108 halObject = (VAYUIPU_HalObject *) halObj;
110 mapInfo.src = CM_BASE_ADDR;
111 mapInfo.size = CM_SIZE;
112 mapInfo.isCached = FALSE;
113 status = Memory_map (&mapInfo);
114 if (status < 0) {
115 GT_setFailureReason (curTrace,
116 GT_4CLASS,
117 "VAYUIPU_phyShmemInit",
118 status,
119 "Failure in Memory_map for MMU base registers");
120 halObject->cmBase = 0;
121 }
122 else {
123 halObject->cmBase = mapInfo.dst;
124 }
126 mapInfo.src = PRCM_BASE_ADDR;
127 mapInfo.size = PRCM_SIZE;
128 mapInfo.isCached = FALSE;
129 status = Memory_map (&mapInfo);
130 if (status < 0) {
131 GT_setFailureReason (curTrace,
132 GT_4CLASS,
133 "VAYUIPU_phyShmemInit",
134 status,
135 "Failure in Memory_map for MMU base registers");
136 halObject->prmBase = 0;
137 }
138 else {
139 halObject->prmBase = mapInfo.dst;
140 }
142 mapInfo.src = MMU_BASE;
143 mapInfo.size = MMU_SIZE;
144 mapInfo.isCached = FALSE;
145 status = Memory_map (&mapInfo);
146 if (status < 0) {
147 GT_setFailureReason (curTrace,
148 GT_4CLASS,
149 "VAYUIPU_phyShmemInit",
150 status,
151 "Failure in Memory_map for MMU base registers");
152 halObject->mmuBase = 0;
153 }
154 else {
155 halObject->mmuBase = mapInfo.dst;
156 }
158 mapInfo.src = CTRL_MODULE_BASE;
159 mapInfo.size = CTRL_MODULE_SIZE;
160 mapInfo.isCached = FALSE;
161 status = Memory_map (&mapInfo);
162 if (status < 0) {
163 GT_setFailureReason (curTrace,
164 GT_4CLASS,
165 "VAYUIPU_phyShmemInit",
166 status,
167 "Failure in Memory_map for Ctrl Module base registers");
168 halObject->ctrlModBase = 0;
169 }
170 else {
171 halObject->ctrlModBase = mapInfo.dst;
172 }
174 GT_1trace (curTrace, GT_LEAVE, "VAYUIPU_phyShmemInit", status);
176 /*! @retval PROCESSOR_SUCCESS Operation successful */
177 return status;
178 }
181 /*!
182 * @brief Function to finalize Shared Driver/device.
183 *
184 * @param halObj Pointer to the HAL object
185 *
186 * @sa VAYUIPU_phyShmemInit
187 * Memory_Unmap
188 */
189 Int
190 VAYUIPU_phyShmemExit (Ptr halObj)
191 {
192 Int status = PROCESSOR_SUCCESS;
193 VAYUIPU_HalObject * halObject = NULL;
194 Memory_UnmapInfo unmapInfo;
196 GT_1trace (curTrace, GT_ENTER, "VAYUIPU_phyShmemExit", halObj);
198 GT_assert (curTrace, (halObj != NULL));
200 halObject = (VAYUIPU_HalObject *) halObj;
202 unmapInfo.addr = halObject->ctrlModBase;
203 unmapInfo.size = CTRL_MODULE_SIZE;
204 unmapInfo.isCached = FALSE;
205 if (unmapInfo.addr != 0) {
206 status = Memory_unmap (&unmapInfo);
207 if (status < 0) {
208 GT_setFailureReason (curTrace,
209 GT_4CLASS,
210 "VAYUIPU_phyShmemExit",
211 status,
212 "Failure in Memory_Unmap for Ctrl Module base registers");
213 }
214 halObject->ctrlModBase = 0 ;
215 }
217 unmapInfo.addr = halObject->mmuBase;
218 unmapInfo.size = MMU_SIZE;
219 unmapInfo.isCached = FALSE;
220 if (unmapInfo.addr != 0) {
221 status = Memory_unmap (&unmapInfo);
222 if (status < 0) {
223 GT_setFailureReason (curTrace,
224 GT_4CLASS,
225 "VAYUIPU_phyShmemExit",
226 status,
227 "Failure in Memory_Unmap for MMU base registers");
228 }
229 halObject->mmuBase = 0 ;
230 }
232 unmapInfo.addr = halObject->cmBase;
233 unmapInfo.size = CM_SIZE;
234 unmapInfo.isCached = FALSE;
235 if (unmapInfo.addr != 0) {
236 status = Memory_unmap (&unmapInfo);
237 if (status < 0) {
238 GT_setFailureReason (curTrace,
239 GT_4CLASS,
240 "VAYUIPU_phyShmemExit",
241 status,
242 "Failure in Memory_Unmap for CM base registers");
243 }
244 halObject->cmBase = 0 ;
245 }
247 unmapInfo.addr = halObject->prmBase;
248 unmapInfo.size = PRCM_SIZE;
249 unmapInfo.isCached = FALSE;
250 if (unmapInfo.addr != 0) {
251 status = Memory_unmap (&unmapInfo);
252 if (status < 0) {
253 GT_setFailureReason (curTrace,
254 GT_4CLASS,
255 "VAYUIPU_phyShmemExit",
256 status,
257 "Failure in Memory_Unmap for PRCM base registers");
258 }
259 halObject->prmBase = 0 ;
260 }
262 GT_1trace (curTrace, GT_LEAVE, "VAYUIPU_phyShmemExit",status);
264 /*! @retval PROCESSOR_SUCCESS Operation successful */
265 return status;
266 }
269 #if defined (__cplusplus)
271 }
272 #endif