89eb6739bb7220a81a475801a277bcf1b2b0b37d
1 /*
2 * Copyright (c) 2013, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * */
33 switch (Program.platformName) {
34 case "ti.platforms.evm6614:DSP":
35 var nameList = ["CORE0", "CORE1", "CORE2", "CORE3"];
36 break;
37 case "ti.platforms.simKepler":
38 var nameList = ["CORE0", "CORE1", "CORE2", "CORE3",
39 "CORE4", "CORE5", "CORE6", "CORE7"];
40 break;
41 default:
42 throw("Platform " + Program.platformName + " not supported by this example");
43 break;
44 }
46 /*
47 * Since this is a single-image example, we don't know (at build-time) which
48 * processor we're building for. We therefore supply 'null'
49 * as the local procName and allow IPC to set the local procId at runtime.
50 */
51 var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
52 MultiProc.setConfig(null, nameList);
54 var System = xdc.useModule('xdc.runtime.System');
56 /* Modules explicitly used in the application */
57 var MessageQ = xdc.useModule('ti.sdo.ipc.MessageQ');
58 var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');
59 var HeapBufMP = xdc.useModule('ti.sdo.ipc.heaps.HeapBufMP');
60 var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
62 /* BIOS/XDC modules */
63 var BIOS = xdc.useModule('ti.sysbios.BIOS');
64 BIOS.heapSize = 0x8000;
65 var Task = xdc.useModule('ti.sysbios.knl.Task');
67 var tsk0 = Task.create('&tsk0_func');
68 tsk0.instance.name = "tsk0";
70 /* Synchronize all processors (this will be done in Ipc_start) */
71 Ipc.procSync = Ipc.ProcSync_ALL;
73 /* Shared Memory base address and length */
74 var SHAREDMEM = 0x0C000000;
75 var SHAREDMEMSIZE = 0x00200000;
77 /*
78 * Need to define the shared region. The IPC modules use this
79 * to make portable pointers. All processors need to add this
80 * call with their base address of the shared memory region.
81 * If the processor cannot access the memory, do not add it.
82 */
83 var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
84 SharedRegion.setEntryMeta(0,
85 { base: SHAREDMEM,
86 len: SHAREDMEMSIZE,
87 ownerProcId: 0,
88 isValid: true,
89 name: "DDR2 RAM",
90 });
92 /* Taken from messageq_common.cfg: */
93 var SysMin = xdc.useModule('xdc.runtime.SysMin');
94 System.SupportProxy = SysMin;
95 Program.global.sysMinBufSize = 0x8000;
96 SysMin.bufSize = Program.global.sysMinBufSize;
98 Program.sectMap[".text:_c_int00"] = new Program.SectionSpec();
99 Program.sectMap[".text:_c_int00"].loadSegment = "L2SRAM";
100 Program.sectMap[".text:_c_int00"].loadAlign = 0x400;
102 /* BIOS Resource Table: */
103 Program.sectMap[".resource_table"] = new Program.SectionSpec();
104 Program.sectMap[".resource_table"].type = "NOINIT";
105 Program.sectMap[".resource_table"] = "L2SRAM";
107 /* Get the trace buffer to show up! */
108 var Idle = xdc.useModule('ti.sysbios.knl.Idle');
109 Idle.addFunc('&traceBuf_cacheWb');