; ; Copyright (c) 2015, Texas Instruments Incorporated ; All rights reserved. ; ; Redistribution and use in source and binary forms, with or without ; modification, are permitted provided that the following conditions ; are met: ; ; * Redistributions of source code must retain the above copyright ; notice, this list of conditions and the following disclaimer. ; ; * Redistributions in binary form must reproduce the above copyright ; notice, this list of conditions and the following disclaimer in the ; documentation and/or other materials provided with the distribution. ; ; * Neither the name of Texas Instruments Incorporated nor the names of ; its contributors may be used to endorse or promote products derived ; from this software without specific prior written permission. ; ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; ; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, ; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR ; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, ; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ; ; ; ======== IpcPowerDsp_idle_dra7xx.s66 ======== ; ; .if $isdefed("__TI_ELFABI__") .if __TI_ELFABI__ .asg IpcPower_callIdle, _IpcPower_callIdle .endif .endif .global _IpcPower_callIdle .align 4 ; ; ======== IpcPower_callIdle ======== ; ; IpcPower_callIdle() ; .sect ".text:IpcPower_callIdle" .clink _IpcPower_callIdle: .asmfunc .nocmp ; must enter this function with interrupts disabled ; Workaround: invalidate prefetch buffer in the xmc mfence mvk 0x0300,b5 mvkh 0x8000000,b5 || mvk 1,b4 stw b4,*b5[0] add 4,b5,a3 ldw *+a3[0],a3 nop ; pad rest of fetch packet ; idle the CPU with a simultaneous interrupt enable (GIE=1) mvc csr, b4 or 1, b4, b4 ; set GIE mvc b4, csr || idle nop ; pad rest of fetch packet nop ; return back to IpcPower_idle API b b3 nop 5 .endasmfunc