index b442e43967ac9dbb477649eb944744741d53f7fb..088b5fad678deba0274d9b8db077a418e1827099 100644 (file)
/*
- * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * Copyright (c) 2012-2015, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* --- External Memory ---
* Virtual Physical Size Comment
* ------------------------------------------------------------------------
- * 0000_4000 ????_???? 5F_C000 ( ~6 MB) EXT_CODE
- * 8000_0000 ????_???? 60_0000 ( 6 MB) EXT_DATA
- * 8060_0000 ????_???? 960_0000 ( 86 MB) EXT_HEAP
- * 9F00_0000 9F00_0000 6_0000 ( 384 kB) TRACE_BUF
- * 9F06_0000 9F06_0000 1_0000 ( 64 kB) EXC_DATA
- * 9F07_0000 9F07_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
+ * 0000_4000 ???0_4000 5F_C000 ( ~6 MB) EXT_CODE
+ * 8000_0000 ???0_0000 60_0000 ( 6 MB) EXT_DATA
+ * 8060_0000 ???0_0000 2A0_0000 ( 42 MB) EXT_HEAP
+ * 9F00_0000 ???0_0000 6_0000 ( 384 kB) TRACE_BUF
+ * 9F06_0000 ???6_0000 1_0000 ( 64 kB) EXC_DATA
+ * 9F07_0000 ???7_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
*/
var sdp5430_ExtMemMapIpu = {
EXT_CODE: {
EXT_HEAP: {
name: "EXT_HEAP",
base: 0x80600000,
- len: 0x09600000,
+ len: 0x02A00000,
space: "data",
access: "RW"
},
* --- External Memory ---
* Virtual Physical Size Comment
* ------------------------------------------------------------------------
- * 9500_4000 ????_???? 10_0000 ( ~1 MB) EXT_CODE
- * 9510_0000 ????_???? 10_0000 ( 1 MB) EXT_DATA
- * 9520_0000 ????_???? 30_0000 ( 3 MB) EXT_HEAP
- * 9F00_0000 9F00_0000 6_0000 ( 384 kB) TRACE_BUF
- * 9F06_0000 9F06_0000 1_0000 ( 64 kB) EXC_DATA
- * 9F07_0000 9F07_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
+ * 9500_0000 ???0_0000 10_0000 ( ~1 MB) EXT_CODE
+ * 9510_0000 ???0_0000 10_0000 ( 1 MB) EXT_DATA
+ * 9520_0000 ???0_0000 30_0000 ( 3 MB) EXT_HEAP
+ * 9F00_0000 ???0_0000 6_0000 ( 384 kB) TRACE_BUF
+ * 9F06_0000 ???6_0000 1_0000 ( 64 kB) EXC_DATA
+ * 9F07_0000 ???7_0000 7_0000 ( 448 kB) PM_DATA (Power mgmt)
*/
var evmDRA7XX_ExtMemMapDsp = {
EXT_CODE: {
PM_DATA: {
name: "PM_DATA",
base: 0x9F070000,
- len: 0x00020000,
+ len: 0x00070000,
space: "data",
access: "RWX" /* should this have execute perm? */
},
* --- External Memory ---
* Virtual Physical Size Comment
* ------------------------------------------------------------------------
- * 0000_4000 ????_???? 5F_C000 ( ~6 MB) EXT_CODE
- * 8000_0000 ????_???? 60_0000 ( 6 MB) EXT_DATA
- * 8060_0000 ????_???? 960_0000 ( 86 MB) EXT_HEAP
- * 9F00_0000 9F00_0000 6_0000 ( 384 kB) TRACE_BUF
- * 9F06_0000 9F06_0000 1_0000 ( 64 kB) EXC_DATA
- * 9F07_0000 9F07_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
+ * 0000_4000 ???0_4000 5F_C000 ( ~6 MB) EXT_CODE
+ * 8000_0000 ???0_0000 60_0000 ( 6 MB) EXT_DATA
+ * 8060_0000 ???0_0000 2A0_0000 ( 42 MB) EXT_HEAP
+ * 9F00_0000 ???0_0000 6_0000 ( 384 kB) TRACE_BUF
+ * 9F06_0000 ???6_0000 1_0000 ( 64 kB) EXC_DATA
+ * 9F07_0000 ???7_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
*/
var evmDRA7XX_ExtMemMapIpu2 = {
EXT_CODE: {
EXT_HEAP: {
name: "EXT_HEAP",
base: 0x80600000,
- len: 0x09600000,
+ len: 0x02A00000,
space: "data",
access: "RW"
},
* --- External Memory ---
* Virtual Physical Size Comment
* ------------------------------------------------------------------------
- * 0000_4000 ????_???? F_C000 ( ~1 MB) EXT_CODE
- * 8000_0000 ????_???? 20_0000 ( 2 MB) EXT_DATA
- * 8020_0000 ????_???? 30_0000 ( 3 MB) EXT_HEAP
- * 9F00_0000 9F00_0000 6_0000 ( 384 kB) TRACE_BUF
- * 9F06_0000 9F06_0000 1_0000 ( 64 kB) EXC_DATA
- * 9F07_0000 9F07_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
+ * 0000_4000 ???0_4000 F_C000 ( ~1 MB) EXT_CODE
+ * 8000_0000 ???0_0000 20_0000 ( 2 MB) EXT_DATA
+ * 8020_0000 ???0_0000 30_0000 ( 3 MB) EXT_HEAP
+ * 9F00_0000 ???0_0000 6_0000 ( 384 kB) TRACE_BUF
+ * 9F06_0000 ???6_0000 1_0000 ( 64 kB) EXC_DATA
+ * 9F07_0000 ???7_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
*/
var evmDRA7XX_ExtMemMapIpu1 = {
EXT_CODE: {
stackMemory: "EXT_DATA",
};
+/*
+ * Create Keystone platform instances without any external memory.
+ * The main reason for this is to prevent SYS/BIOS from tagging
+ * any of the external memory address space as "cacheable" in MAR
+ * register settings.
+ *
+ * All the tests currently build just one Keystone DSP executable
+ * that is used for all cores. One could create a separate platform
+ * instance for each core on a given Keystone part, and then use that
+ * particular core's platform instance when building for that core.
+ */
+Build.platformTable["ti.platforms.evmC66AK2E:core0"] = {
+ externalMemoryMap: [ ]
+};
+
+Build.platformTable["ti.platforms.evmTCI6630K2L:core0"] = {
+ externalMemoryMap: [ ]
+};
+
+Build.platformTable["ti.platforms.evmTCI6636K2H:core0"] = {
+ externalMemoryMap: [ ]
+};
+
+Build.platformTable["ti.platforms.evmTCI6638K2K:core0"] = {
+ externalMemoryMap: [ ]
+};
+
for (var i = 0; i < Build.targets.length; i++) {
var targ = Build.targets[i];
/* currently only build for OMAPL138, Keystone II, OMAP5, and Vayu*/
if (!((platform.match(/^ti\.platforms\.evm6614\:DSP/)) ||
(platform.match(/^ti\.platforms\.simKepler/)) ||
+ (platform.match(/^ti.platforms.evmC66AK2E/)) ||
+ (platform.match(/^ti.platforms.evmTCI6630K2L/)) ||
(platform.match(/^ti.platforms.evmTCI6638K2K/)) ||
(platform.match(/^ti.platforms.evmTCI6636K2H/)) ||
(platform.match(/^ti\.platform\.omap54xx/)) ||
extraDefs = " -DRPMSG_NS_2_0";
}
+ /* fault */
+ Pkg.addExecutable(name + "/fault", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: extraDefs
+ }).addObjects(["fault.c"]);
+
/* ping_rpmsg */
Pkg.addExecutable(name + "/ping_rpmsg", targ, platform, {
cfgScript: "ping_rpmsg",
/* messageq_multicore - only for our homogeneous multicore platforms */
if (platform.match(/^ti\.platforms\.simKepler/) ||
+ (platform.match(/^ti.platforms.evmTCI6630K2L/)) ||
(platform.match(/^ti.platforms.evmTCI6638K2K/)) ||
(platform.match(/^ti.platforms.evmTCI6636K2H/)) ||
(platform.match(/^ti\.platforms\.evm6614\:DSP/))) {
defs: "-D BENCHMARK" + extraDefs
}).addObjects(["messageq_multi.c"]);
- /* messageq_single */
- Pkg.addExecutable(name + "/messageq_single", targ, platform, {
+ /* messageq_multimulti */
+ Pkg.addExecutable(name + "/messageq_multimulti", targ, platform, {
cfgScript: "rpmsg_transport",
- defs: "-D BENCHMARK " + extraDefs
- }).addObjects(["messageq_single.c"]);
+ defs: "-D BENCHMARK" + extraDefs
+ }).addObjects(["messageq_multimulti.c"]);
- /* NameServerApp */
- Pkg.addExecutable(name + "/NameServerApp", targ, platform, {
- cfgScript: "nameserverapp",
- }).addObjects(["NameServerApp.c"]);
+ /* messageq_single */
+ if (platform.match(/^ti\.platforms\.sdp5430/) &&
+ (targ.isa == "64T")) {
+ Pkg.addExecutable(name + "/messageq_single", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK -D DSP" + extraDefs
+ }).addObjects(["messageq_single.c"]);
+ } else if (platform.match(/^ti\.platforms\.sdp5430/) &&
+ (targ.isa == "M4")) {
+ Pkg.addExecutable(name + "/messageq_single", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK -D IPU" + extraDefs
+ }).addObjects(["messageq_single.c"]);
+ } else {
+ Pkg.addExecutable(name + "/messageq_single", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK " + extraDefs
+ }).addObjects(["messageq_single.c"]);
+ }
+
+ /* TODO: NameServerApp.xe66 too big for K2E's 512 KB L2SRAM */
+ if (!platform.match(/^ti.platforms.evmC66AK2E/)) {
+ /* NameServerApp */
+ Pkg.addExecutable(name + "/NameServerApp", targ, platform, {
+ cfgScript: "nameserverapp",
+ }).addObjects(["NameServerApp.c"]);
+ }
/* nano_test - demonstrates passing ptrs using CMEM */
if (platform.match(/^ti\.platforms\.evmOMAPL138\:DSP/)) {