index 10347ac18697f6e85ce4a0c6d15bfb74e6519877..d8a05d24f0d742b0644b4eea29067834294f07bb 100644 (file)
var Build = xdc.useModule('xdc.bld.BuildEnvironment');
var Pkg = xdc.useModule('xdc.bld.PackageContents');
+Pkg.otherFiles = [ "mmrpc_test.c" ];
+
/* when constructing a release, release everything */
Pkg.attrs.exportAll = true;
/* bin/ is a generated directory that 'xdc clean' should remove */
Pkg.generatedFiles.$add("bin/");
-/* define the platform instances we support - currently only OMAPL138 */
+/* define the platform instances we support */
+/* OMAPL138 */
var evmOMAPL138_ExtMemMap = {
DDR: {
name: "DDR",
l2Mode: "32k"
};
+/* Memory Map for ti.platforms.sdp5430:IPU
+ *
+ * --- External Memory ---
+ * Virtual Physical Size Comment
+ * ------------------------------------------------------------------------
+ * 0000_4000 ????_???? 5F_C000 ( ~6 MB) EXT_CODE
+ * 8000_0000 ????_???? 60_0000 ( 6 MB) EXT_DATA
+ * 8060_0000 ????_???? 960_0000 ( 86 MB) EXT_HEAP
+ * 9F00_0000 9F00_0000 6_0000 ( 384 kB) TRACE_BUF
+ * 9F06_0000 9F06_0000 1_0000 ( 64 kB) EXC_DATA
+ * 9F07_0000 9F07_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
+ */
+var sdp5430_ExtMemMapIpu = {
+ EXT_CODE: {
+ name: "EXT_CODE",
+ base: 0x00004000,
+ len: 0x005FC000,
+ space: "code",
+ access: "RWX"
+ },
+ EXT_DATA: {
+ name: "EXT_DATA",
+ base: 0x80000000,
+ len: 0x00600000,
+ space: "data",
+ access: "RW"
+ },
+ EXT_HEAP: {
+ name: "EXT_HEAP",
+ base: 0x80600000,
+ len: 0x09600000,
+ space: "data",
+ access: "RW"
+ },
+ TRACE_BUF: {
+ name: "TRACE_BUF",
+ base: 0x9F000000,
+ len: 0x00060000,
+ space: "data",
+ access: "RW"
+ },
+ EXC_DATA: {
+ name: "EXC_DATA",
+ base: 0x9F060000,
+ len: 0x00010000,
+ space: "data",
+ access: "RW"
+ },
+ PM_DATA: {
+ name: "PM_DATA",
+ base: 0x9F070000,
+ len: 0x00020000,
+ space: "data",
+ access: "RWX" /* should this have execute perm? */
+ }
+};
+
+Build.platformTable["ti.platforms.sdp5430:IPU"] = {
+ externalMemoryMap: [
+ [ "EXT_CODE", sdp5430_ExtMemMapIpu.EXT_CODE ],
+ [ "EXT_DATA", sdp5430_ExtMemMapIpu.EXT_DATA ],
+ [ "EXT_HEAP", sdp5430_ExtMemMapIpu.EXT_HEAP ],
+ [ "TRACE_BUF", sdp5430_ExtMemMapIpu.TRACE_BUF ],
+ [ "EXC_DATA", sdp5430_ExtMemMapIpu.EXC_DATA ],
+ [ "PM_DATA", sdp5430_ExtMemMapIpu.PM_DATA ]
+ ],
+ codeMemory: "EXT_CODE",
+ dataMemory: "EXT_DATA",
+ stackMemory: "EXT_DATA",
+};
+
+/* Memory Map for ti.platforms.sdp5430:DSP
+ *
+ * --- External Memory ---
+ * Virtual Physical Size Comment
+ * ------------------------------------------------------------------------
+ * 2000_0000 ????_???? 10_0000 ( 1 MB) EXT_CODE
+ * 9000_0000 ????_???? 10_0000 ( 1 MB) EXT_DATA
+ * 9010_0000 ????_???? 30_0000 ( 3 MB) EXT_HEAP
+ * 9F00_0000 9F00_0000 6_0000 ( 384 kB) TRACE_BUF
+ * 9F06_0000 9F06_0000 1_0000 ( 64 kB) EXC_DATA
+ * 9F07_0000 9F07_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
+ */
+var sdp5430_ExtMemMapDsp = {
+ EXT_CODE: {
+ name: "EXT_CODE",
+ base: 0x20000000,
+ len: 0x00100000,
+ space: "code",
+ access: "RWX"
+ },
+ EXT_DATA: {
+ name: "EXT_DATA",
+ base: 0x90000000,
+ len: 0x00100000,
+ space: "data",
+ access: "RW"
+ },
+ EXT_HEAP: {
+ name: "EXT_HEAP",
+ base: 0x90100000,
+ len: 0x00300000,
+ space: "data",
+ access: "RW"
+ },
+ TRACE_BUF: {
+ name: "TRACE_BUF",
+ base: 0x9F000000,
+ len: 0x00060000,
+ space: "data",
+ access: "RW"
+ },
+ EXC_DATA: {
+ name: "EXC_DATA",
+ base: 0x9F060000,
+ len: 0x00010000,
+ space: "data",
+ access: "RW"
+ },
+ PM_DATA: {
+ name: "PM_DATA",
+ base: 0x9F070000,
+ len: 0x00020000,
+ space: "data",
+ access: "RWX" /* should this have execute perm? */
+ }
+};
+
+Build.platformTable["ti.platforms.sdp5430:DSP"] = {
+ externalMemoryMap: [
+ [ "EXT_CODE", sdp5430_ExtMemMapDsp.EXT_CODE ],
+ [ "EXT_DATA", sdp5430_ExtMemMapDsp.EXT_DATA ],
+ [ "EXT_HEAP", sdp5430_ExtMemMapDsp.EXT_HEAP ],
+ [ "TRACE_BUF", sdp5430_ExtMemMapDsp.TRACE_BUF ],
+ [ "EXC_DATA", sdp5430_ExtMemMapDsp.EXC_DATA ],
+ [ "PM_DATA", sdp5430_ExtMemMapDsp.PM_DATA ]
+ ],
+ codeMemory: "EXT_CODE",
+ dataMemory: "EXT_DATA",
+ stackMemory: "EXT_DATA",
+};
+
+/* Memory Map for ti.platforms.evmDRA7XX:dsp1
+ *
+ * --- External Memory ---
+ * Virtual Physical Size Comment
+ * ------------------------------------------------------------------------
+ * 0000_4000 ????_???? 5F_C000 ( ~6 MB) EXT_CODE
+ * 8000_0000 ????_???? 60_0000 ( 6 MB) EXT_DATA
+ * 8060_0000 ????_???? 960_0000 ( 86 MB) EXT_HEAP
+ * 9F00_0000 9F00_0000 6_0000 ( 384 kB) TRACE_BUF
+ * 9F06_0000 9F06_0000 1_0000 ( 64 kB) EXC_DATA
+ * 9F07_0000 9F07_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
+ */
+var evmDRA7XX_ExtMemMapDsp1 = {
+ EXT_CODE: {
+ name: "EXT_CODE",
+ base: 0x95000000,
+ len: 0x00100000,
+ space: "code",
+ access: "RWX"
+ },
+ EXT_DATA: {
+ name: "EXT_DATA",
+ base: 0x95100000,
+ len: 0x00100000,
+ space: "data",
+ access: "RW"
+ },
+ EXT_HEAP: {
+ name: "EXT_HEAP",
+ base: 0x95200000,
+ len: 0x00300000,
+ space: "data",
+ access: "RW"
+ },
+ TRACE_BUF: {
+ name: "TRACE_BUF",
+ base: 0x9F000000,
+ len: 0x00060000,
+ space: "data",
+ access: "RW"
+ },
+ EXC_DATA: {
+ name: "EXC_DATA",
+ base: 0x9F060000,
+ len: 0x00010000,
+ space: "data",
+ access: "RW"
+ },
+ PM_DATA: {
+ name: "PM_DATA",
+ base: 0x9F070000,
+ len: 0x00020000,
+ space: "data",
+ access: "RWX" /* should this have execute perm? */
+ }
+};
+
+Build.platformTable["ti.platforms.evmDRA7XX:dsp1"] = {
+ externalMemoryMap: [
+ [ "EXT_CODE", evmDRA7XX_ExtMemMapDsp1.EXT_CODE ],
+ [ "EXT_DATA", evmDRA7XX_ExtMemMapDsp1.EXT_DATA ],
+ [ "EXT_HEAP", evmDRA7XX_ExtMemMapDsp1.EXT_HEAP ],
+ [ "TRACE_BUF", evmDRA7XX_ExtMemMapDsp1.TRACE_BUF ],
+ [ "EXC_DATA", evmDRA7XX_ExtMemMapDsp1.EXC_DATA ],
+ [ "PM_DATA", evmDRA7XX_ExtMemMapDsp1.PM_DATA ]
+ ],
+ codeMemory: "EXT_CODE",
+ dataMemory: "EXT_DATA",
+ stackMemory: "EXT_DATA",
+};
+
+
+/* Memory Map for ti.platforms.evmDRA7XX:ipu2
+ *
+ * --- External Memory ---
+ * Virtual Physical Size Comment
+ * ------------------------------------------------------------------------
+ * 0000_4000 ????_???? 5F_C000 ( ~6 MB) EXT_CODE
+ * 8000_0000 ????_???? 60_0000 ( 6 MB) EXT_DATA
+ * 8060_0000 ????_???? 960_0000 ( 86 MB) EXT_HEAP
+ * 9F00_0000 9F00_0000 6_0000 ( 384 kB) TRACE_BUF
+ * 9F06_0000 9F06_0000 1_0000 ( 64 kB) EXC_DATA
+ * 9F07_0000 9F07_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
+ */
+var evmDRA7XX_ExtMemMapIpu2 = {
+ EXT_CODE: {
+ name: "EXT_CODE",
+ base: 0x00004000,
+ len: 0x005FC000,
+ space: "code",
+ access: "RWX"
+ },
+ EXT_DATA: {
+ name: "EXT_DATA",
+ base: 0x80000000,
+ len: 0x00600000,
+ space: "data",
+ access: "RW"
+ },
+ EXT_HEAP: {
+ name: "EXT_HEAP",
+ base: 0x80600000,
+ len: 0x09600000,
+ space: "data",
+ access: "RW"
+ },
+ TRACE_BUF: {
+ name: "TRACE_BUF",
+ base: 0x9F000000,
+ len: 0x00060000,
+ space: "data",
+ access: "RW"
+ },
+ EXC_DATA: {
+ name: "EXC_DATA",
+ base: 0x9F060000,
+ len: 0x00010000,
+ space: "data",
+ access: "RW"
+ },
+ PM_DATA: {
+ name: "PM_DATA",
+ base: 0x9F070000,
+ len: 0x00020000,
+ space: "data",
+ access: "RWX" /* should this have execute perm? */
+ }
+};
+
+Build.platformTable["ti.platforms.evmDRA7XX:ipu2"] = {
+ externalMemoryMap: [
+ [ "EXT_CODE", evmDRA7XX_ExtMemMapIpu2.EXT_CODE ],
+ [ "EXT_DATA", evmDRA7XX_ExtMemMapIpu2.EXT_DATA ],
+ [ "EXT_HEAP", evmDRA7XX_ExtMemMapIpu2.EXT_HEAP ],
+ [ "TRACE_BUF", evmDRA7XX_ExtMemMapIpu2.TRACE_BUF ],
+ [ "EXC_DATA", evmDRA7XX_ExtMemMapIpu2.EXC_DATA ],
+ [ "PM_DATA", evmDRA7XX_ExtMemMapIpu2.PM_DATA ]
+ ],
+ codeMemory: "EXT_CODE",
+ dataMemory: "EXT_DATA",
+ stackMemory: "EXT_DATA",
+};
+
for (var i = 0; i < Build.targets.length; i++) {
var targ = Build.targets[i];
// print("building for target " + targ.name + " ...");
- /* currently only build for OMAPL138, Keystone II, and OMAP5*/
- if (!((targ.isa == "674") || (targ.isa == "66") || (targ.isa == "v7M"))) {
+ /* currently only build for OMAPL138, Keystone II, OMAP5, and Vayu*/
+ if (!((targ.isa == "674") || (targ.isa == "66") ||
+ (targ.isa.match(/v7M(|4)/)) || (targ.isa == "64T"))) {
continue;
}
for (var j = 0; j < targ.platforms.length; j++) {
var platform = targ.platforms[j];
- /* currently only build for OMAPL138, Keystone II, and OMAP5*/
+ /* currently only build for OMAPL138, Keystone II, OMAP5, and Vayu*/
if (!((platform.match(/^ti\.platforms\.evm6614\:DSP/)) ||
(platform.match(/^ti\.platforms\.simKepler/)) ||
+ (platform.match(/^ti.platforms.evmTCI6638K2K/)) ||
(platform.match(/^ti\.platform\.omap54xx/)) ||
+ (platform.match(/^ti\.platforms\.sdp5430/)) ||
+ (platform.match(/^ti\.platform\.vayu/)) ||
+ (platform.match(/^ti\.platforms\.evmDRA7XX/)) ||
(platform.match(/\.platforms\.evmOMAPL138/)))) {
continue;
}
// replace all ':' and '.' with '_' in platform name
platform.replace(/\:/g, "_").replace(/\./g, "_");
+ var extraDefs = "";
+
+ /* Vayu and OMAP5 require MmRpc and therefore use RPMSG_NS_2_0 */
+ if (platform.match(/^ti\.platform\.vayu/) ||
+ platform.match(/^ti\.platforms\.evmDRA7XX/) ||
+ platform.match(/^ti\.platform\.sdp5430$/)) {
+ extraDefs = " -DRPMSG_NS_2_0";
+ }
+
+ /* ping_rpmsg */
Pkg.addExecutable(name + "/ping_rpmsg", targ, platform, {
- cfgScript: "ping_rpmsg"
+ cfgScript: "ping_rpmsg",
+ defs: extraDefs
}).addObjects(["ping_rpmsg.c"]);
- /* Only build this for our multicore platforms: */
+ /* messageq_multicore - only for our homogeneous multicore platforms */
if (platform.match(/^ti\.platforms\.simKepler/) ||
- platform.match(/^ti\.platforms\.evm6614\:DSP/)) {
- Pkg.addExecutable(name + "/messageq_multicore",targ,platform, {
- cfgScript: "messageq_multicore",
- //defs: "-D TCI6614_v33"
- //defs: "-D TCI6614"
- defs: "-D TCI6638"
- }).addObjects(["messageq_multicore.c"]);
-
- Pkg.addExecutable(name + "/dual_transports",targ,platform, {
- cfgScript: "dual_transports",
- }).addObjects(["dual_transports.c"]);
+ (platform.match(/^ti.platforms.evmTCI6638K2K/)) ||
+ (platform.match(/^ti\.platforms\.evm6614\:DSP/))) {
+ Pkg.addExecutable(name + "/messageq_multicore", targ, platform, {
+ cfgScript: "messageq_multicore",
+ //defs: "-D TCI6614_v33"
+ //defs: "-D TCI6614"
+ defs: "-D TCI6638"
+ }).addObjects(["messageq_multicore.c"]);
+
+ Pkg.addExecutable(name + "/dual_transports", targ, platform, {
+ cfgScript: "dual_transports",
+ }).addObjects(["dual_transports.c"]);
}
-/* RE-ENABLE after ping_rpmsg works on OMAP5 SMP:
+ /* messageq_multi */
Pkg.addExecutable(name + "/messageq_multi", targ, platform, {
cfgScript: "rpmsg_transport",
- defs: "-D BENCHMARK "
+ defs: "-D BENCHMARK" + extraDefs
}).addObjects(["messageq_multi.c"]);
+ /* messageq_single */
Pkg.addExecutable(name + "/messageq_single", targ, platform, {
cfgScript: "rpmsg_transport",
- defs: "-D BENCHMARK "
+ defs: "-D BENCHMARK " + extraDefs
}).addObjects(["messageq_single.c"]);
-*/
+
+ /* nano_test - demonstrates passing ptrs using CMEM */
if (platform.match(/^ti\.platforms\.evmOMAPL138\:DSP/)) {
- Pkg.addExecutable(name + "/nano_test", targ, platform, {
- cfgScript: "rpmsg_transport"
- }).addObjects(["nano_test.c"]);
+ Pkg.addExecutable(name + "/nano_test", targ, platform, {
+ cfgScript: "rpmsg_transport"
+ }).addObjects(["nano_test.c"]);
+ }
+
+ var test_omx_SRCS = ["test_omx.c","ping_tasks.c","rpc_task.c",
+ "MxServer.c"];
+
+ if (platform.match(/^ti\.platforms\.sdp5430/) &&
+ (targ.isa == "v7M4")) {
+ Pkg.addExecutable(name + "/test_omx_ipu_omap5", targ, platform, {
+ cfgScript: "test_omx_ipu_omap5",
+ defs: "-D IPU -D OMAP5xxx -DRPMSG_NS_2_0"
+ }).addObjects(test_omx_SRCS);
+ }
+
+ if (platform.match(/^ti\.platforms\.sdp5430/) &&
+ (targ.isa == "64T")) {
+ Pkg.addExecutable(name + "/test_omx_dsp_omap5", targ, platform, {
+ cfgScript: "test_omx_dsp_omap5",
+ defs: "-D DSP -D OMAP5xxx -DRPMSG_NS_2_0"
+ }).addObjects(test_omx_SRCS);
+ }
+
+ if (platform.match(/^ti\.platform\.vayu\.ipu2/) ||
+ platform.match(/^ti\.platforms\.evmDRA7XX:ipu2$/)) {
+ Pkg.addExecutable(name + "/test_omx_ipu2_vayu", targ, platform, {
+ cfgScript: "test_omx_ipu_vayu",
+ defs: "-D IPU -D VAYU -DRPMSG_NS_2_0"
+ }).addObjects(test_omx_SRCS);
+ }
+
+ if (platform.match(/^ti\.platform\.vayu\.dsp1/) ||
+ platform.match(/^ti\.platforms\.evmDRA7XX:dsp1$/)) {
+ Pkg.addExecutable(name + "/test_omx_dsp1_vayu", targ, platform, {
+ cfgScript: "test_omx_dsp_vayu",
+ defs: "-D DSP -D VAYU -DRPMSG_NS_2_0"
+ }).addObjects(test_omx_SRCS);
}
}
}