[ipc/ipcdev.git] / qnx / src / ipc3x_dev / ti / syslink / family / common / vayu / vayuipu / vayucore0 / VAYUIpuCore0Proc.c
diff --git a/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayuipu/vayucore0/VAYUIpuCore0Proc.c b/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayuipu/vayucore0/VAYUIpuCore0Proc.c
index c0d92d0211afe15f00a3d0baf0419747cb8d9507..f2ba037154f4ea998e02ce91d587875f218c71e3 100644 (file)
*
* ============================================================================
*
- * Copyright (c) 2013, Texas Instruments Incorporated
+ * Copyright (c) 2013-2014, Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* =============================================================================
*/
-/*!
- * @brief Number of static entries in address translation table.
- */
-#define AddrTable_STATIC_COUNT 1
-
/*!
* @brief Max entries in address translation table.
*/
#define AddrTable_SIZE 32
-#define PARAMS_MAX_NAMELENGTH 64
-/* Config param for L2MMU. This is not a typo, we are using the
- * same name (IPU1) because both Benelli M4 processors use the
- * same L2MMU. The docs expose IPU2 but not the IPU2 Core1 processor.
- */
-#define PARAMS_mmuEnable "ProcMgr.proc[IPU2].mmuEnable="
-#define PARAMS_carveoutAddr "ProcMgr.proc[IPU2].carveoutAddr"
-#define PARAMS_carveoutSize "ProcMgr.proc[IPU2].carveoutSize"
+/* Number of IPUs supported */
+#define NUM_IPUS 2
+
+/* Convert procId to IPU # */
+#define PROCID_TO_IPU(procId) (procId == VAYUIPUCORE0PROC_state.ipu1ProcId ?\
+ 0 : 1)
/*!
/*!< Processor handle array. */
IGateProvider_Handle gateHandle;
/*!< Handle of gate to be used for local thread safety */
+ UInt16 ipu1ProcId;
+ /*!< MultiProc id of IPU1 (to avoid multiple lookups) */
} VAYUIPUCORE0PROC_ModuleObject;
-/* Default memory regions */
-static UInt32 AddrTable_count = AddrTable_STATIC_COUNT;
+/* Memory region counters */
+static UInt32 AddrTable_count[NUM_IPUS] = {
+ 0,
+ 0
+};
-/* static memory regions
- * CAUTION: AddrTable_STATIC_COUNT must match number of entries below.
+/*
+ * Address translation tables
*/
-static ProcMgr_AddrInfo AddrTable[AddrTable_SIZE] =
- {
- /* L2 RAM */
- {
- .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u,
- .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u,
- .addr[ProcMgr_AddrType_MasterPhys] = 0x55020000u,
- .addr[ProcMgr_AddrType_SlaveVirt] = 0x20000000u,
- .addr[ProcMgr_AddrType_SlavePhys] = -1u,
- .size = 0x10000u,
- .isCached = FALSE,
- .mapMask = ProcMgr_SLAVEVIRT,
- .isMapped = TRUE,
- .refCount = 0u /* refCount set to 0 for static entry */
- },
- };
+static ProcMgr_AddrInfo AddrTable_IPU1[AddrTable_SIZE];
+static ProcMgr_AddrInfo AddrTable_IPU2[AddrTable_SIZE];
+
+static ProcMgr_AddrInfo * AddrTable[NUM_IPUS] =
+{
+ AddrTable_IPU1,
+ AddrTable_IPU2
+};
/* =============================================================================
* Globals
.isSetup = FALSE,
.configSize = sizeof(VAYUIPUCORE0PROC_Config),
.gateHandle = NULL,
- .defInstParams.mmuEnable = FALSE,
- .defInstParams.numMemEntries = AddrTable_STATIC_COUNT
+ .defInstParams.numMemEntries = 0,
};
/* config override specified in SysLinkCfg.c, defined in ProcMgr.c */
Memory_set (&VAYUIPUCORE0PROC_state.procHandles,
0,
(sizeof (VAYUIPUCORE0PROC_Handle) * MultiProc_MAXPROCESSORS));
+
+ VAYUIPUCORE0PROC_state.ipu1ProcId = MultiProc_getId("IPU1");
VAYUIPUCORE0PROC_state.isSetup = TRUE;
#if !defined(SYSLINK_BUILD_OPTIMIZE)
}
VAYUIPUCORE0PROC_Params * params)
{
VAYUIPUCORE0PROC_Object *procObject = (VAYUIPUCORE0PROC_Object *)handle;
- Int i = 0;
- ProcMgr_AddrInfo *ai = NULL;
GT_2trace(curTrace, GT_ENTER, "VAYUIPUCORE0PROC_Params_init",
handle, params);
#endif
if (handle == NULL) {
- /* check for instance params override */
- Cfg_propBool(PARAMS_mmuEnable, ProcMgr_sysLinkCfgParams,
- &(VAYUIPUCORE0PROC_state.defInstParams.mmuEnable));
-
Memory_copy(params, &(VAYUIPUCORE0PROC_state.defInstParams),
sizeof (VAYUIPUCORE0PROC_Params));
-
- /* initialize the translation table */
- for (i = AddrTable_count; i < AddrTable_SIZE; i++) {
- ai = &AddrTable[i];
- ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u;
- ai->addr[ProcMgr_AddrType_MasterUsrVirt] = -1u;
- ai->addr[ProcMgr_AddrType_MasterPhys] = -1u;
- ai->addr[ProcMgr_AddrType_SlaveVirt] = -1u;
- ai->addr[ProcMgr_AddrType_SlavePhys] = -1u;
- ai->size = 0u;
- ai->isCached = FALSE;
- ai->mapMask = 0u;
- ai->isMapped = FALSE;
- }
-
- /* initialize refCount for all entries - both static and dynamic */
- for (i = 0; i < AddrTable_SIZE; i++) {
- AddrTable[i].refCount = 0u;
- }
- Memory_copy((Ptr)params->memEntries, AddrTable, sizeof(AddrTable));
}
else {
/* return updated VAYUIPUCORE0PROC instance specific parameters */
VAYUIPUCORE0PROC_create ( UInt16 procId,
const VAYUIPUCORE0PROC_Params * params)
{
- Int status = PROCESSOR_SUCCESS;
- Processor_Object * handle = NULL;
- VAYUIPUCORE0PROC_Object * object = NULL;
+ Int status = PROCESSOR_SUCCESS;
+ Processor_Object * handle = NULL;
+ VAYUIPUCORE0PROC_Object * object = NULL;
+ Int i = 0;
+ ProcMgr_AddrInfo *ai = NULL;
IArg key;
List_Params listParams;
(Ptr) params,
sizeof (VAYUIPUCORE0PROC_Params));
+ /* initialize the translation table */
+ for (i = AddrTable_count[PROCID_TO_IPU(procId)];
+ i < AddrTable_SIZE; i++) {
+ ai = &AddrTable[PROCID_TO_IPU(procId)][i];
+ ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u;
+ ai->addr[ProcMgr_AddrType_MasterUsrVirt] = -1u;
+ ai->addr[ProcMgr_AddrType_MasterPhys] = -1u;
+ ai->addr[ProcMgr_AddrType_SlaveVirt] = -1u;
+ ai->addr[ProcMgr_AddrType_SlavePhys] = -1u;
+ ai->size = 0u;
+ ai->isCached = FALSE;
+ ai->mapMask = 0u;
+ ai->isMapped = FALSE;
+ }
+
+ /*
+ * initialize refCount for all entries
+ */
+ for (i = 0; i < AddrTable_SIZE; i++) {
+ AddrTable[PROCID_TO_IPU(procId)][i].refCount = 0u;
+ }
+ Memory_copy((Ptr)(object->params.memEntries),
+ AddrTable[PROCID_TO_IPU(procId)],
+ (procId == VAYUIPUCORE0PROC_state.ipu1ProcId ?
+ sizeof(AddrTable_IPU1) : sizeof(AddrTable_IPU2)));
+
/* Set the handle in the state object. */
VAYUIPUCORE0PROC_state.procHandles [procId] =
(VAYUIPUCORE0PROC_Handle) object;
ProcMgr_AddrInfo * me;
SysLink_MemEntry * entry;
SysLink_MemEntry_Block memBlock;
- Char prop[PARAMS_MAX_NAMELENGTH];
- Char configProp[PARAMS_MAX_NAMELENGTH];
- UInt32 numCarveouts = 0;
VAYUIPU_HalMmuCtrlArgs_Enable mmuEnableArgs;
VAYUIPU_HalParams halParams;
/* Added for Netra Benelli core1 is cortex M4 */
params->procArch = Processor_ProcArch_M4;
- /* check for instance params override */
- Cfg_propBool(PARAMS_mmuEnable, ProcMgr_sysLinkCfgParams,
- &(object->params.mmuEnable));
-
- /* check for carveout params override */
- for (i = 0; i < ProcMgr_MAX_MEMORY_REGIONS; i++) {
- snprintf (prop, PARAMS_MAX_NAMELENGTH, PARAMS_carveoutAddr"%d", i);
- strcat(prop, "=");
- if (!Cfg_prop(prop, ProcMgr_sysLinkCfgParams, configProp))
- break;
- object->params.carveoutAddr[i] = strtoul(configProp, 0, 16);
- snprintf (prop, PARAMS_MAX_NAMELENGTH, PARAMS_carveoutSize"%d", i);
- strcat(prop, "=");
- if (!Cfg_prop(prop, ProcMgr_sysLinkCfgParams, configProp))
- break;
- object->params.carveoutSize[i] = strtoul(configProp, 0, 16);
- numCarveouts++;
- }
-
object->pmHandle = params->pmHandle;
GT_0trace(curTrace, GT_1CLASS,
"VAYUIPUCORE0PROC_attach: Mapping memory regions");
/* search for dsp memory map */
- status = RscTable_process(procHandle->procId, object->params.mmuEnable,
- numCarveouts,
- (Ptr)object->params.carveoutAddr,
- object->params.carveoutSize, TRUE,
+ status = RscTable_process(procHandle->procId,
+ TRUE,
&memBlock.numEntries);
if (status < 0 || memBlock.numEntries > SYSLINK_MAX_MEMENTRIES) {
/*! @retval PROCESSOR_E_INVALIDARG Invalid argument */
if (entry->map == FALSE) {
/* update table with entries which don't require mapping */
- if (AddrTable_count != AddrTable_SIZE) {
- me = &AddrTable[AddrTable_count];
+ if (AddrTable_count[PROCID_TO_IPU(procHandle->procId)] !=
+ AddrTable_SIZE) {
+ me = &AddrTable[PROCID_TO_IPU(procHandle->procId)][
+ AddrTable_count[PROCID_TO_IPU(procHandle->procId)]];
me->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u;
me->addr[ProcMgr_AddrType_MasterUsrVirt] = -1u;
me->isCached = entry->isCached;
me->mapMask = entry->mapMask;
- AddrTable_count++;
+ AddrTable_count[PROCID_TO_IPU(procHandle->procId)]++;
}
else {
status = PROCESSOR_E_FAIL;
GT_0trace(curTrace, GT_1CLASS,
"VAYUIPUCORE0PROC_attach: slave is now in reset");
- if (object->params.mmuEnable) {
- mmuEnableArgs.numMemEntries = 0;
- status = VAYUIPU_halMmuCtrl(object->halObject,
- Processor_MmuCtrlCmd_Enable, &mmuEnableArgs);
+ mmuEnableArgs.numMemEntries = 0;
+ status = VAYUIPU_halMmuCtrl(object->halObject,
+ Processor_MmuCtrlCmd_Enable, &mmuEnableArgs);
#if !defined(SYSLINK_BUILD_OPTIMIZE)
+ if (status < 0) {
+ GT_setFailureReason(curTrace, GT_4CLASS,
+ "VAYUIPUCORE0PROC_attach", status,
+ "Failed to enable the slave MMU");
+ }
+ else {
+#endif
+ GT_0trace(curTrace, GT_2CLASS,
+ "VAYUIPUCORE0PROC_attach: Slave MMU "
+ "is configured!");
+ /*
+ * Pull IPU MMU out of reset to make internal
+ * memory "loadable"
+ */
+ status = VAYUIPUCORE0_halResetCtrl(
+ object->halObject,
+ Processor_ResetCtrlCmd_MMU_Release);
if (status < 0) {
- GT_setFailureReason(curTrace, GT_4CLASS,
- "VAYUIPUCORE0PROC_attach", status,
- "Failed to enable the slave MMU");
+ /*! @retval status */
+ GT_setFailureReason(curTrace,
+ GT_4CLASS,
+ "VAYUIPUCORE0_halResetCtrl",
+ status,
+ "Reset MMU_Release failed");
}
- else {
-#endif
- GT_0trace(curTrace, GT_2CLASS,
- "VAYUIPUCORE0PROC_attach: Slave MMU "
- "is configured!");
- /*
- * Pull IPU MMU out of reset to make internal
- * memory "loadable"
- */
- status = VAYUIPUCORE0_halResetCtrl(
- object->halObject,
- Processor_ResetCtrlCmd_MMU_Release);
- if (status < 0) {
- /*! @retval status */
- GT_setFailureReason(curTrace,
- GT_4CLASS,
- "VAYUIPUCORE0_halResetCtrl",
- status,
- "Reset MMU_Release failed");
- }
#if !defined(SYSLINK_BUILD_OPTIMIZE)
- }
-#endif
}
-#if !defined(SYSLINK_BUILD_OPTIMIZE)
}
#endif
}
if ( (procHandle->bootMode == ProcMgr_BootMode_Boot)
|| (procHandle->bootMode == ProcMgr_BootMode_NoLoad_Pwr)) {
- if (object->params.mmuEnable) {
- GT_0trace(curTrace, GT_2CLASS,
- "VAYUIPUCORE0PROC_detach: Disabling Slave MMU ...");
+ GT_0trace(curTrace, GT_2CLASS,
+ "VAYUIPUCORE0PROC_detach: Disabling Slave MMU ...");
- status = VAYUIPUCORE0_halResetCtrl(object->halObject,
- Processor_ResetCtrlCmd_MMU_Reset);
+ status = VAYUIPUCORE0_halResetCtrl(object->halObject,
+ Processor_ResetCtrlCmd_MMU_Reset);
#if !defined(SYSLINK_BUILD_OPTIMIZE)
- if (status < 0) {
- /*! @retval status */
- GT_setFailureReason (curTrace,
- GT_4CLASS,
- "VAYUIPUCORE0_halResetCtrl",
- status,
- "Reset MMU failed");
- }
+ if (status < 0) {
+ /*! @retval status */
+ GT_setFailureReason (curTrace,
+ GT_4CLASS,
+ "VAYUIPUCORE0_halResetCtrl",
+ status,
+ "Reset MMU failed");
+ }
#endif /* #if !defined(SYSLINK_BUILD_OPTIMIZE) */
- status = VAYUIPU_halMmuCtrl(object->halObject,
- Processor_MmuCtrlCmd_Disable, NULL);
+ status = VAYUIPU_halMmuCtrl(object->halObject,
+ Processor_MmuCtrlCmd_Disable, NULL);
#if !defined(SYSLINK_BUILD_OPTIMIZE)
- if (status < 0) {
- GT_setFailureReason(curTrace, GT_4CLASS,
- "VAYUIPUCORE0PROC_detach", status,
- "Failed to disable the slave MMU");
- }
-#endif
+ if (status < 0) {
+ GT_setFailureReason(curTrace, GT_4CLASS,
+ "VAYUIPUCORE0PROC_detach", status,
+ "Failed to disable the slave MMU");
}
+#endif
/* delete all dynamically added entries */
- for (i = AddrTable_STATIC_COUNT; i < AddrTable_count; i++) {
- ai = &AddrTable[i];
+ for (i = 0; i <
+ AddrTable_count[PROCID_TO_IPU(procHandle->procId)]; i++) {
+ ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][i];
ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u;
ai->addr[ProcMgr_AddrType_MasterUsrVirt] = -1u;
ai->addr[ProcMgr_AddrType_MasterPhys] = -1u;
ai->isMapped = FALSE;
ai->refCount = 0u;
}
- object->params.numMemEntries = AddrTable_STATIC_COUNT;
- AddrTable_count = AddrTable_STATIC_COUNT;
+ object->params.numMemEntries = 0;
+ AddrTable_count[PROCID_TO_IPU(procHandle->procId)] = 0;
//No need to reset.. that will be done in STOP
/*tmpStatus = VAYUIPUCORE0_halResetCtrl(object->halObject,
}
else {
#endif /* #if !defined(SYSLINK_BUILD_OPTIMIZE) */
- if (object->params.mmuEnable) {
- status = rproc_ipu_setup(object->halObject,
- object->params.memEntries,
- object->params.numMemEntries);
- if (status < 0) {
- /*! @retval status */
- GT_setFailureReason (curTrace,
- GT_4CLASS,
- "VAYUIPUCORE0_halResetCtrl",
- status,
- "rproc_ipu_setup failed");
- }
+ status = rproc_ipu_setup(object->halObject,
+ object->params.memEntries,
+ object->params.numMemEntries);
+ if (status < 0) {
+ /*! @retval status */
+ GT_setFailureReason (curTrace,
+ GT_4CLASS,
+ "VAYUIPUCORE0_halResetCtrl",
+ status,
+ "rproc_ipu_setup failed");
}
/* release the slave cpu from reset */
if (status >= 0) {
"Failed to place slave in reset");
}
#endif /* #if !defined(SYSLINK_BUILD_OPTIMIZE) */
- if (object->params.mmuEnable) {
- rproc_ipu_destroy(object->halObject);
- }
+ rproc_ipu_destroy(object->halObject);
}
#if !defined(SYSLINK_BUILD_OPTIMIZE)
}
*dstAddr = -1u;
/* search all entries AddrTable */
- for (i = 0; i < AddrTable_count; i++) {
- ai = &AddrTable[i];
+ for (i = 0; i < AddrTable_count[PROCID_TO_IPU(procHandle->procId)];
+ i++) {
+ ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][i];
startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt];
endAddr = startAddr + ai->size;
}
if (*dstAddr == -1u) {
- if (!object->params.mmuEnable) {
- /* default to direct mapping (i.e. v=p) */
- *dstAddr = srcAddr;
- GT_2trace(curTrace, GT_1CLASS, "VAYUIPUCORE0PROC_translate: "
- "(default) srcAddr=0x%x --> dstAddr=0x%x",
- srcAddr, *dstAddr);
- }
- else {
- /* srcAddr not found in slave address space */
- status = PROCESSOR_E_INVALIDARG;
- GT_setFailureReason(curTrace, GT_4CLASS,
- "VAYUIPUCORE0PROC_translate", status,
- "srcAddr not found in slave address space");
- }
+ /* srcAddr not found in slave address space */
+ status = PROCESSOR_E_INVALIDARG;
+ GT_setFailureReason(curTrace, GT_4CLASS,
+ "VAYUIPUCORE0PROC_translate", status,
+ "srcAddr not found in slave address space");
}
#if !defined(SYSLINK_BUILD_OPTIMIZE)
}
UInt32 i;
UInt32 j;
ProcMgr_AddrInfo * ai = NULL;
- VAYUIPU_HalMmuCtrlArgs_AddEntry addEntryArgs;
GT_4trace(curTrace, GT_ENTER, "VAYUIPUCORE0PROC_map:",
handle, *dstAddr, nSegs, sglist);
* is required. Add the entry only if the range does not exist
* in the translation table.
*/
+ for (j = 0;
+ j < AddrTable_count[PROCID_TO_IPU(procHandle->procId)]; j++) {
+ ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][j];
- /* check in static entries first */
- for (j = 0; j < AddrTable_STATIC_COUNT; j++) {
- ai = &AddrTable[j];
- startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt];
- endAddr = startAddr + ai->size;
-
- if ((startAddr <= *dstAddr) && (*dstAddr < endAddr)) {
- found = TRUE;
- /* refCount does not need to be incremented for static entries */
- break;
- }
- }
+ if (ai->isMapped == TRUE) {
+ startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt];
+ endAddr = startAddr + ai->size;
- /* if not found in static entries, check in dynamic entries */
- if (!found) {
- for (j = AddrTable_STATIC_COUNT; j < AddrTable_count; j++) {
- ai = &AddrTable[j];
-
- if (ai->isMapped == TRUE) {
- startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt];
- endAddr = startAddr + ai->size;
-
- if ((startAddr <= *dstAddr) && (*dstAddr < endAddr)
- && ((*dstAddr + sglist[i].size) <= endAddr)) {
- found = TRUE;
- ai->refCount++;
- break;
- }
+ if ((startAddr <= *dstAddr) && (*dstAddr < endAddr)
+ && ((*dstAddr + sglist[i].size) <= endAddr)) {
+ found = TRUE;
+ ai->refCount++;
+ break;
}
}
}
* the assumption is that the ammu will be used.
*/
if (!found) {
- if (object->params.mmuEnable) {
- if (AddrTable_count != AddrTable_SIZE) {
- ai = &AddrTable[AddrTable_count];
-
- ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u;
- ai->addr[ProcMgr_AddrType_MasterUsrVirt] = -1u;
- ai->addr[ProcMgr_AddrType_MasterPhys] = sglist[i].paddr;
- ai->addr[ProcMgr_AddrType_SlaveVirt] = *dstAddr;
- ai->addr[ProcMgr_AddrType_SlavePhys] = -1u;
- ai->size = sglist[i].size;
- ai->isCached = sglist[i].isCached;
- ai->refCount++;
+ if (AddrTable_count[PROCID_TO_IPU(procHandle->procId)] !=
+ AddrTable_SIZE) {
+ ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)]
+ [AddrTable_count[PROCID_TO_IPU
+ (procHandle->procId)]];
+ ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u;
+ ai->addr[ProcMgr_AddrType_MasterUsrVirt] = -1u;
+ ai->addr[ProcMgr_AddrType_MasterPhys] = sglist[i].paddr;
+ ai->addr[ProcMgr_AddrType_SlaveVirt] = *dstAddr;
+ ai->addr[ProcMgr_AddrType_SlavePhys] = -1u;
+ ai->size = sglist[i].size;
+ ai->isCached = sglist[i].isCached;
+ ai->refCount++;
+ ai->isMapped = TRUE;
- AddrTable_count++;
- }
- else {
- status = PROCESSOR_E_FAIL;
- GT_setFailureReason(curTrace, GT_4CLASS,
- "VAYUIPUCORE0PROC_map", status,
- "AddrTable_SIZE reached!");
- }
+ AddrTable_count[PROCID_TO_IPU(procHandle->procId)]++;
}
else {
- /* if mmu disabled, AddrTable not updated */
- ai = NULL;
- }
- }
-
- /* if new entry, map into dsp mmu */
- if ((ai != NULL) && (ai->refCount == 1) && (status >= 0)) {
- ai->isMapped = TRUE;
-
- if (object->params.mmuEnable) {
- /* add entry to L2 MMU */
- addEntryArgs.masterPhyAddr = sglist [i].paddr;
- addEntryArgs.size = sglist [i].size;
- addEntryArgs.slaveVirtAddr = (UInt32)*dstAddr;
- /* TBD: elementSize, endianism, mixedSized are
- * hard coded now, must be configurable later
- */
- addEntryArgs.elementSize = ELEM_SIZE_16BIT;
- addEntryArgs.endianism = LITTLE_ENDIAN;
- addEntryArgs.mixedSize = MMU_TLBES;
-
- status = VAYUIPU_halMmuCtrl(object->halObject,
- Processor_MmuCtrlCmd_AddEntry, &addEntryArgs);
-
-#if !defined(SYSLINK_BUILD_OPTIMIZE)
- if (status < 0) {
- GT_setFailureReason(curTrace, GT_4CLASS,
- "VAYUIPUCORE0PROC_map", status,
- "Processor_MmuCtrlCmd_AddEntry failed");
- }
-#endif
+ status = PROCESSOR_E_FAIL;
+ GT_setFailureReason(curTrace, GT_4CLASS,
+ "VAYUIPUCORE0PROC_map", status,
+ "AddrTable_SIZE reached!");
}
}
-#if !defined(SYSLINK_BUILD_OPTIMIZE)
- if (status < 0) {
- GT_setFailureReason(curTrace, GT_4CLASS,
- "VAYUIPUCORE0PROC_map", status,
- "IPUCORE0 MMU configuration failed");
- }
-#endif
}
#if !defined(SYSLINK_BUILD_OPTIMIZE)
}
object = (VAYUIPUCORE0PROC_Object *) procHandle->object;
GT_assert (curTrace, (object != NULL));
- /* Delete dynamically added non-default entries from translation
+ /* Delete added entries from translation
* table only in last unmap called on that entry
*/
- for (i = AddrTable_STATIC_COUNT; i < AddrTable_count; i++) {
- ai = &AddrTable[i];
+ for (i = 0;
+ i < AddrTable_count[PROCID_TO_IPU(procHandle->procId)]; i++) {
+ ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][i];
if (!ai->isMapped) {
continue;
ai->mapMask = 0u;
ai->isMapped = FALSE;
- if (object->params.mmuEnable) {
- /* Remove the entry from the IPUCORE0 MMU also */
- deleteEntryArgs.size = size;
- deleteEntryArgs.slaveVirtAddr = addr;
- /* TBD: elementSize, endianism, mixedSized are
- * hard coded now, must be configurable later
- */
- deleteEntryArgs.elementSize = ELEM_SIZE_16BIT;
- deleteEntryArgs.endianism = LITTLE_ENDIAN;
- deleteEntryArgs.mixedSize = MMU_TLBES;
+ /* Remove the entry from the IPUCORE0 MMU also */
+ deleteEntryArgs.size = size;
+ deleteEntryArgs.slaveVirtAddr = addr;
+ /* TBD: elementSize, endianism, mixedSized are
+ * hard coded now, must be configurable later
+ */
+ deleteEntryArgs.elementSize = ELEM_SIZE_16BIT;
+ deleteEntryArgs.endianism = LITTLE_ENDIAN;
+ deleteEntryArgs.mixedSize = MMU_TLBES;
- status = VAYUIPU_halMmuCtrl(object->halObject,
- Processor_MmuCtrlCmd_DeleteEntry, &deleteEntryArgs);
+ status = VAYUIPU_halMmuCtrl(object->halObject,
+ Processor_MmuCtrlCmd_DeleteEntry, &deleteEntryArgs);
#if !defined(SYSLINK_BUILD_OPTIMIZE)
- if (status < 0) {
- GT_setFailureReason(curTrace, GT_4CLASS,
- "VAYUIPUCORE0PROC_unmap", status,
- "IPUCORE0 MMU configuration failed");
- }
-#endif
+ if (status < 0) {
+ GT_setFailureReason(curTrace, GT_4CLASS,
+ "VAYUIPUCORE0PROC_unmap", status,
+ "IPUCORE0 MMU configuration failed");
}
+#endif
}
}
}