Fix error from calling MultiProc_getId with non-SMP IPU core name on OMAP5 QNX
[ipc/ipcdev.git] / qnx / src / ipc3x_dev / ti / syslink / family / omap5430 / ipu / ipu_pm.c
index 0a7ac1ca1b69507566cfa8ef51adffe0ee9490b4..9ff332c09bcf119a6511369ffaf6f671b32c66a4 100644 (file)
@@ -1,5 +1,5 @@
 /*
- *  Copyright (c) 2011-2013, Texas Instruments Incorporated
+ *  Copyright (c) 2011-2014, Texas Instruments Incorporated
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
@@ -187,9 +187,9 @@ typedef struct GPTIMER_REGS {
     uint32_t tcar2;
 } GPTIMER_REGS;
 
-#define OMAP44XX_IRQ_GPT6 74
-#define OMAP44XX_IRQ_GPT9 77
-#define OMAP44XX_IRQ_GPT11 79
+#define OMAP54XX_IRQ_GPT6 74
+#define OMAP54XX_IRQ_GPT9 77
+#define OMAP54XX_IRQ_GPT11 79
 
 #define GPTIMER3_BASE        0x48034000
 #define GPTIMER4_BASE        0x48036000
@@ -589,7 +589,11 @@ static Bool ipu_pm_gptimer_interrupt(Ptr fxnArgs)
 {
     int num;
     uint16_t core0_id = MultiProc_getId(CORE0);
+#ifndef SYSLINK_SYSBIOS_SMP
     uint16_t core1_id = MultiProc_getId("CORE1");
+#else
+    uint16_t core1_id = core0_id;
+#endif
     uint16_t dsp_id = MultiProc_getId("DSP");
 
     switch ((uint32_t)fxnArgs) {
@@ -1138,7 +1142,6 @@ int ipu_pm_ivahd_disable()
         /* Ensure that the wake up mode is set to SW_WAKEUP */
         out32(cm_base + cm_iva_clkstctrl_offset, 0x00000002);
 
-#ifndef OMAP5_VIRTIO
         /* Check the standby status */
         do {
             if (((in32(cm_base + cm_iva_iva_clkctrl_offset) & 0x00040000) != 0x0))
@@ -1147,11 +1150,10 @@ int ipu_pm_ivahd_disable()
         if (max_tries == 0) {
             GT_0trace(curTrace, GT_4CLASS," ** Error in IVAHD standby status");
         }
-#endif
 
         // IVAHD_CM2:CM_IVAHD_IVAHD_CLKCTRL
         out32(cm_base + cm_iva_iva_clkctrl_offset, 0x00000000);
-#ifndef OMAP5_VIRTIO
+
         max_tries = 100;
         do {
             if((in32(cm_base + cm_iva_iva_clkctrl_offset) & 0x00030000) == 0x30000)
@@ -1160,11 +1162,10 @@ int ipu_pm_ivahd_disable()
         if (max_tries == 0) {
            GT_0trace(curTrace, GT_4CLASS," ** Error in IVAHD standby status");
         }
-#endif
 
         // IVAHD_CM2:CM_IVAHD_SL2_CLKCTRL
         out32(cm_base + cm_iva_sl2_clkctrl_offset, 0x00000000);
-#ifndef OMAP5_VIRTIO
+
         max_tries = 100;
         do {
             if((in32(cm_base + cm_iva_sl2_clkctrl_offset) & 0x00030000) == 0x30000);
@@ -1173,18 +1174,16 @@ int ipu_pm_ivahd_disable()
         if (max_tries == 0) {
             GT_0trace(curTrace, GT_4CLASS," ** Error in SL2 CLKCTRL");
         }
-#endif
 
         /* put IVA into HW Auto mode */
         out32(cm_base + cm_iva_clkstctrl_offset, 0x00000003);
 
         max_tries = 100;
         /* Check CLK ACTIVITY bit */
-#ifndef OMAP5_VIRTIO
+
         while(((in32(cm_base + cm_iva_clkstctrl_offset) & 0x00000100) != 0x0) && --max_tries);
         if (max_tries == 0)
             GT_0trace(curTrace, GT_4CLASS, "SYSLINK: ivahd_disable: WARNING - CLK ACTIVITY bit did not go off");
-#endif
 
         // IVA sub-system resets - Assert reset for IVA logic and SL2
         out32(pm_base + rm_iva_rstctrl_offset, 0x00000004);
@@ -1274,12 +1273,10 @@ int ipu_pm_ivahd_enable()
         /* Ensure that the wake up mode is set to SW_WAKEUP */
         out32(cm_base + cm_iva_clkstctrl_offset, 0x00000002);
 
-#ifndef OMAP5_VIRTIO
         max_tries = 100;
         while(((in32(pm_base + pm_iva_pwrstst_offset) & 0x00100000) != 0) && --max_tries);
         if (max_tries == 0)
             GT_0trace(curTrace, GT_4CLASS, "SYSLINK: ivahd_enable: WARNING - PwrSt did not transition");
-#endif
 
         // IVAHD_CM2:CM_IVAHD_IVAHD_CLKCTRL
         out32(cm_base + cm_iva_iva_clkctrl_offset, 0x00000001);
@@ -1288,18 +1285,16 @@ int ipu_pm_ivahd_enable()
         out32(cm_base + cm_iva_sl2_clkctrl_offset, 0x00000001);
 
         /* Wait until the CLK_ACTIVITY bit is set */
-#ifndef OMAP5_VIRTIO
         max_tries = 100;
         while (((in32(cm_base + cm_iva_clkstctrl_offset) & 0x00000100) == 0x0) && --max_tries);
         if (max_tries == 0)
             GT_0trace(curTrace, GT_4CLASS, "SYSLINK: ivahd_enable: WARNING - Clk_ACTIVITY bit is not set");
-#endif
 
         /* Release ICONT1 and SL2/IVAHD first, wait for few usec  then release ICONT2 */
         reg = in32(pm_base + rm_iva_rstctrl_offset);
         reg &= 0xFFFFFFFB;
         out32(pm_base + rm_iva_rstctrl_offset, reg);
-#ifndef OMAP5_VIRTIO
+
         max_tries = 100;
         usleep(100);
         do {
@@ -1351,7 +1346,6 @@ int ipu_pm_ivahd_enable()
             GT_0trace(curTrace, GT_4CLASS," ** SL2 is not functional");
             return -EIO;
         }
-#endif
     } else {
         GT_0trace(curTrace, GT_3CLASS, "ivahd already acquired");
     }
@@ -1646,7 +1640,7 @@ static int ipu_pm_powman_init(void)
     /* get IVA OPPs   */
     dvfsMessage.dvfs.type   = getListOfDomainOPPs;
     dvfsMessage.dvfs.domain = CPUDLL_OMAP_IVA;
-    if (MsgSend( cpudll_coid, &dvfsMessage, sizeof( dvfsMessage ), &cpudll_iva_opp, sizeof(cpudll_iva_opp) ) == -1)     {
+    if (MsgSend( cpudll_coid, &dvfsMessage, sizeof( dvfsMessage ), &cpudll_iva_opp, sizeof(cpudll_iva_opp) ) == -1)  {
         GT_setFailureReason(curTrace, GT_4CLASS, "powman_init", ENOMEM,
                             "Could not get list of IVA OPPs.");
         return -ENOMEM;
@@ -2186,7 +2180,7 @@ int ipu_pm_attach(int proc_id)
         ipu_pm_gpt_enable(GPTIMER_9);
         isrParams.checkAndClearFxn = ipu_pm_clr_gptimer_interrupt;
         isrParams.fxnArgs = (Ptr)GPTIMER_9;
-        isrParams.intId = OMAP44XX_IRQ_GPT9;
+        isrParams.intId = OMAP54XX_IRQ_GPT9;
         isrParams.sharedInt = FALSE;
         ipu_pm_state.gpt9IsrObject =
             OsalIsr_create(&ipu_pm_gptimer_interrupt,
@@ -2209,7 +2203,7 @@ int ipu_pm_attach(int proc_id)
         ipu_pm_gpt_enable(GPTIMER_11);
         isrParams.checkAndClearFxn = ipu_pm_clr_gptimer_interrupt;
         isrParams.fxnArgs = (Ptr)GPTIMER_11;
-        isrParams.intId = OMAP44XX_IRQ_GPT11;
+        isrParams.intId = OMAP54XX_IRQ_GPT11;
         isrParams.sharedInt = FALSE;
         ipu_pm_state.gpt11IsrObject =
             OsalIsr_create(&ipu_pm_gptimer_interrupt,
@@ -2230,7 +2224,7 @@ int ipu_pm_attach(int proc_id)
         ipu_pm_gpt_enable(GPTIMER_6);
         isrParams.checkAndClearFxn = ipu_pm_clr_gptimer_interrupt;
         isrParams.fxnArgs = (Ptr)GPTIMER_6;
-        isrParams.intId = OMAP44XX_IRQ_GPT6;
+        isrParams.intId = OMAP54XX_IRQ_GPT6;
         isrParams.sharedInt = FALSE;
         ipu_pm_state.gpt6IsrObject =
             OsalIsr_create(&ipu_pm_gptimer_interrupt,