Add support for watchdog timers for DSP1 and IPU1 in QNX
authorvwan@ti.com <vwan@ti.com>
Tue, 31 Mar 2015 19:59:33 +0000 (12:59 -0700)
committerRobert Tivy <rtivy@ti.com>
Fri, 17 Apr 2015 22:16:49 +0000 (15:16 -0700)
commitb08a45476307f471337fa49e426a3db11eb62c31
tree037b978720af1ff37ff6cf50051ee5c154295b5b
parent6c1c4d76a938c8d4cecc1d6590b0ef010e623e81
Add support for watchdog timers for DSP1 and IPU1 in QNX

This commit refactors the code that manages the GP Timers to allow more
timers to be used as watchdog timers. Namely, interrupts from timers
7, 8 and 10 all trigger recovery, being used as watchdog timers for IPU1
and DSP1.

The list of watchdog timers to CPU assignment can now be configured in
qnx/src/cfg/dra7xx/GptCfg.c.

Signed-off-by: VW <vwan@ti.com>
qnx/src/cfg/dra7xx/GptCfg.c [new file with mode: 0644]
qnx/src/ipc3x_dev/ti/syslink/build/Qnx/resmgr/common.mk
qnx/src/ipc3x_dev/ti/syslink/family/vayu/Gpt.c [moved from qnx/src/ipc3x_dev/ti/syslink/family/vayu/gptimers.c with 55% similarity]
qnx/src/ipc3x_dev/ti/syslink/family/vayu/Gpt.h [moved from qnx/src/ipc3x_dev/ti/syslink/family/vayu/gptimers.h with 71% similarity]
qnx/src/ipc3x_dev/ti/syslink/family/vayu/Platform.c
qnx/src/ipc3x_dev/ti/syslink/ipc/hlos/knl/Ipc.c