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raw | patch | inline | side by side (parent: 0bc87de)
raw | patch | inline | side by side (parent: 0bc87de)
| author | Robert Tivy <rtivy@ti.com> | |
| Wed, 16 Apr 2014 00:51:15 +0000 (17:51 -0700) | ||
| committer | Robert Tivy <rtivy@ti.com> | |
| Mon, 19 May 2014 23:28:23 +0000 (16:28 -0700) |
The ti/deh package supports DSPs and IPUs, although the DSP support
needs some further work (Exception "dump" from SYS/BIOS when watchdog
fires is not valid, all zeroes for now).
The ti/ipc/tests have Deh/Watchdog enabled for IPU on OMAP5 and IPU2
on DRA7XX.
The new content contained herein originally came from:
http://git.omapzoom.org/?p=repo/sysbios-rpmsg.git;a=summary
The repo HEAD at the time of copying was:
commit 18c2b758f0674ee0baf95603248c6303afd9c854
This repo supported Deh/Watchdog for OMAP4/5.
needs some further work (Exception "dump" from SYS/BIOS when watchdog
fires is not valid, all zeroes for now).
The ti/ipc/tests have Deh/Watchdog enabled for IPU on OMAP5 and IPU2
on DRA7XX.
The new content contained herein originally came from:
http://git.omapzoom.org/?p=repo/sysbios-rpmsg.git;a=summary
The repo HEAD at the time of copying was:
commit 18c2b758f0674ee0baf95603248c6303afd9c854
This repo supported Deh/Watchdog for OMAP4/5.
24 files changed:
diff --git a/.gitignore b/.gitignore
index 2310fbeebb104bdbff4a4449b1b93523b2aa5d43..89703178c2ae994cfd6b132ebcb66cd4c3362ffb 100644 (file)
--- a/.gitignore
+++ b/.gitignore
packages/ti/sdo/ipc/*/*.h
packages/ti/sdo/ipc/*/*/*.h
packages/ti/sdo/utils/*.h
+packages/ti/deh/*.h
packages/ti/ipc/family/omapl138/VirtQueue.h
packages/ti/ipc/family/tci6614/Interrupt.h
packages/ti/ipc/family/tci6614/NotifySetup.h
diff --git a/packages/ti/deh/Deh.c b/packages/ti/deh/Deh.c
--- /dev/null
+++ b/packages/ti/deh/Deh.c
@@ -0,0 +1,346 @@
+/*
+ * Copyright (c) 2011-2014, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * ======== Deh.c ========
+ *
+ */
+
+#include <xdc/runtime/Assert.h>
+#include <xdc/runtime/System.h>
+#include <xdc/runtime/Error.h>
+#include <xdc/runtime/Startup.h>
+#include <xdc/runtime/Memory.h>
+#include <xdc/runtime/Types.h>
+
+#include <ti/sysbios/BIOS.h>
+#include <ti/sysbios/knl/Swi.h>
+#define ti_sysbios_knl_Task__internalaccess
+#include <ti/sysbios/knl/Task.h>
+#include <ti/sysbios/hal/ammu/AMMU.h>
+#include <ti/sysbios/family/arm/m3/Hwi.h>
+
+#include <ti/ipc/MultiProc.h>
+#include <ti/trace/StackDbg.h>
+#include <ti/deh/Watchdog.h>
+
+/* TBD: VirtQueue.h needs to somehow get factored out of family directory .*/
+#if defined(OMAP5)
+#include <ti/ipc/family/omap54xx/VirtQueue.h>
+#elif defined(VAYU)
+#include <ti/ipc/family/vayu/VirtQueue.h>
+#else
+#error unknown processor! (supports only OMAP5 & VAYU IPU)
+#endif
+
+#include "package/internal/Deh.xdc.h"
+
+/*
+ * ======== Deh_Module_startup ========
+ */
+Int Deh_Module_startup(Int phase)
+{
+ if (AMMU_Module_startupDone() == TRUE) {
+ Watchdog_init(ti_sysbios_family_arm_m3_Hwi_excHandlerAsm__I);
+ return Startup_DONE;
+ }
+
+ return Startup_NOTDONE;
+}
+
+/*
+ * ======== Deh_idleBegin ========
+ */
+Void Deh_idleBegin(Void)
+{
+ Watchdog_idleBegin();
+}
+
+/*
+ * ======== dump_hex ========
+ */
+static Void dump_hex(UInt base, UInt len, UInt start)
+{
+ UInt top;
+
+ len = (len + 7) & ~7;
+ top = base + len * sizeof(UInt);
+ start = start & ~31;
+ for (; start < top; start += 8 * sizeof(UInt)) {
+ System_printf("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ start, ((UInt *)start)[0], ((UInt *)start)[1],
+ ((UInt *)start)[2], ((UInt *)start)[3], ((UInt *)start)[4],
+ ((UInt *)start)[5], ((UInt *)start)[6], ((UInt *)start)[7]);
+ }
+}
+
+/*
+ * ======== printStackEntry ========
+ */
+static Bool printStackEntry(struct StackDbg_StackEntry *entry, Void *user)
+{
+ UInt *cnt = (UInt *)user;
+
+ if (entry->bogus) {
+ System_printf(" -- [op %08x] %08x\n", entry->op, entry->ret);
+ }
+ else {
+ if (entry->target) {
+ System_printf(" %02d [op %08x] %08x (ret from call to %08x)\n",
+ (*cnt)++, entry->op, entry->ret, entry->target);
+ }
+ else {
+ System_printf(" %02d [op %08x] %08x\n", (*cnt)++, entry->op,
+ entry->sp);
+ }
+ }
+
+ return TRUE;
+}
+
+/*
+ * ======== Deh_excHandler ========
+ * Read data from HWI exception handler and print it to crash dump buffer.
+ * Notify host that exception has occurred.
+ */
+Void Deh_excHandler(UInt *excStack, UInt lr)
+{
+ Hwi_ExcContext exc;
+ Deh_ExcRegs *excRegs;
+ Char *ttype;
+ UInt excNum;
+ Char *etype;
+ Char *name;
+ UInt sCnt = 0;
+
+ excRegs = (Deh_ExcRegs *) Deh_module->outbuf;
+
+ /* Copy registers from stack to excContext */
+ excRegs->r0 = exc.r0 = (Ptr)excStack[8]; /* r0 */
+ excRegs->r1 = exc.r1 = (Ptr)excStack[9]; /* r1 */
+ excRegs->r2 = exc.r2 = (Ptr)excStack[10]; /* r2 */
+ excRegs->r3 = exc.r3 = (Ptr)excStack[11]; /* r3 */
+ excRegs->r4 = exc.r4 = (Ptr)excStack[0]; /* r4 */
+ excRegs->r5 = exc.r5 = (Ptr)excStack[1]; /* r5 */
+ excRegs->r6 = exc.r6 = (Ptr)excStack[2]; /* r6 */
+ excRegs->r7 = exc.r7 = (Ptr)excStack[3]; /* r7 */
+ excRegs->r8 = exc.r8 = (Ptr)excStack[4]; /* r8 */
+ excRegs->r9 = exc.r9 = (Ptr)excStack[5]; /* r9 */
+ excRegs->r10 = exc.r10 = (Ptr)excStack[6]; /* r10 */
+ excRegs->r11 = exc.r11 = (Ptr)excStack[7]; /* r11 */
+ excRegs->r12 = exc.r12 = (Ptr)excStack[12]; /* r12 */
+ excRegs->sp = exc.sp = (Ptr)(UInt32)(excStack+16); /* sp */
+ excRegs->lr = exc.lr = (Ptr)excStack[13]; /* lr */
+ excRegs->pc = exc.pc = (Ptr)excStack[14]; /* pc */
+ excRegs->psr = exc.psr = (Ptr)excStack[15]; /* psr */
+
+ exc.threadHandle = NULL;
+ exc.threadStack = NULL;
+ exc.threadStackSize = 0;
+
+ exc.threadType = BIOS_getThreadType();
+ switch (exc.threadType) {
+ case BIOS_ThreadType_Task:
+ if (BIOS_taskEnabled == TRUE) {
+ exc.threadHandle = (Ptr)Task_self();
+ exc.threadStack = (Task_self())->stack;
+ exc.threadStackSize = (Task_self())->stackSize;
+ }
+ break;
+ case BIOS_ThreadType_Swi:
+ if (BIOS_swiEnabled == TRUE) {
+ exc.threadHandle = (Ptr)Swi_self();
+ exc.threadStack = Deh_module->isrStackBase;
+ exc.threadStackSize = Deh_module->isrStackSize;
+ }
+ break;
+ case BIOS_ThreadType_Hwi:
+ case BIOS_ThreadType_Main:
+ exc.threadHandle = NULL;
+ exc.threadStack = Deh_module->isrStackBase;
+ exc.threadStackSize = Deh_module->isrStackSize;
+ break;
+ default:
+ exc.threadHandle = NULL;
+ exc.threadStack = NULL;
+ exc.threadStackSize = 0;
+ break;
+ }
+
+ excRegs->ICSR = exc.ICSR = (Ptr)Hwi_nvic.ICSR;
+ excRegs->MMFSR = exc.MMFSR = (Ptr)Hwi_nvic.MMFSR;
+ excRegs->BFSR = exc.BFSR = (Ptr)Hwi_nvic.BFSR;
+ excRegs->UFSR = exc.UFSR = (Ptr)Hwi_nvic.UFSR;
+ excRegs->HFSR = exc.HFSR = (Ptr)Hwi_nvic.HFSR;
+ excRegs->DFSR = exc.DFSR = (Ptr)Hwi_nvic.DFSR;
+ excRegs->MMAR = exc.MMAR = (Ptr)Hwi_nvic.MMAR;
+ excRegs->BFAR = exc.BFAR = (Ptr)Hwi_nvic.BFAR;
+ excRegs->AFSR = exc.AFSR = (Ptr)Hwi_nvic.AFSR;
+
+ /* Force MAIN threadtype So we can safely call System_printf */
+ BIOS_setThreadType(BIOS_ThreadType_Main);
+
+ excNum = Hwi_nvic.ICSR & 0xff;
+ if (Watchdog_isException(excNum)) {
+ etype = "Watchdog fired";
+ }
+ else {
+ VirtQueue_postCrashToMailbox();
+ etype = "Exception occurred";
+ }
+
+ System_printf("%s at (PC) = %08x\n", etype, exc.pc);
+
+ switch (lr) {
+ case 0xfffffff1:
+ System_printf("CPU context: ISR\n");
+ break;
+ case 0xfffffff9:
+ case 0xfffffffd:
+ System_printf("CPU context: thread\n");
+ break;
+ default:
+ System_printf("CPU context: unknown. LR: %08x\n", lr);
+ break;
+ }
+
+ switch (exc.threadType) {
+ case BIOS_ThreadType_Task: {
+ ttype = "Task";
+ break;
+ }
+ case BIOS_ThreadType_Swi: {
+ ttype = "Swi";
+ break;
+ }
+ case BIOS_ThreadType_Hwi: {
+ ttype = "Hwi";
+ break;
+ }
+ case BIOS_ThreadType_Main: {
+ ttype = "Main";
+ break;
+ }
+ default:
+ ttype = "Invalid!";
+ break;
+ }
+
+ if (exc.threadHandle) {
+ if (exc.threadType == BIOS_ThreadType_Task) {
+ name = Task_Handle_name(exc.threadHandle);
+ }
+ else {
+ name = Swi_Handle_name(exc.threadHandle);
+ }
+ if (!name) {
+ name = "(unnamed)";
+ }
+ }
+ else {
+ name = "(null task)";
+ }
+ System_printf("BIOS %s name: %s handle: 0x%x.\n", ttype, name,
+ exc.threadHandle);
+
+ System_printf("BIOS %s stack base: 0x%x.\n", ttype, exc.threadStack);
+ System_printf("BIOS %s stack size: 0x%x.\n", ttype, exc.threadStackSize);
+
+ switch (excNum) {
+ case 2:
+ ti_sysbios_family_arm_m3_Hwi_excNmi(excStack);
+ break;
+ case 3:
+ ti_sysbios_family_arm_m3_Hwi_excHardFault(excStack);
+ break;
+ case 4:
+ ti_sysbios_family_arm_m3_Hwi_excMemFault(excStack);
+ break;
+ case 5:
+ ti_sysbios_family_arm_m3_Hwi_excBusFault(excStack);
+ break;
+ case 6:
+ ti_sysbios_family_arm_m3_Hwi_excUsageFault(excStack);
+ break;
+ case 11:
+ ti_sysbios_family_arm_m3_Hwi_excSvCall(excStack);
+ break;
+ case 12:
+ ti_sysbios_family_arm_m3_Hwi_excDebugMon(excStack);
+ break;
+ case 7:
+ case 8:
+ case 9:
+ case 10:
+ case 13:
+ ti_sysbios_family_arm_m3_Hwi_excReserved(excStack, excNum);
+ break;
+ default:
+ if (!Watchdog_isException(excNum)) {
+ ti_sysbios_family_arm_m3_Hwi_excNoIsr(excStack, excNum);
+ }
+ break;
+ }
+
+ System_printf ("R0 = 0x%08x R8 = 0x%08x\n", exc.r0, exc.r8);
+ System_printf ("R1 = 0x%08x R9 = 0x%08x\n", exc.r1, exc.r9);
+ System_printf ("R2 = 0x%08x R10 = 0x%08x\n", exc.r2, exc.r10);
+ System_printf ("R3 = 0x%08x R11 = 0x%08x\n", exc.r3, exc.r11);
+ System_printf ("R4 = 0x%08x R12 = 0x%08x\n", exc.r4, exc.r12);
+ System_printf ("R5 = 0x%08x SP(R13) = 0x%08x\n", exc.r5, exc.sp);
+ System_printf ("R6 = 0x%08x LR(R14) = 0x%08x\n", exc.r6, exc.lr);
+ System_printf ("R7 = 0x%08x PC(R15) = 0x%08x\n", exc.r7, exc.pc);
+ System_printf ("PSR = 0x%08x\n", exc.psr);
+ System_printf ("ICSR = 0x%08x\n", Hwi_nvic.ICSR);
+ System_printf ("MMFSR = 0x%02x\n", Hwi_nvic.MMFSR);
+ System_printf ("BFSR = 0x%02x\n", Hwi_nvic.BFSR);
+ System_printf ("UFSR = 0x%04x\n", Hwi_nvic.UFSR);
+ System_printf ("HFSR = 0x%08x\n", Hwi_nvic.HFSR);
+ System_printf ("DFSR = 0x%08x\n", Hwi_nvic.DFSR);
+ System_printf ("MMAR = 0x%08x\n", Hwi_nvic.MMAR);
+ System_printf ("BFAR = 0x%08x\n", Hwi_nvic.BFAR);
+ System_printf ("AFSR = 0x%08x\n", Hwi_nvic.AFSR);
+
+ System_printf ("Stack trace\n");
+ StackDbg_walkStack((UInt)exc.threadStack, (UInt)exc.threadStackSize,
+ (UInt)exc.sp, printStackEntry, &sCnt);
+
+ System_printf ("Stack dump base %08x size %ld sp %08x:\n", exc.threadStack,
+ exc.threadStackSize, exc.sp);
+ dump_hex((UInt)exc.threadStack, exc.threadStackSize / sizeof(UInt),
+ (UInt)exc.sp);
+
+ System_abort("Terminating execution...\n");
+
+}
+
diff --git a/packages/ti/deh/Deh.xdc b/packages/ti/deh/Deh.xdc
--- /dev/null
+++ b/packages/ti/deh/Deh.xdc
@@ -0,0 +1,140 @@
+/*
+ * Copyright (c) 2011-2014, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== Deh.xdc ========
+ *
+ */
+
+import ti.sysbios.knl.Task;
+import ti.sysbios.knl.Swi;
+
+/*!
+ * ======== Deh ========
+ * Device Error Handler
+ *
+ * Exceptions that are unrecoverable need to be communicated to
+ * the host processor so that it can print debug information, do
+ * resource cleanup and ultimately reload a slave processor. The
+ * notification mechanism for sending events to the host processor
+ * has been consolidated in this module.
+ */
+
+@Template("./Deh.xdt")
+@ModuleStartup
+module Deh {
+
+ /*!
+ * Exception Registers
+ *
+ * Exception registers that will be filled in by the exception handler.
+ * NOTE: This is currently handling only ARM cores.
+ */
+ struct ExcRegs {
+ Ptr r0; /* CPU registers */
+ Ptr r1;
+ Ptr r2;
+ Ptr r3;
+ Ptr r4;
+ Ptr r5;
+ Ptr r6;
+ Ptr r7;
+ Ptr r8;
+ Ptr r9;
+ Ptr r10;
+ Ptr r11;
+ Ptr r12;
+ Ptr sp;
+ Ptr lr;
+ Ptr pc;
+ Ptr psr;
+ Ptr ICSR; /* NVIC registers */
+ Ptr MMFSR;
+ Ptr BFSR;
+ Ptr UFSR;
+ Ptr HFSR;
+ Ptr DFSR;
+ Ptr MMAR;
+ Ptr BFAR;
+ Ptr AFSR;
+ };
+
+ /*!
+ * Crash dump buffer size
+ *
+ * Size of the buffer that will be used to store the crash dump data.
+ *
+ * Default is 0x200 bytes
+ */
+ config SizeT bufSize = 0x200;
+
+ /*!
+ * ======== sectionName ========
+ * Section where the internal character crashdump buffer is placed
+ */
+ metaonly config String sectionName = null;
+
+ /*!
+ * ======== excHandler ========
+ * The exception handler function to be plugged into the hook exposed by
+ * BIOS for M3/M4 targets.
+ *
+ * @param(excStack) Stack pointer containing the exception data
+ * @param(lr) Link register value
+ */
+ Void excHandler(UInt *excStack, UInt lr);
+
+ /*!
+ * ======== excHandlerDsp ========
+ * Exception handler function to be plugged into the BIOS exception hook
+ * for C6x targets.
+ */
+ Void excHandlerDsp();
+
+ /*!
+ * ======== idleBegin ========
+ * Idle function to be added to the Idle task. This function will be
+ * deprecated soon, and replaced directly with the equivalent function
+ * in the Watchdog module.
+ */
+ Void idleBegin();
+
+
+internal: /* not for client use */
+
+ /*! Module state structure */
+ struct Module_State {
+ Char outbuf[]; /* the output buffer */
+ SizeT isrStackSize; /* stack info for ISR/SWI */
+ Ptr isrStackBase;
+ };
+}
diff --git a/packages/ti/deh/Deh.xdt b/packages/ti/deh/Deh.xdt
--- /dev/null
+++ b/packages/ti/deh/Deh.xdt
@@ -0,0 +1,39 @@
+%%{
+/*
+ * Copyright (c) 2011-2014, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+%%}
+%var Deh = xdc.module("ti.deh.Deh");
+%if (Deh.bufSize != 0) {
+
+#pragma DATA_SECTION(ti_deh_Deh_Module_State_0_outbuf__A, ".errorbuf");
+
+%} /* bufSize != 0 */
diff --git a/packages/ti/deh/Deh.xs b/packages/ti/deh/Deh.xs
--- /dev/null
+++ b/packages/ti/deh/Deh.xs
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2011-2014, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== Deh.xs ========
+ *
+ */
+
+var Deh = null;
+var MultiProc = null;
+var Hwi = null;
+
+/*
+ * ======== module$use ========
+ */
+function module$use()
+{
+ var Swi = null;
+ var Task = null;
+ var Exception = null;
+ var Settings = xdc.module("ti.sysbios.family.Settings");
+
+ Deh = this;
+
+ xdc.useModule('xdc.runtime.System');
+
+ Hwi = xdc.useModule(Settings.getDefaultHwiDelegate());
+ MultiProc = xdc.module('ti.sdo.utils.MultiProc');
+
+ if ((Program.build.target.name.match(/C64T/)) ||
+ (Program.build.target.name.match(/C66/))) {
+ Exception = xdc.useModule("ti.sysbios.family.c64p.Exception");
+ Exception.exceptionHook = Deh.excHandlerDsp;
+ }
+ else {
+ xdc.useModule('ti.trace.StackDbg');
+ }
+
+ Swi = xdc.useModule('ti.sysbios.knl.Swi');
+ Task = xdc.useModule('ti.sysbios.knl.Task');
+
+ xdc.useModule('ti.deh.Watchdog');
+}
+
+/*
+ * ======== module$static$init ========
+ */
+function module$static$init(mod, params)
+{
+ var segname = Program.sectMap[".errorbuf"];
+ var segment = Program.cpu.memoryMap[segname];
+
+ if (params.bufSize > segment.len) {
+ this.$logError("bufSize 0x" + Number(params.bufSize).toString(16) +
+ " configured is too large, maximum bufSize allowed is " +
+ "0x" + Number(segment.len).toString(16) + ". Decrement" +
+ " the bufSize appropriately.", this);
+ }
+
+ mod.outbuf.length = params.bufSize;
+ if (params.bufSize != 0) {
+ var Memory = xdc.module('xdc.runtime.Memory');
+ Memory.staticPlace(mod.outbuf, 0x1000, params.sectionName);
+ }
+
+ if ((Program.build.target.name.match(/C64T/)) ||
+ (Program.build.target.name.match(/C66/))) {
+ mod.isrStackSize = null;
+ mod.isrStackBase = null;
+ }
+ else {
+ mod.isrStackSize = Program.stack;
+ mod.isrStackBase = $externPtr('__TI_STACK_BASE');
+ Hwi.excHandlerFunc = Deh.excHandler;
+ }
+}
diff --git a/packages/ti/deh/DehDsp.c b/packages/ti/deh/DehDsp.c
--- /dev/null
+++ b/packages/ti/deh/DehDsp.c
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2012-2014, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * ======== DehDsp.c ========
+ *
+ */
+
+#include <xdc/runtime/System.h>
+#include <xdc/runtime/Startup.h>
+
+#include <ti/sysbios/BIOS.h>
+#if defined(HAS_AMMU)
+#include <ti/sysbios/hal/ammu/AMMU.h>
+#endif
+#include <ti/sysbios/family/c64p/Hwi.h>
+#include <ti/sysbios/family/c64p/Exception.h>
+
+#include <ti/ipc/MultiProc.h>
+#include <ti/deh/Watchdog.h>
+
+#include "package/internal/Deh.xdc.h"
+
+/*
+ * ======== Deh_Module_startup ========
+ *
+ * Uses SYS/BIOS Exception handler function for Hwi-based Watchdog ISR.
+ * This is used in order to cause the Watchdog expiration to appear like
+ * an exception, but since Exception_handler() is not called from the
+ * exception dispatcher (Hwi 1, NMI vector) the register and stack
+ * information that is printed is not valid (all zeroes for my runs).
+ * And we can't just plug the exception dispatcher into an Hwi, since it
+ * looks for an actual exception status and returns immediately (through
+ * NRP, which wasn't set for an Hwi) when no real exception is seen.
+ */
+Int Deh_Module_startup(Int phase)
+{
+#if defined(HAS_AMMU)
+ if (AMMU_Module_startupDone() == TRUE) {
+ Watchdog_init((Void (*)(Void))ti_sysbios_family_c64p_Exception_handler);
+ return Startup_DONE;
+ }
+
+ return Startup_NOTDONE;
+#else
+ Watchdog_init((Void (*)(Void))ti_sysbios_family_c64p_Exception_handler);
+
+ return Startup_DONE;
+#endif
+}
+
+/*
+ * ======== Deh_idleBegin ========
+ */
+Void Deh_idleBegin(Void)
+{
+ Watchdog_idleBegin();
+}
+
+/*
+ * ======== Deh_excHandlerDsp ========
+ * Read data from exception handler and print it to crash dump buffer
+ */
+Void Deh_excHandlerDsp()
+{
+ Exception_Status excStatus;
+ Exception_getLastStatus(&excStatus);
+ memcpy(module->outbuf, excStatus.excContext, sizeof(*excStatus.excContext));
+
+ System_abort("Terminating execution...\n");
+}
diff --git a/packages/ti/deh/Watchdog.c b/packages/ti/deh/Watchdog.c
--- /dev/null
@@ -0,0 +1,370 @@
+/*
+ * Copyright (c) 2012-2014, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * ======== Watchdog.c ========
+ *
+ */
+
+#include <xdc/runtime/Assert.h>
+#include <xdc/runtime/System.h>
+#include <xdc/runtime/Error.h>
+#include <xdc/runtime/System.h>
+#include <xdc/runtime/Startup.h>
+#include <xdc/runtime/Memory.h>
+#include <xdc/runtime/Types.h>
+
+#include <ti/sysbios/BIOS.h>
+#include <ti/sysbios/knl/Swi.h>
+#include <ti/sysbios/knl/Task.h>
+#include <ti/sysbios/interfaces/ITimer.h>
+#include <ti/sysbios/timers/dmtimer/Timer.h>
+
+#ifdef DSP
+#include <ti/sysbios/family/c64p/Hwi.h>
+#ifdef OMAP5
+#include <ti/sysbios/family/c64p/tesla/Wugen.h>
+#endif
+#endif
+
+#ifdef IPU
+#include <ti/sysbios/family/arm/m3/Hwi.h>
+#endif
+
+#ifdef SMP
+#include <ti/sysbios/hal/Core.h>
+#endif
+
+#include <ti/pm/IpcPower.h>
+
+#include "package/internal/Watchdog.xdc.h"
+
+/* Macro to write to GP timer registers */
+#define REG32(A) (*(volatile UInt32 *) (A))
+
+/* Bit mask for writing into GP timer TGRR reg for posted write mode */
+#define WATCHDOG_TIMER_TWPS_W_PEND_TGRR 0x8
+
+/* Bit mask for writing into GP timer TLDR reg for posted write mode */
+#define WATCHDOG_TIMER_TWPS_W_PEND_TLDR 0x4
+
+/* Bit mask for writing into GP timer TCRR reg for posted write mode */
+#define WATCHDOG_TIMER_TWPS_W_PEND_TCRR 0x2
+
+/* Bit mask for writing into GP timer TCLR reg for posted write mode */
+#define WATCHDOG_TIMER_TWPS_W_PEND_TCLR 0x1
+
+/* GP Timers Clock Control register bit mask */
+#define WATCHDOG_WDT_CLKCTRL_IDLEST_MASK (3 << 16)
+
+#if defined(IPU) && defined(OMAP5)
+/* OMAP IDCode Register to find the version id, 0x4A002204 */
+#define IDCODE_REGISTER (0xAA002204)
+
+/*
+ * ======== adjustGptClkCtrlAddr ========
+ * Adjust the GPTimer PRCM Clock Register Addresses on OMAP5 ES2.x
+ */
+static Void adjustGptClkCtrlAddr()
+{
+ Int i;
+ Bool adjust = FALSE;
+ UInt32 idCode = REG32(IDCODE_REGISTER);
+ UInt32 ramp = (idCode >> 12) & 0xFFFF;
+ UInt32 version = (idCode >> 28) & 0xF;
+
+ /* Change the addresses only for OMAP5 ES2.x */
+ if (ramp == 0xB942 || ramp == 0xB998) {
+ if (version == 1) {
+ adjust = TRUE;
+ }
+ }
+
+ /*
+ * OMAP5 ES 2.x has PER GPT PRCM addresses moved up by 0x400
+ * w.r.t OMAP4 and OMAP5 ES 1.0
+ */
+ if (adjust == TRUE) {
+ for (i = 0; i < Watchdog_module->wdtCores; i++) {
+ Watchdog_module->device[i].clkCtrl =
+ (Ptr)((UInt32)Watchdog_module->device[i].clkCtrl - 0x400);
+ }
+ }
+}
+#endif
+
+/*
+ * ======== initTimer ========
+ */
+static Void initTimer(Watchdog_TimerRegs *timer, Bool boot)
+{
+ Timer_Handle tHandle;
+ Types_FreqHz tFreq;
+
+ /* Get timer frequency */
+ tHandle = Timer_Object_get(NULL, 0);
+ Timer_getFreq(tHandle, &tFreq);
+
+ timer->tisr = ~0;
+ timer->tier = 2;
+ timer->twer = 2;
+ timer->tldr = (0 - (tFreq.lo * Watchdog_TIME_SEC));
+
+ /* Booting can take more time, so set CRR to WDT_BOOT_TIME */
+ if (boot) {
+ timer->tcrr = (0 - (tFreq.lo * Watchdog_BOOT_TIME_SEC));
+ }
+ else {
+ timer->tcrr = (0 - (tFreq.lo * Watchdog_TIME_SEC));
+ }
+
+ timer->tsicr |= 4; /* enable posted write mode */
+}
+
+/*
+ * ======== Watchdog_init ========
+ */
+Void Watchdog_init( Void (*timerFxn)(Void) )
+{
+ Hwi_Params hwiParams;
+ UInt key;
+ Timer_Handle tHandle;
+ Types_FreqHz tFreq;
+ Watchdog_TimerRegs *timer;
+ Int i;
+
+ tHandle = Timer_Object_get(NULL, 0);
+ Timer_getFreq(tHandle, &tFreq); /* get timer frequency */
+
+#if defined(IPU) && defined(OMAP5)
+ adjustGptClkCtrlAddr();
+#endif
+ for (i = 0; i < Watchdog_module->wdtCores; i++) { /* loop for SMP cores */
+ timer = (Watchdog_TimerRegs *) Watchdog_module->device[i].baseAddr;
+
+ /* Check if timer is enabled by host-side */
+ if ((REG32(Watchdog_module->device[i].clkCtrl) &
+ WATCHDOG_WDT_CLKCTRL_IDLEST_MASK) ==
+ WATCHDOG_WDT_CLKCTRL_IDLEST_MASK) {
+ System_printf("Watchdog disabled: TimerBase = 0x%x ClkCtrl = 0x%x\n",
+ timer, Watchdog_module->device[i].clkCtrl);
+ continue; /* for next core */
+ }
+
+ /* Configure the timer */
+ initTimer(timer, TRUE);
+
+ /* Enable interrupt in BIOS */
+ Hwi_Params_init(&hwiParams);
+ hwiParams.priority = 1;
+ hwiParams.eventId = Watchdog_module->device[i].eventId;
+ hwiParams.maskSetting = Hwi_MaskingOption_LOWER;
+ hwiParams.arg = 1; /* Exception_handler(abortFlag) */
+ key = Hwi_disable();
+ Hwi_create(Watchdog_module->device[i].intNum, (Hwi_FuncPtr) timerFxn,
+ &hwiParams, NULL);
+ Hwi_enableInterrupt(Watchdog_module->device[i].intNum);
+#if defined(DSP) && defined(OMAP5)
+ Wugen_enableEvent(Watchdog_module->device[i].eventId);
+#endif
+ Hwi_restore(key);
+
+ /* Enable timer */
+ while (timer->twps & WATCHDOG_TIMER_TWPS_W_PEND_TCLR);
+ timer->tclr |= 1;
+ Watchdog_module->status[i] = Watchdog_Mode_ENABLED;
+
+#ifdef SMP
+ System_printf("Watchdog enabled: TimerBase = 0x%x SMP-Core = %d "
+ "Freq = %d\n", timer, i, tFreq.lo);
+#else
+ System_printf("Watchdog enabled: TimerBase = 0x%x Freq = %d\n",
+ timer, tFreq.lo);
+#endif
+ }
+
+#if defined(OMAP5)
+ /* Register callback function */
+ if (!IpcPower_registerCallback(IpcPower_Event_RESUME, Watchdog_restore,
+ NULL)) {
+ System_printf("Watchdog_restore registered as a resume callback\n");
+ }
+#endif
+
+ return;
+}
+
+/*
+ * ======== Watchdog_idleBegin ========
+ */
+Void Watchdog_idleBegin(Void)
+{
+ Int core = 0;
+
+#ifdef SMP
+ core = Core_getId();
+
+ if (core != 0) {
+ Watchdog_stop(core);
+ }
+ else
+#endif
+ {
+ Watchdog_kick(core);
+ }
+}
+
+/*
+ * ======== Watchdog_swiPrehook ========
+ */
+Void Watchdog_swiPrehook(Swi_Handle swi)
+{
+ Int core = 0;
+
+#ifdef SMP
+ core = Core_getId();
+
+ if (core != 0) {
+ Watchdog_start(core);
+ }
+ else
+#endif
+ {
+ Watchdog_kick(core);
+ }
+}
+
+/*
+ * ======== Watchdog_taskSwitch ========
+ * Refresh/restart watchdog timer whenever task switch scheduling happens
+ */
+Void Watchdog_taskSwitch(Task_Handle p, Task_Handle n)
+{
+ Int core = 0;
+
+#ifdef SMP
+ core = Core_getId();
+
+ if (core != 0) {
+ Watchdog_start(core);
+ }
+ else
+#endif
+ {
+ Watchdog_kick(core);
+ }
+}
+
+/*
+ * ======== Watchdog_isException ========
+ */
+Bool Watchdog_isException(UInt excNum)
+{
+ Int i;
+ Bool found = FALSE;
+
+ for (i = 0; i < Watchdog_module->wdtCores; i++) {
+ if (excNum == Watchdog_module->device[i].intNum) {
+ found = TRUE;
+ break;
+ }
+ }
+
+ return found;
+}
+
+/*
+ * ======== Watchdog_stop ========
+ */
+Void Watchdog_stop(Int core)
+{
+ Watchdog_TimerRegs *timer = Watchdog_module->device[core].baseAddr;
+
+ if ((Watchdog_module->status[core] == Watchdog_Mode_ENABLED) && timer) {
+ while (timer->twps & WATCHDOG_TIMER_TWPS_W_PEND_TCLR);
+ timer->tclr &= ~1;
+ }
+}
+
+/*
+ * ======== Watchdog_start ========
+ */
+Void Watchdog_start(Int core)
+{
+ Watchdog_TimerRegs *timer = Watchdog_module->device[core].baseAddr;
+
+ if ((Watchdog_module->status[core] == Watchdog_Mode_ENABLED) && timer) {
+ while (timer->twps & WATCHDOG_TIMER_TWPS_W_PEND_TCLR);
+ timer->tclr |= 1;
+
+ while (timer->twps & WATCHDOG_TIMER_TWPS_W_PEND_TGRR);
+ timer->ttgr = 0;
+ }
+}
+
+/*
+ * ======== Watchdog_kick ========
+ * Refresh/restart the watchdog timer
+ */
+Void Watchdog_kick(Int core)
+{
+ Watchdog_TimerRegs *timer = Watchdog_module->device[core].baseAddr;
+
+ if ((Watchdog_module->status[core] == Watchdog_Mode_ENABLED) && timer) {
+ while (timer->twps & WATCHDOG_TIMER_TWPS_W_PEND_TGRR);
+ timer->ttgr = 0;
+ }
+}
+
+/*
+ * ======== Watchdog_restore ========
+ * Refresh/restart the watchdog timer
+ */
+Void Watchdog_restore(Int event, Ptr data)
+{
+ Int i;
+ Watchdog_TimerRegs *timer;
+
+ for (i = 0; i < Watchdog_module->wdtCores; i++) { /* loop for SMP cores */
+ timer = (Watchdog_TimerRegs *) Watchdog_module->device[i].baseAddr;
+
+ if (Watchdog_module->status[i] == Watchdog_Mode_ENABLED) {
+ /* Configure the timer */
+ initTimer(timer, FALSE);
+
+ /* Enable timer */
+ while (timer->twps & WATCHDOG_TIMER_TWPS_W_PEND_TCLR);
+ timer->tclr |= 1;
+ }
+ }
+}
diff --git a/packages/ti/deh/Watchdog.xdc b/packages/ti/deh/Watchdog.xdc
--- /dev/null
@@ -0,0 +1,210 @@
+/*
+ * Copyright (c) 2012-2014, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== Watchdog.xdc ========
+ *
+ */
+
+import ti.sysbios.knl.Task;
+import ti.sysbios.knl.Swi;
+
+/*!
+ * ======== Watchdog ========
+ * Watchdog Timer module for slave processors
+ *
+ * Watchdog module implements watchdog timer for remote slave processor
+ * cores using GPTimers or a dedicated WatchDog timer. The timer is started
+ * during startup/bootup time. The logic for the WD timer is as follows:
+ * 1. Start GP timer during startup/boot time.
+ * 2. The expiration for WD timer is 5 seconds normally, but is 10 seconds
+ * during initial boot time.
+ * 3. The WD timer is restarted in the Idle task through the plugged in DEH
+ * task function, or whenever a Task switch happens or a Swi is executed.
+ * 4. In SMP-mode, Hwis and Swis are executed only in Core0 and Tasks can
+ * be executed on either of the cores. Core1 stops it's Watchdog upon
+ * entering Idle task as it can stay in WFI for a long-time (atleast two
+ * tasks need to be in READY state) and restarts its Watchdog upon a task
+ * switch.
+ * 5. WD Timer is stopped by MPU by disabling the timer's clock during suspend.
+ * The MPU re-enables the timer's clock upon resume.
+ */
+
+module Watchdog {
+
+ /*! Timer Registers */
+ struct TimerRegs {
+ UInt tidr;
+ UInt empty[3];
+ UInt tiocpCfg;
+ UInt empty1[3];
+ UInt irq_eoi;
+ UInt irqstat_raw;
+ UInt tisr; /* irqstat */
+ UInt tier; /* irqen_set */
+ UInt irqen_clr;
+ UInt twer; /* irqwaken; */
+ UInt tclr;
+ Int tcrr;
+ Int tldr;
+ UInt ttgr;
+ UInt twps;
+ UInt tmar;
+ UInt tcar1;
+ UInt tsicr;
+ UInt tcar2;
+ };
+
+ /*! Watchdog Timer device information */
+ struct TimerDevice {
+ Ptr baseAddr;
+ Ptr clkCtrl;
+ UInt32 intNum;
+ Int eventId;
+ };
+
+ /*! Watchdog Timer device status */
+ enum Mode {
+ Mode_DISABLED, /*! Watchdog Timer is disabled. */
+ Mode_ENABLED /*! Watchdog Timer is enabled. */
+ };
+
+ /*!
+ * Watchdog timer period (in seconds)
+ */
+ const UInt TIME_SEC = 5;
+
+ /*!
+ * Watchdog timer period during boot-time (in seconds)
+ */
+ const UInt BOOT_TIME_SEC = 10;
+
+ /*!
+ * ======== timerSettings ========
+ * Global Control configuration for each physical timer.
+ */
+ metaonly config TimerDevice timerSettings[] = [];
+
+ /*!
+ * ======== init ========
+ * Initialize the Watchdog module
+ *
+ * @param[in](timerFxn) ISR handler function to be executed when the
+ * Watchdog timer expires.
+ */
+ Void init(Void (*timerFxn)(Void));
+
+ /*!
+ * ======== idleBegin ========
+ * Function called when entering idle, restarts/refreshes watchdog timer
+ */
+ Void idleBegin();
+
+ /*!
+ * ======== taskSwitch ========
+ * Function hook called whenever a Task switch happens. The Watchdog
+ * timer would be restarted since the scheduler is fine
+ *
+ * @param(p) Previous task handle being switched from.
+ * @param(n) Next task handle being switched to.
+ */
+ Void taskSwitch(Task.Handle p, Task.Handle n);
+
+ /*!
+ * ======== swiPrehook ========
+ * Function hook called whenever a Swi is posted, and the scheduler
+ * runs to process the Swi.
+ *
+ * @param(swi) Swi Handle that would be run
+ */
+ Void swiPrehook(Swi.Handle swi);
+
+ /*!
+ * ======== isException ========
+ * Function to check if given exception is a Watchdog exception
+ *
+ * @param(excNum) Exception number that would be checked
+ */
+ Bool isException(UInt excNum);
+
+internal: /* not for client use */
+
+ /*!
+ * ======== stop ========
+ * @_nodoc
+ * Stop the Watchdog timer.
+ *
+ * @param(core) Core id on which the function is being called. Value is
+ * almost always 0. A non-zero value is seen only in
+ * SMP-mode.
+ */
+ Void stop(Int core);
+
+ /*!
+ * ======== start ========
+ * @_nodoc
+ * Start the Watchdog timer.
+ *
+ * @param(core) Core id on which the function is being called. Value is
+ * almost always 0. A non-zero value is seen only in
+ * SMP-mode.
+ */
+ Void start(Int core);
+
+ /*!
+ * ======== kick ========
+ * @_nodoc
+ * Refresh or restart the Watchdog timer. This call is used
+ * internally on any condition that validates that the processor
+ * core is executing fine.
+ *
+ * @param(core) Core id on which the function is being called. Value is
+ * almost always 0. A non-zero value is seen only in
+ * SMP-mode.
+ */
+ Void kick(Int core);
+
+ /*!
+ * ======== restore ========
+ * @_nodoc
+ * Restore the context of the Watchdog timer after a hibernation/suspend.
+ * in case the context is lost.
+ */
+ Void restore(Int event, Ptr data);
+
+ /*! Module state structure */
+ struct Module_State {
+ TimerDevice device[]; /* watchdog timer specific data */
+ Mode status[]; /* watchdog timer status */
+ Int wdtCores; /* number of watchdog timers (usually 1) */
+ };
+}
diff --git a/packages/ti/deh/Watchdog.xs b/packages/ti/deh/Watchdog.xs
--- /dev/null
@@ -0,0 +1,255 @@
+/*
+ * Copyright (c) 2012-2014, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== Watchdog.xs ========
+ *
+ */
+
+var Watchdog = null;
+var Core = null;
+var MultiProc = null;
+var Task = null;
+var Swi = null;
+var taskHook = null;
+var swiHook = null;
+var catalogName = null;
+
+if (xdc.om.$name == "cfg" || typeof(genCdoc) != "undefined") {
+ var deviceTable = {
+ "ti.catalog.c6000": {
+ "OMAP5430": {
+ wdtimer: [
+ {
+ name: "WdTimerDsp", /* GpTimer 6 */
+ baseAddr: 0x01d3A000,
+ clkCtrl: 0x4A004570, /* Virtual address */
+ intNum: 15,
+ eventId: 52,
+ },
+ ]
+ },
+ "DRA7XX": {
+ wdtimer: [
+ {
+ name: "WdTimerDsp", /* GpTimer 10 */
+ baseAddr: 0x48086000, /* Virtual address */
+ clkCtrl: 0x4A009728, /* Virtual address */
+ intNum: 15,
+ eventId: 72,
+ },
+ ]
+ },
+ },
+ "ti.catalog.arm.cortexm4": {
+ "OMAP5430": {
+ wdtimer: [
+ {
+ name: "WdTimerCore0", /* GpTimer 9 */
+ baseAddr: 0xA803E000, /* Virtual address */
+ clkCtrl: 0xAA009450, /* Virtual address */
+ intNum: 55,
+ eventId: -1,
+ },
+ {
+ name: "WdTimerCore1", /* GpTimer 11 */
+ baseAddr: 0xA8088000, /* Virtual address */
+ clkCtrl: 0xAA009430, /* Virtual address */
+ intNum: 56,
+ eventId: -1,
+ },
+ ]
+ },
+ "DRA7XX": {
+ wdtimer: [
+ {
+ name: "WdTimerCore0", /* GpTimer 9 */
+ baseAddr: 0x6803E000, /* Virtual address */
+ clkCtrl: 0x6A009750, /* Virtual address */
+ intNum: 55,
+ eventId: -1,
+ },
+ {
+ name: "WdTimerCore1", /* GpTimer 4 */
+ baseAddr: 0x68036000, /* Virtual address */
+ clkCtrl: 0x6A009748, /* Virtual address */
+ intNum: 54,
+ eventId: -1,
+ },
+ ]
+ },
+ },
+ };
+}
+
+/*
+ * ======== module$meta$init ========
+ */
+function module$meta$init()
+{
+ /* Only process during "cfg" phase */
+ if (xdc.om.$name != "cfg") {
+ return;
+ }
+
+ Watchdog = this;
+
+ catalogName = Program.cpu.catalogName;
+
+ /* Loop through the device table */
+ /* TODO: This lookup table can be replaced to use the dmTimer module
+ * later on, and eliminate the need for this device table */
+ for (deviceName in deviceTable[catalogName]) {
+ if (deviceName == Program.cpu.deviceName) {
+ var device = deviceTable[catalogName][deviceName].wdtimer;
+
+ Watchdog.timerSettings.length = device.length;
+ for (var i = 0; i < device.length; i++) {
+ Watchdog.timerSettings[i].baseAddr = null;
+ Watchdog.timerSettings[i].clkCtrl = null;
+ Watchdog.timerSettings[i].intNum = device[i].intNum;
+ Watchdog.timerSettings[i].eventId = device[i].eventId;
+ }
+
+ return;
+ }
+ }
+
+ /* Falls through on failure */
+ print("Watchdog Timer configuration is not found for the specified device ("
+ + Program.cpu.deviceName + ").");
+
+ for (device in deviceTable[catalogName]) {
+ print("\t" + device);
+ }
+
+ throw new Error ("Watchdog Timer unsupported on device!");
+}
+
+/*
+ * ======== module$use ========
+ */
+function module$use()
+{
+ var Settings = xdc.module("ti.sysbios.family.Settings");
+ var Hwi = xdc.useModule(Settings.getDefaultHwiDelegate());
+
+ xdc.useModule('xdc.runtime.System');
+
+ if (Program.platformName.match(/IPU/) ||
+ Program.platformName.match(/ipu/)) {
+ Core = xdc.module("ti.sysbios.hal.Core");
+ }
+ else {
+ MultiProc = xdc.module('ti.sdo.utils.MultiProc');
+ if (Program.platformName.match(/DSP/)) {
+ xdc.useModule('ti.sysbios.family.c64p.tesla.Wugen');
+ }
+ }
+
+ Task = xdc.useModule('ti.sysbios.knl.Task');
+ taskHook = new Task.HookSet;
+
+ Swi = xdc.useModule('ti.sysbios.knl.Swi');
+ swiHook = new Swi.HookSet;
+}
+
+/*
+ * ======== module$static$init ========
+ */
+function module$static$init(mod, params)
+{
+ var device = deviceTable[catalogName][Program.cpu.deviceName].wdtimer;
+
+ swiHook.beginFxn = this.swiPrehook;
+ Swi.addHookSet(swiHook);
+
+ taskHook.switchFxn = this.taskSwitch;
+ Task.addHookSet(taskHook);
+
+ /* Assign default values if not supplied through configuration */
+ for (var i = 0; i < device.length; i++) {
+ if (Watchdog.timerSettings[i].baseAddr == null) {
+ Watchdog.timerSettings[i].baseAddr = $addr(device[i].baseAddr);
+ }
+ if (Watchdog.timerSettings[i].clkCtrl == null) {
+ Watchdog.timerSettings[i].clkCtrl = $addr(device[i].clkCtrl);
+ }
+ }
+
+ mod.device.length = 1;
+ mod.status.length = 1;
+ mod.wdtCores = 1;
+ if (Program.build.target.name.match(/C64T/) ||
+ Program.build.target.name.match(/C66/)) {
+ mod.device[0].baseAddr = Watchdog.timerSettings[0].baseAddr;
+ mod.device[0].clkCtrl = Watchdog.timerSettings[0].clkCtrl;
+ mod.device[0].intNum = Watchdog.timerSettings[0].intNum;
+ mod.device[0].eventId = Watchdog.timerSettings[0].eventId;
+ mod.status[0] = Watchdog.Mode_DISABLED;
+ }
+ else {
+ if (Program.platformName.match(/IPU/) ||
+ Program.platformName.match(/ipu/)) {
+ mod.device.length = Core.numCores;
+ mod.status.length = Core.numCores;
+ mod.wdtCores = Core.numCores;
+
+ mod.device[0].baseAddr = Watchdog.timerSettings[0].baseAddr;
+ mod.device[0].clkCtrl = Watchdog.timerSettings[0].clkCtrl;
+ mod.device[0].intNum = Watchdog.timerSettings[0].intNum;
+ mod.device[0].eventId = Watchdog.timerSettings[0].eventId;
+ mod.status[0] = Watchdog.Mode_DISABLED;
+
+ mod.device[1].baseAddr = Watchdog.timerSettings[1].baseAddr;
+ mod.device[1].clkCtrl = Watchdog.timerSettings[1].clkCtrl;
+ mod.device[1].intNum = Watchdog.timerSettings[1].intNum;
+ mod.device[1].eventId = Watchdog.timerSettings[1].eventId;
+ mod.status[1] = Watchdog.Mode_DISABLED;
+ }
+ else {
+ if (MultiProc.id == MultiProc.getIdMeta("CORE0")) {
+ mod.device[0].baseAddr = Watchdog.timerSettings[0].baseAddr;
+ mod.device[0].clkCtrl = Watchdog.timerSettings[0].clkCtrl;
+ mod.device[0].intNum = Watchdog.timerSettings[0].intNum;
+ mod.device[0].eventId = Watchdog.timerSettings[0].eventId;
+ }
+ else {
+ mod.device[0].baseAddr = Watchdog.timerSettings[1].baseAddr;
+ mod.device[0].clkCtrl = Watchdog.timerSettings[1].clkCtrl;
+ mod.device[0].intNum = Watchdog.timerSettings[1].intNum;
+ mod.device[0].eventId = Watchdog.timerSettings[1].eventId;
+ }
+ mod.status[0] = Watchdog.Mode_DISABLED;
+ }
+ }
+}
diff --git a/packages/ti/deh/package.bld b/packages/ti/deh/package.bld
--- /dev/null
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2011-2014, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== package.bld ========
+ */
+
+/* explicit references to global objects */
+var Build = xdc.useModule('xdc.bld.BuildEnvironment');
+var Pkg = xdc.useModule('xdc.bld.PackageContents');
+
+/* clean lib folder */
+Pkg.generatedFiles.$add("lib/");
+Pkg.libDir = "package/";
+
+/* add custom files to all releases */
+Pkg.attrs.exportSrc = true;
+Pkg.attrs.exportCfg = true;
+Pkg.otherFiles = [
+ "Deh.h",
+ "Watchdog.h",
+];
+
+var myCopts = "";
+var SRCS_IPU = ["Deh.c", "Watchdog.c"]
+var SRCS_DSP = ["DehDsp.c", "Watchdog.c"]
+
+for (var i = 0; i < Build.targets.length; i++) {
+ var targ = Build.targets[i];
+ var name = Pkg.name;
+
+ if (targ.$name.match(/^ti\.targets\.*/)) {
+ myCopts = "--gcc"; /* Rpmsg.h requires gcc-isms */
+ } else {
+ myCopts = "";
+ }
+
+ if (targ.isa == "674") {
+ continue;
+ }
+
+ /* Build for all profiles */
+ for (var profile in targ.profiles) {
+
+ /* Build a platform-specific library */
+ if (targ.isa == "66") {
+ Pkg.addLibrary("lib/" + profile + "/" + name + "_vayu", targ, {
+ profile: profile,
+ copts: myCopts,
+ defs: "-DVAYU -DDSP"
+ }).addObjects(SRCS_DSP);
+ } else if (targ.isa.match(/^v7M(|4)$/)) {
+ Pkg.addLibrary("lib/" + profile + "/" + name + "_omap5_smp", targ, {
+ profile: profile,
+ copts: myCopts,
+ defs: "-DOMAP5 -DSMP -DIPU -DHAS_AMMU"
+ }).addObjects(SRCS_IPU);
+
+ Pkg.addLibrary("lib/" + profile + "/" + name + "_vayu_smp", targ, {
+ profile: profile,
+ copts: myCopts,
+ defs: "-DVAYU -DSMP -DIPU -DHAS_AMMU"
+ }).addObjects(SRCS_IPU);
+ } else if (targ.isa == "64T") {
+ Pkg.addLibrary("lib/" + profile + "/" + name + "_omap5", targ, {
+ profile: profile,
+ copts: myCopts,
+ defs: "-DOMAP5 -DDSP -DHAS_AMMU"
+ }).addObjects(SRCS_DSP);
+ } else {
+ continue;
+ }
+ }
+}
+
diff --git a/packages/ti/deh/package.xdc b/packages/ti/deh/package.xdc
--- /dev/null
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2011-2014, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== package.xdc ========
+ *
+ */
+
+package ti.deh [1,0,0,0] {
+ module Deh;
+ module Watchdog;
+};
diff --git a/packages/ti/deh/package.xs b/packages/ti/deh/package.xs
--- /dev/null
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2011-2014, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== package.xs ========
+ *
+ */
+
+/*
+ * ======== getLibs ========
+ */
+function getLibs(prog)
+{
+ var suffix;
+ var file;
+ var libAry = [];
+ var profile = this.profile;
+ var smp = "";
+
+ suffix = prog.build.target.findSuffix(this);
+ if (suffix == null) {
+ return ""; /* nothing to contribute */
+ }
+
+ if (prog.platformName.match(/IPU/) ||
+ prog.platformName.match(/ipu/)) {
+ smp = "_smp";
+ }
+
+ /* make sure the library exists, else fallback to a built library */
+ file = "lib/" + profile + "/ti.deh" + smp +".a" + suffix;
+ if (java.io.File(this.packageBase + file).exists()) {
+ libAry.push(file);
+ }
+ else {
+ file = "lib/release/ti.deh" + smp +".a" + suffix;
+ if (java.io.File(this.packageBase + file).exists()) {
+ libAry.push(file);
+ }
+ else {
+ /* fallback to a compatible library built by this package */
+ for (var p in this.build.libDesc) {
+ if (suffix == this.build.libDesc[p].suffix) {
+ libAry.push(p);
+ break;
+ }
+ }
+ }
+ }
+
+ return libAry.join(";");
+}
index 7a573f9ebadb83717cdd08b7947fe07e06990d8e..cbcd8c3d90ada97d9cf22442afa21329c5c0bbec 100644 (file)
var Idle = xdc.useModule('ti.sysbios.knl.Idle');
Idle.addFunc('&VirtQueue_cacheWb');
-//TBD: Idle.addFunc('&ti_deh_Deh_idleBegin'); /* Must be placed before pwr mgmt */
+Idle.addFunc('&ti_deh_Deh_idleBegin'); /* Must be placed before pwr mgmt */
Idle.addFunc('&IpcPower_idle'); /* IpcPower_idle must be at the end */
var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
Main.common$.diags_INTERNAL = Diags.ALWAYS_ON;
var Hwi = xdc.useModule('ti.sysbios.family.c64p.Hwi');
-//TBD: var Deh = xdc.useModule('ti.deh.Deh');
+var Deh = xdc.useModule('ti.deh.Deh');
Hwi.enableException = true;
/* -------------------------------- DSP ----------------------------------*/
index 8a7773653610714ae85dd681c42743fa75d16b2d..7d378b66d86ed359db59d88dac1825312cd603e9 100644 (file)
var Idle = xdc.useModule('ti.sysbios.knl.Idle');
Idle.addFunc('&VirtQueue_cacheWb');
-//TBD: Idle.addFunc('&ti_deh_Deh_idleBegin'); /* Must be placed before pwr mgmt */
-//TBD: Idle.addFunc('&IpcPower_idle'); /* IpcPower_idle must be at the end */
+//Idle.addFunc('&ti_deh_Deh_idleBegin'); /* Must be placed before pwr mgmt */
+//Idle.addFunc('&IpcPower_idle'); /* IpcPower_idle must be at the end */
var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
var List = xdc.useModule('ti.sdo.utils.List');
Main.common$.diags_INTERNAL = Diags.ALWAYS_ON;
var Hwi = xdc.useModule('ti.sysbios.family.c64p.Hwi');
-//TBD: var Deh = xdc.useModule('ti.deh.Deh');
+//var Deh = xdc.useModule('ti.deh.Deh');
Hwi.enableException = true;
/* -------------------------------- DSP ----------------------------------*/
var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
var myName;
+var timerId;
if (Program.platformName.match(/^ti\.platforms\.evmDRA7XX\:dsp1/)) {
myName = "DSP1";
+ /* Configure BIOS clock source as GPTimer5 */
+ timerId = 4;
}
else {
myName = "DSP2";
+ /* Configure BIOS clock source as GPTimer6 */
+ timerId = 5;
}
MultiProc.setConfig(myName, ["HOST", "IPU2", "IPU1", "DSP2", "DSP1"]);
/* --------------------------- TICK --------------------------------------*/
var Clock = xdc.useModule('ti.sysbios.knl.Clock');
-Clock.tickSource = Clock.TickSource_NULL;
-//Clock.tickSource = Clock.TickSource_USER;
-/* Configure BIOS clock source as GPTimer5 */
-//Clock.timerId = 0;
+Clock.tickSource = Clock.TickSource_USER;
+Clock.timerId = timerId;
var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
Timer.intFreq.hi = 0;
Timer.intFreq.lo = 19200000;
-//var timerParams = new Timer.Params();
-//timerParams.period = Clock.tickPeriod;
-//timerParams.periodType = Timer.PeriodType_MICROSECS;
+var timerParams = new Timer.Params();
+timerParams.period = Clock.tickPeriod;
+timerParams.periodType = Timer.PeriodType_MICROSECS;
/* Switch off Software Reset to make the below settings effective */
-//timerParams.tiocpCfg.softreset = 0x0;
+timerParams.tiocpCfg.softreset = 0x0;
/* Smart-idle wake-up-capable mode */
-//timerParams.tiocpCfg.idlemode = 0x3;
+timerParams.tiocpCfg.idlemode = 0x3;
/* Wake-up generation for Overflow */
-//timerParams.twer.ovf_wup_ena = 0x1;
-//Timer.create(Clock.timerId, Clock.doTick, timerParams);
+timerParams.twer.ovf_wup_ena = 0x1;
+Timer.create(Clock.timerId, Clock.doTick, timerParams);
Program.sectMap[".tracebuf"] = "TRACE_BUF";
Program.sectMap[".errorbuf"] = "EXC_DATA";
diff --git a/packages/ti/ipc/tests/IpcCommon_omap5.cfg.xs b/packages/ti/ipc/tests/IpcCommon_omap5.cfg.xs
index ef4e05056883e6583f516905c63ad5822cd9c8a7..1a2721fdf75d09d22a73df717f7fc0af050d9fe3 100644 (file)
Main.common$.diags_INTERNAL = Diags.ALWAYS_ON;
var Hwi = xdc.useModule('ti.sysbios.family.arm.m3.Hwi');
-//TBD: var Deh = xdc.useModule('ti.deh.Deh');
+var Deh = xdc.useModule('ti.deh.Deh');
Hwi.enableException = true;
Hwi.nvicCCR.DIV_0_TRP = 1;
/* Include stack debug helper */
-/* TBD:
var StackDbg = xdc.useModule('ti.trace.StackDbg');
-*/
var dmTimer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
/* dmTimer 0 mapped to GPT3 */
index c65ead05fed88672d0be5fd6ad7b4cd942b9c8de..c612e9721714b30a7b32a9f568ae5713c95b1783 100644 (file)
/*
- * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * Copyright (c) 2012-2014, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
Idle.addCoreFunc('&VirtQueue_cacheWb', 1);
/* Watchdog detection functions in each core */
-/* TBD: DEH not taken from omapzoom yet:
-Idle.addCoreFunc('&ti_deh_Deh_idleBegin', 0);
-Idle.addCoreFunc('&ti_deh_Deh_idleBegin', 1);
-*/
+//Idle.addCoreFunc('&ti_deh_Deh_idleBegin', 0);
+//Idle.addCoreFunc('&ti_deh_Deh_idleBegin', 1);
+
+var Hwi = xdc.useModule('ti.sysbios.family.arm.m3.Hwi');
+Hwi.enableException = true;
/* Idle Power Management functions for each core */
Idle.addCoreFunc('&IpcPower_idle', 0);
Program.sectMap[".tracebuf"] = "TRACE_BUF";
Program.sectMap[".errorbuf"] = "EXC_DATA";
+
index a172b9818446dbac1bd08450a67aa9714a5b9368..b7be6d7c4298e1924a3a65636e22d2786de95536 100644 (file)
/*
- * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * Copyright (c) 2012-2014, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
Idle.addCoreFunc('&VirtQueue_cacheWb', 1);
/* Watchdog detection functions in each core */
-/* TBD: DEH not taken from omapzoom yet:
Idle.addCoreFunc('&ti_deh_Deh_idleBegin', 0);
Idle.addCoreFunc('&ti_deh_Deh_idleBegin', 1);
-*/
+var Deh = xdc.useModule('ti.deh.Deh');
+
+var Hwi = xdc.useModule('ti.sysbios.family.arm.m3.Hwi');
+Hwi.enableException = true;
/* Idle Power Management functions for each core */
Idle.addCoreFunc('&IpcPower_idle', 0);
index 478a08aeae7e795771374f755baa8b9bcfb4a7f1..f12536c8645f125e4c956b39f02a1c3f8e96a7fc 100644 (file)
/*
- * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * Copyright (c) 2012-2014, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
var Clock = xdc.useModule('ti.sysbios.knl.Clock');
Clock.tickSource = Clock.TickSource_USER;
/* Configure GPTimer3 as BIOS clock source */
-Clock.timerId = 0;
+Clock.timerId = 2;
var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
var timerParams = new Timer.Params();
Idle.addCoreFunc('&VirtQueue_cacheWb', 1);
/* Watchdog detection functions in each core */
-/* TBD: DEH not taken from omapzoom yet:
Idle.addCoreFunc('&ti_deh_Deh_idleBegin', 0);
Idle.addCoreFunc('&ti_deh_Deh_idleBegin', 1);
-*/
+var Deh = xdc.useModule('ti.deh.Deh');
+
+var Hwi = xdc.useModule('ti.sysbios.family.arm.m3.Hwi');
+Hwi.enableException = true;
/* Idle Power Management functions for each core */
Idle.addCoreFunc('&IpcPower_idle', 0);
index 953bfb5d525eb9ab1b8a3cc524e259a2ebe0addd..38092d76320b1f960996a076e9116f3ae6a6a059 100644 (file)
}).addObjects(["messageq_multi.c"]);
/* messageq_single */
- Pkg.addExecutable(name + "/messageq_single", targ, platform, {
- cfgScript: "rpmsg_transport",
- defs: "-D BENCHMARK " + extraDefs
- }).addObjects(["messageq_single.c"]);
+ if (platform.match(/^ti\.platforms\.sdp5430/) &&
+ (targ.isa == "64T")) {
+ Pkg.addExecutable(name + "/messageq_single", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK -D DSP" + extraDefs
+ }).addObjects(["messageq_single.c"]);
+ } else if (platform.match(/^ti\.platforms\.sdp5430/) &&
+ (targ.isa == "M4")) {
+ Pkg.addExecutable(name + "/messageq_single", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK -D IPU" + extraDefs
+ }).addObjects(["messageq_single.c"]);
+ } else {
+ Pkg.addExecutable(name + "/messageq_single", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK " + extraDefs
+ }).addObjects(["messageq_single.c"]);
+ }
/* NameServerApp */
Pkg.addExecutable(name + "/NameServerApp", targ, platform, {
diff --git a/packages/ti/trace/StackDbg.c b/packages/ti/trace/StackDbg.c
--- /dev/null
@@ -0,0 +1,200 @@
+/*
+ * Copyright (c) 2011-2014, Texas Instruments Incorporated
+ * Copyright (c) 2011, Google Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Google Inc. nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright Iliyan Malchev Google Inc. 2011.
+ */
+
+/*
+ * ======== StackDbg.c ========
+ */
+
+#include <xdc/runtime/Startup.h>
+#include <string.h>
+#include <stdlib.h>
+#include <stdio.h>
+
+#include "package/internal/StackDbg.xdc.h"
+
+/*
+ * We're looking for either a 32-bit BL <imm> or a 16-bit BLX Rm
+ * instruction. Since this code is not compiled with
+ * internetworking and runs only in Thumb2 mode, the BLX Rm is
+ * actually a BL Rm. Also, the J bits in the 32-bit BL <imm>
+ * instruction are both 1, because of Thumb2.
+ *
+ * If bits [15:11] of the halfword being decoded take any of the
+ * following values, the halfword is the first halfword of a 32-bit
+ * instruction:
+ * 0b11101
+ * 0b11110
+ * 0b11111.
+ *
+ * The only 32-bit insruction we're interested in is BL <imm>
+ *
+ * 3 2 1 0
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * ---------------------------------------------------------------
+ * 1 1 1 1 0 - - - - - - - x x x x 1 x x x x x x x x x x x x x x x
+ * op1 op2 op
+ * 1 x x
+ * 1 0 1 op1
+ * 1 1 1 1 0 S a a a a a a a a a a 1 1 j 0 j a a a a a a a a a a 0
+ * ---------------------------------------------------------------
+ * 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 <-- set
+ * ^
+ * +-- 1: BL, 0: BLX
+ * 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 <-- clr
+ *
+ * 32-bit set mask: common 0xf000e800 (both J bits are set--armv7)
+ * BLX bit: 0x00001000
+ * 32-bit clr mask: BLX: 0x08000000, BL: 0x08001001
+ *
+ * 3 2 1 0
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * ---------------------------------------------------------------
+ * x x x x x S 1 1 1 1 1 1 1 1 1 1 x x x x x 1 1 1 1 1 1 1 1 1 1 x <-- BLX
+ * x x x x x S 1 1 1 1 1 1 1 1 1 1 x x x x x 1 1 1 1 1 1 1 1 1 1 1 <-- BL
+ *
+ * value mask: BL: 0x03ff07fe, BLX: 0x03ff07fe
+ *
+ * imm10h:
+ * 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+ * imm10h_mask: 03ff0000
+ * imm10h_val = imm10h_mask >> 4
+ *
+ * imm10l_bl:
+ * 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1
+ * imm10l_bl_mask = 000007ff
+ * imm10l_bl_val = imm10l_bl_mask << 1
+ *
+ * imm10l_blx:
+ * 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0
+ * imm10l_blx_mask = 000007fe
+ * imm10l_blx_val = imm10l_blx_mask << 1
+ *
+ * val_bl = imm10h_val | imm10l_bl_val
+ * val_blx = imm10h_val | imm10l_blx_val
+ */
+static Int __decode_bl32(UInt pc, UInt op, UInt *target)
+{
+ UInt imm;
+ UInt sign;
+
+ if ((op & 0xf000e800) == 0xf000e800) {
+ /* BL or BLX */
+ if (op & (1<<12)) {
+ if (!(op & 0x08000000)) {
+ /* BL */
+ imm = ((op & 0x03ff0000) >> 4) | ((op & 0x000007ff) << 1);
+ }
+ else {
+ return 0;
+ }
+ }
+ else {
+ if (!(op & 0x08001001)) {
+ /* BLX */
+ imm = ((op & 0x03ff0000) >> 4) | ((op & 0x000007fe) << 1);
+ }
+ else {
+ return 0;
+ }
+ }
+
+ sign = !!(op & 0x04000000);
+ if (sign) {
+ Int simm = (Int)(imm << 10);
+ simm >>= 10;
+ imm = (UInt)simm;
+ }
+
+ imm = (UInt)((Int)pc + (Int)imm);
+ imm += 4;
+
+ *target = imm;
+ return 1;
+ }
+
+ return 0;
+}
+
+static Int decode_bl32(UInt pc, UInt op, UInt *target)
+{
+ if (__decode_bl32(pc, op, target)) {
+ return 1;
+ }
+ op = (op >> 16) | (op << 16);
+ return __decode_bl32(pc, op, target);
+}
+
+Void StackDbg_walkStack(UInt base, UInt size, UInt start,
+ StackDbg_VisitFuncPtr visit, Ptr user)
+{
+ UInt top;
+ UInt *inst;
+ UInt op;
+ StackDbg_StackEntry e;
+ Bool more;
+
+ size = (size + 3) & ~3;
+ top = base + size;
+ start = start & ~3;
+ more = TRUE;
+
+ for (; start < top && more; start += sizeof(UShort)) {
+ UInt val = *((UInt *)start);
+ if ((val & 1) && module->codeBegin <= val && val < module->codeEnd) {
+
+ inst = (UInt *)((val - 4) & ~1);
+ op = *inst;
+
+ e.instr = (UInt)inst;
+ e.op = op;
+ e.ret = val;
+ e.sp = (UInt)start;
+ e.bogus = 0;
+
+ if (decode_bl32((UInt)inst, op, &e.target)) {
+ more = visit(&e, user);
+ }
+ else if ((op & 0x47800000) == 0x47800000 ||
+ (op & 0x00004780) == 0x00004780) {
+ e.target = 0;
+ more = visit(&e, user);
+ }
+ else {
+ e.bogus = 1;
+ more = visit(&e, user);
+ }
+ }
+ }
+}
diff --git a/packages/ti/trace/StackDbg.xdc b/packages/ti/trace/StackDbg.xdc
--- /dev/null
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2011-2014, Texas Instruments Incorporated
+ * Copyright (c) 2011, Google Inc
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== StackDbg.xdc ========
+ */
+
+/*!
+ * ======== StackDbg ========
+ *
+ * Stack Debug Helper Module
+ *
+ */
+module StackDbg {
+
+ /*!
+ * StackEntry - Structure containing elements for decoding stack
+ */
+ struct StackEntry {
+ UInt instr; /* address of calling instruction */
+ UInt op; /* opcode of calling instruction */
+ UInt target; /* jump destination of calling instr (if immediate) */
+ UInt sp; /* ptr to work on stack that we're inspecting */
+ UInt ret; /* return address at *sp */
+ UInt bogus; /* return address matches code section, but not the other
+ criteria */
+ };
+
+ /*!
+ * User-defined function pointer definition that can be called while
+ * traversing the stack. The function returns TRUE if it wants the stack
+ * to continue being walked, and FALSE otherwise.
+ */
+ typedef Bool (*VisitFuncPtr)(StackEntry *, Void *);
+
+ /*!
+ * ======== walkStack ========
+ * Walk the stack ranging at @base of @size bytes, starting at stack
+ * pointer @start pointing somewhere within the stack. Walk the stack
+ * one 32-bit word at a time, calling the the caller-provided function
+ * @visit for each return address that is found. The @visit callback
+ * is passed an instance of struct stack_entry populated, as well as an
+ * opaque user-provided value.
+ */
+ Void walkStack(UInt base, UInt size, UInt start, VisitFuncPtr visit,
+ Ptr user);
+
+internal:
+ struct Module_State {
+ UInt codeBegin;
+ UInt codeEnd;
+ }
+
+}
diff --git a/packages/ti/trace/StackDbg.xs b/packages/ti/trace/StackDbg.xs
--- /dev/null
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2011-2014, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== StackDbg.xs ========
+ */
+
+/*
+ * ======== module$static$init ========
+ */
+function module$static$init(obj, params)
+{
+ /* The EXT_CODE is assumed to have the .text region */
+ var segment = Program.cpu.memoryMap["EXT_CODE"];
+
+ obj.codeBegin = segment.base;
+ obj.codeEnd = segment.base + segment.len;
+}
+
+/*
+ * ======== module$use ========
+ */
+function module$use(obj, params)
+{
+}
index 9c110c88de65382199d7ea60aafeb30ec48ef703..c1508f965f62229c857c98fb0b7a462b251aef3c 100644 (file)
/*
- * Copyright (c) 2011-2013, Texas Instruments Incorporated
+ * Copyright (c) 2011-2014, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
/* add custom files to all releases */
Pkg.attrs.exportSrc = true;
-Pkg.otherFiles = ["package.bld", "SysMin.h"];
+Pkg.otherFiles = ["package.bld", "SysMin.h", "StackDbg.h"];
/* list of libraries to build */
var libArray = new Array();
name: "ti.trace_smp",
sources: [
"SysMin.c",
+ "StackDbg.c",
],
libAttrs: {
defs: " -DSMP"
name: "ti.trace",
sources: [
"SysMin.c",
+ "StackDbg.c",
],
}
);
index 42bbe27936101e17f6a85f36daafffccb6351879..285c67e05f2021d3110411f3dafc1cc251530d50 100644 (file)
/*
- * Copyright (c) 2011-2013, Texas Instruments Incorporated
+ * Copyright (c) 2011-2014, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
package ti.trace [0,0,0] {
module SysMin;
+ module StackDbg;
};