SDOCM00100662: Move code to config shared RAMs to Boot module

This is a poor-man's cherry-pick of
1d2b0271c6d75e4a06c02875ec2841ef23467f84 and
e6c589ac8c5a15af450366c28f5bcf69d4b3d74a
from the IPC 1.25 (ipc-i) stream.

This change was tracked as SDOCM00100430 in IPC 1.x.

diff --git a/packages/ti/sdo/ipc/family/f28m35x/IpcMgr.c b/packages/ti/sdo/ipc/family/f28m35x/IpcMgr.c
index e99abadabd34287d7fa9055d0e33d999457ccdd2..1256fd940b54eb4a76b4781f68c1295ed154879a 100644 (file)
--- a/packages/ti/sdo/ipc/family/f28m35x/IpcMgr.c
+++ b/packages/ti/sdo/ipc/family/f28m35x/IpcMgr.c
@@ -105,10 +105,6 @@ Int IpcMgr_Module_startup(Int phase)
     NotifyDriverCirc_Params notifyDrvParams;
     TransportCirc_Params transportParams;
 #ifdef xdc_target__isaCompatible_v7M
-    UInt32 i;
-    volatile UInt32 *memcnf  = (volatile UInt32 *)IpcMgr_MEMCNF;
-    volatile UInt32 *msmsel  = (volatile UInt32 *)IpcMgr_MSxMSEL;
-    volatile UInt32 *mssrcr  = (volatile UInt32 *)IpcMgr_MSxSRCR;
     volatile UInt32 *set = (volatile UInt32 *)MTOCIPCSET;
     volatile UInt32 *stat = (volatile UInt32 *)CTOMIPCSTS;
     volatile UInt32 *ack = (volatile UInt32 *)CTOMIPCACK;
@@ -138,24 +134,6 @@ Int IpcMgr_Module_startup(Int phase)
     }
 
 #ifdef xdc_target__isaCompatible_v7M
-    /*
-     *  The M3 writes the shared memory enable and owner select
-     *  registers before either processor starts using shared memory.
-     */
-
-    /* write the shared memory configuration register */
-    *memcnf = IpcMgr_sharedMemoryEnable;
-
-    /* write the owner select register */
-    *msmsel = IpcMgr_sharedMemoryOwnerMask;
-
-    /* init the owner write access registers */
-    for (i = 0; i < 2; i++) {
-        mssrcr[i] = (IpcMgr_sharedMemoryAccess[(i * 4)])           |
-                    (IpcMgr_sharedMemoryAccess[(i * 4) + 1] << 8)  |
-                    (IpcMgr_sharedMemoryAccess[(i * 4) + 2] << 16) |
-                    (IpcMgr_sharedMemoryAccess[(i * 4) + 3] << 24);
-    }
 
 #else
 
@@ -235,22 +213,6 @@ Int IpcMgr_Module_startup(Int phase)
 Void IpcMgr_init()
 {
 #ifdef xdc_target__isaCompatible_v7M
-    volatile UInt32 *mwrallow  = (volatile UInt32 *)IpcMgr_MWRALLOW;
-    volatile UInt32 *mtocrTestInit = (volatile UInt32 *)IpcMgr_MTOCRTESTINIT;
-    volatile UInt32 *mtocrInitDone = (volatile UInt32 *)IpcMgr_MTOCRINITDONE;
-
-    /* allow writes to protected registers. */
-    *mwrallow = 0xA5A5A5A5;
-
-    /* init MtoCMsgRam */
-    *mtocrTestInit |= 0x1;
-
-    /* make sure init is done */
-    while ((*mtocrInitDone & 0x1) != 0x1) {
-    }
-
-    /* Disable writes to protected registers. */
-    *mwrallow = 0;
 
 #else
 

diff --git a/packages/ti/sdo/ipc/family/f28m35x/IpcMgr.xdc b/packages/ti/sdo/ipc/family/f28m35x/IpcMgr.xdc
index 513947a3746f23e13701c7f87e75e9da15aa3788..79d575d7c785cc448b57c1a7da7c7a2d655a3d17 100644 (file)
--- a/packages/ti/sdo/ipc/family/f28m35x/IpcMgr.xdc
+++ b/packages/ti/sdo/ipc/family/f28m35x/IpcMgr.xdc
@@ -222,7 +222,7 @@ module IpcMgr
      *  If any data is loaded to a shared RAM segment, the segment must
      *  be enabled prior to loading the program through other means.
      */
-    config Bits32 sharedMemoryEnable = 0xffffffff;
+    metaonly config Bits32 sharedMemoryEnable = 0xffffffff;
 
     /*!
      *  ======== sharedMemoryOwnerMask ========
@@ -235,7 +235,7 @@ module IpcMgr
      *  the sharedMemoryAccess bits.  Setting a '1' in any bit position
      *  makes the C28 the owner of that shared RAM segment.
      */
-    config Bits32 sharedMemoryOwnerMask = 0;
+    metaonly config Bits32 sharedMemoryOwnerMask = 0;
 
     /*!
      *  ======== sharedMemoryAccess ========
@@ -246,7 +246,7 @@ module IpcMgr
      *  It determines the owner write access to each shared RAM segment.
      *  By default, the owner is allowed to fetch, DMA write, and CPU write.
      */
-    config Bits32 sharedMemoryAccess[8];
+    metaonly config Bits32 sharedMemoryAccess[8];
 
     /*!
      *  ======== readAddr ========

diff --git a/packages/ti/sdo/ipc/family/f28m35x/IpcMgr.xs b/packages/ti/sdo/ipc/family/f28m35x/IpcMgr.xs
index a53ab97aa0cfe946dcabb0157e248d9f52fcc14d..c1aa21fe0404562d5a10df1ec6100223f7968cad 100644 (file)
--- a/packages/ti/sdo/ipc/family/f28m35x/IpcMgr.xs
+++ b/packages/ti/sdo/ipc/family/f28m35x/IpcMgr.xs
@@ -40,6 +40,7 @@ var NotifyDriverCirc = null;
 var NameServerBlock  = null;
 var TransportCirc    = null;
 var Hwi              = null;
+var Boot             = null;
 
 /*
  *  ======== module$meta$init ========
@@ -82,6 +83,10 @@ function module$use()
     Hwi = xdc.useModule("ti.sysbios.hal.Hwi");
     Startup = xdc.useModule("xdc.runtime.Startup");
 
+    if (Program.build.target.name.match(/M3.*/)) {
+        Boot = xdc.useModule("ti.catalog.arm.cortexm3.concertoInit.Boot");
+    }
+
     /* Init the number of messages for notify driver */
     NotifyDriverCirc.numMsgs = IpcMgr.numNotifyMsgs;
 
@@ -97,6 +102,42 @@ function module$use()
         "configured on the M3 core.  Configuring this on the C28 core has no " +
         "effect", this);
     }
+
+    if ((Program.build.target.name.match(/M3.*/)) &&
+        ("sharedMemoryEnable" in Boot)) {
+        if (Boot.$written("sharedMemoryEnable") &&
+            Boot.sharedMemoryEnable != IpcMgr.sharedMemoryEnable) {
+            IpcMgr.$logWarning("Boot.sharedMemoryEnable was set to " +
+            "a value different from IpcMgr.sharedMemoryEnable. " +
+            "IpcMgr.sharedMemoryEnable will override the Boot setting.",
+            IpcMgr, "sharedMemoryEnable");
+        }
+
+        /* override Boot's sharedMemoryEnable with IpcMgr's */
+        Boot.sharedMemoryEnable = IpcMgr.sharedMemoryEnable;
+
+        if (Boot.$written("sharedMemoryOwnerMask") &&
+            Boot.sharedMemoryOwnerMask != IpcMgr.sharedMemoryOwnerMask) {
+            IpcMgr.$logWarning("Boot.sharedMemoryOwnerMask was set to " +
+            "a value different from IpcMgr.sharedMemoryOwnerMask. " +
+            "IpcMgr.sharedMemoryOwnerMask will override the Boot setting.",
+            IpcMgr, "sharedMemoryOwnerMask");
+        }
+
+        /* override Boot's sharedMemoryOwnerMask with IpcMgr's */
+        Boot.sharedMemoryOwnerMask = IpcMgr.sharedMemoryOwnerMask;
+
+        if (Boot.$written("sharedMemoryAccess")) {
+            IpcMgr.$logWarning("Boot.sharedMemoryAccess was modified " +
+            "but IpcMgr.sharedMemoryAccess will override the Boot setting.",
+            IpcMgr, "sharedMemoryAccess");
+        }
+
+        /* override Boot's sharedMemoryAccess with IpcMgr's */
+       for (var i = 0; i < IpcMgr.sharedMemoryAccess.length; i++) {
+            Boot.sharedMemoryAccess[i] = IpcMgr.sharedMemoryAccess[i];
+        }
+    }
 }
 
 /*