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raw | patch | inline | side by side (parent: 207bd2b)
raw | patch | inline | side by side (parent: 207bd2b)
author | Sam Nelson <sam.nelson@ti.com> | |
Fri, 23 Jun 2017 21:17:19 +0000 (17:17 -0400) | ||
committer | Sam Nelson <sam.nelson@ti.com> | |
Thu, 9 Aug 2018 20:01:32 +0000 (16:01 -0400) |
- Adds support for A53 and R5F cores
- Adds IPC VirtQueue, Interrupt & Notity drivers for AM65XX platform.
- gates: Add V7R and v8A support
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
- Adds IPC VirtQueue, Interrupt & Notity drivers for AM65XX platform.
- gates: Add V7R and v8A support
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
53 files changed:
diff --git a/configure.ac b/configure.ac
index f0b4b61ed7243113cc1a5eb1f350b3630685e313..4d4a559cf33b4492da8fa24ac867d9fc7462b141 100644 (file)
--- a/configure.ac
+++ b/configure.ac
#
-# Copyright (c) 2013-2015 Texas Instruments Incorporated - http://www.ti.com
+# Copyright (c) 2013-2018 Texas Instruments Incorporated - http://www.ti.com
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# Add config variables/options and check them
# Note that 6614 isn't documented and, though it may work, is planned for removal
-AC_ARG_VAR(PLATFORM, Platform to build. Options are: 'OMAPL138' 'OMAP54XX' '66AK2E' 'TCI6630' 'TCI6636' 'TCI6638' '66AK2G' and 'DRA7XX'. If not defined all platforms will be built.)
+AC_ARG_VAR(PLATFORM, Platform to build. Options are: 'OMAPL138' 'OMAP54XX' '66AK2E' 'TCI6630' 'TCI6636' 'TCI6638' '66AK2G' 'DRA7XX' and 'AM65XX'. If not defined all platforms will be built.)
AC_ARG_VAR(CMEM_INSTALL_DIR, Installation path directory to the CMEM libraries)
AC_ARG_VAR(KERNEL_INSTALL_DIR, Installation path to the Linux kernel.)
AC_ARG_VAR(AF_RPMSG, Address Family used by the RPMSG driver)
[AC_MSG_NOTICE([PLATFORM is set to ${PLATFORM}])],
[AS_IF([test "x$PLATFORM" = "xDRA7XX"],
[AC_MSG_NOTICE([PLATFORM is set to ${PLATFORM}])],
+ [AS_IF([test "x$PLATFORM" = "xAM65XX"],
+ [AC_MSG_NOTICE([PLATFORM is set to ${PLATFORM}])],
[AS_IF([test "x$PLATFORM" = "x"],
[AC_MSG_NOTICE([PLATFORM is not set. All supported platforms will be built ....])],
- [AC_MSG_ERROR([PLATFORM is set to "${PLATFORM}": run ./configure --help for available PLATFORM options])])])])])])])])])])])
+ [AC_MSG_ERROR([PLATFORM is set to "${PLATFORM}": run ./configure --help for available PLATFORM options])])])])])])])])])])])])
# If platform is specified, make sure at least one of
# KERNEL_INSTALL_DIR or AF_MSG are set.
AM_CONDITIONAL([C66AK2G], [test "x$PLATFORM" = "x66AK2G"])
AM_CONDITIONAL([OMAP54XX_SMP], [test "x$PLATFORM" = "xOMAP54XX"])
AM_CONDITIONAL([DRA7XX], [test "x$PLATFORM" = "xDRA7XX"])
+AM_CONDITIONAL([AM65XX], [test "x$PLATFORM" = "xAM65XX"])
AM_CONDITIONAL([CMEM], [test "x$CMEM_INSTALL_DIR" != "x"])
AM_CONDITIONAL([KDIR], [test "x$KERNEL_INSTALL_DIR" != "x"])
AM_CONDITIONAL([KERNEL_INSTALL_DIR], [test -n "$KERNEL_INSTALL_DIR"])
diff --git a/ipc-bios.bld b/ipc-bios.bld
index 978571a10f3a7cbb85e49f2b5dc9f72cb4f35656..bae3eacb69919d02ecab7d6f5ac0f0206910fb54 100644 (file)
--- a/ipc-bios.bld
+++ b/ipc-bios.bld
/*
- * Copyright (c) 2011-2015 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2011-2018 Texas Instruments Incorporated - http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
"ti.targets.arm.elf.M3" : " --embed_inline_assembly -ms -pds=71",
"ti.targets.arm.elf.M4" : " -ms -g ",
"ti.targets.arm.elf.M4F" : " -ms -g ",
+ "ti.targets.arm.elf.R5F" : " -ms -g ",
"ti.targets.arp32.elf.ARP32" : " -g ",
"ti.targets.arp32.elf.ARP32_far" : " -g ",
"gnu.targets.arm.A8F" : " -g ",
- "gnu.targets.arm.A15F" : " -g "
+ "gnu.targets.arm.A15F" : " -g ",
+ "gnu.targets.arm.A53F" : " -g "
};
var lnkOpts = {
"ti.targets.elf.C66" : " --cinit_compression=off",
"ti.targets.arm.elf.M4" : " --retain=.resource_table" +
+ " --cinit_compression=off",
+ "ti.targets.arm.elf.R5F" : " --retain=.resource_table" +
" --cinit_compression=off"
};
continue;
}
-// print("Building '" + targetName + "' using '" + rootDir + "' ...");
+// print("Building for platform:" + platform + " targetName:" + targetName
+// + " rootDir: " + rootDir + " smpEnabled:" + smpEnabled + "...");
var target = xdc.useModule(targetName);
target.rootDir = rootDir;
}
}
+ if (targetName.match(/elf\.R5F$/)) {
+ switch (platform) {
+ case 'AM65XX':
+ target.platforms.$add("ti.platforms.cortexR:AM65X");
+ break;
+
+ default:
+ print("Unknown R5F platform, skipping " + platform);
+ break;
+ }
+ }
+
Build.targets.$add(target);
}
xdc.module("ti.targets.arm.elf.M4").profiles["debug"];
xdc.module("gnu.targets.arm.A15F").profiles["smp"] =
xdc.module("gnu.targets.arm.A15F").profiles["debug"];
+ xdc.module("gnu.targets.arm.A53F").profiles["smp"] =
+ xdc.module("gnu.targets.arm.A53F").profiles["debug"];
}
}
diff --git a/ipc-bios.mak b/ipc-bios.mak
index 77b05cda2d684d0d33c97609e90e93161bd56cc0..3877f47f184bb987fba6407e2a37c1333821837f 100644 (file)
--- a/ipc-bios.mak
+++ b/ipc-bios.mak
#
-# Copyright (c) 2012-2015, Texas Instruments Incorporated
+# Copyright (c) 2012-2018, Texas Instruments Incorporated
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
ti.targets.arm.elf.M3=\"$(ti.targets.arm.elf.M3)\" \
ti.targets.arm.elf.M4=\"$(ti.targets.arm.elf.M4)\" \
ti.targets.arm.elf.M4F=\"$(ti.targets.arm.elf.M4F)\" \
+ ti.targets.arm.elf.R5F=\"$(ti.targets.arm.elf.R5F)\" \
ti.targets.elf.C64P=\"$(ti.targets.elf.C64P)\" \
ti.targets.elf.C64P_big_endian=\"$(ti.targets.elf.C64P_big_endian)\" \
ti.targets.elf.C64T=\"$(ti.targets.elf.C64T)\" \
ti.targets.arp32.elf.ARP32=\"$(ti.targets.arp32.elf.ARP32)\" \
ti.targets.arp32.elf.ARP32_far=\"$(ti.targets.arp32.elf.ARP32_far)\" \
gnu.targets.arm.A8F=\"$(gnu.targets.arm.A8F)\" \
- gnu.targets.arm.A15F=\"$(gnu.targets.arm.A15F)\"
+ gnu.targets.arm.A15F=\"$(gnu.targets.arm.A15F)\" \
+ gnu.targets.arm.A53F=\"$(gnu.targets.arm.A53F)\"
ifeq ($(MAKECMDGOALS),release)
XDCARGS += GOAL=release
index ecb9b72a19d7ef7ab8f4a6d7f5e45c727dba7211..dfdfa3f2642125dc05c7b1faa19d603933925e0f 100644 (file)
##
-## Copyright (c) 2013-2015 Texas Instruments Incorporated - http://www.ti.com
+## Copyright (c) 2013-2018 Texas Instruments Incorporated - http://www.ti.com
##
## Redistribution and use in source and binary forms, with or without
## modification, are permitted provided that the following conditions
if C66AK2G
bin_PROGRAMS += lad_66ak2g
else
- bin_PROGRAMS += lad_omap54xx_smp lad_dra7xx lad_omapl138 lad_66ak2e lad_tci6614 lad_tci6630 lad_tci6636 lad_tci6638 lad_66ak2g
+if AM65XX
+ bin_PROGRAMS += lad_am65xx
+else
+ bin_PROGRAMS += lad_omap54xx_smp lad_dra7xx lad_omapl138 lad_66ak2e lad_tci6614 lad_tci6630 lad_tci6636 lad_tci6638 lad_66ak2g lad_am65xx
+endif
endif
endif
endif
lad_tci6636_SOURCES = $(common_sources) cfg/MultiProcCfg_tci6638.c
lad_tci6638_SOURCES = $(common_sources) cfg/MultiProcCfg_tci6638.c
lad_66ak2g_SOURCES = $(common_sources) cfg/MultiProcCfg_66ak2g.c
+lad_am65xx_SOURCES = $(common_sources) cfg/MultiProcCfg_am65xx.c
common_libraries = -lpthread \
$(top_builddir)/linux/src/utils/libtiipcutils_lad.la
$(AM_LDFLAGS)
lad_66ak2g_LDADD = $(common_libraries) \
$(AM_LDFLAGS)
+lad_am65xx_LDADD = $(common_libraries) \
+ $(AM_LDFLAGS)
###############################################################################
diff --git a/linux/src/daemon/cfg/MultiProcCfg_am65xx.c b/linux/src/daemon/cfg/MultiProcCfg_am65xx.c
--- /dev/null
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * ======== MultiProcCfg.c ========
+ * System-wide MultiProc configuration
+ */
+
+/* Standard IPC headers */
+#include <ti/ipc/Std.h>
+
+/* For Backplane IPC startup/shutdown stuff: */
+#include <_MultiProc.h>
+
+#include <linux/version.h>
+
+/* This must match BIOS side MultiProc configuration for given platform!: */
+MultiProc_Config _MultiProc_cfg = {
+ .numProcessors = 3,
+ .nameList[0] = "HOST",
+ .nameList[1] = "R5F-0",
+ .nameList[2] = "R5F-1",
+ .rprocList[0] = -1,
+ .rprocList[1] = 0,
+ .rprocList[2] = 1,
+ .id = 0, /* The host is always zero */
+ .numProcsInCluster = 3,
+ .baseIdOfCluster = 0
+};
index b59af3748e0588cc64345c6bc9411a05d9636f23..ddcdebda44cd5ba4f97cb9be001c8c9236849d9b 100644 (file)
##
-## Copyright (c) 2013-2017 Texas Instruments Incorporated - http://www.ti.com
+## Copyright (c) 2013-2018 Texas Instruments Incorporated - http://www.ti.com
##
## Redistribution and use in source and binary forms, with or without
## modification, are permitted provided that the following conditions
# Add platform specific bin application's here
bin_PROGRAMS +=
else
+if AM65XX
+# Add platform specific bin application's here
+ bin_PROGRAMS +=
+else
# Add platform independent apps here or above in bin_PROGRAMS
if CMEM
bin_PROGRAMS += nano_test
endif
endif
endif
+endif
common_sources = \
$(top_srcdir)/linux/include/ti/ipc/Std.h \
diff --git a/packages/ti/ipc/family/am65xx/InterruptProxy.h b/packages/ti/ipc/family/am65xx/InterruptProxy.h
--- /dev/null
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2017-2018, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * ======== InterruptProxy.h ========
+ * Proxy Interrupt Manager
+ */
+
+#ifndef ti_ipc_family_am65xx_InterruptProxy__include
+#define ti_ipc_family_am65xx_InterruptProxy__include
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*
+ * Note that "v7R" matches R5F core
+ */
+#if defined(xdc_target__isaCompatible_v7R)
+
+#include <ti/sdo/ipc/family/am65xx/InterruptR5f.h>
+/*
+ *************************************************************************
+ * R5F Interrupt Proxy Macros
+ *************************************************************************
+ */
+
+#define InterruptProxy_intEnable InterruptR5f_intEnable
+
+#define InterruptProxy_intDisable InterruptR5f_intDisable
+
+#define InterruptProxy_intRegister InterruptR5f_intRegister
+
+#define InterruptProxy_intSend InterruptR5f_intSend
+
+#define InterruptProxy_intClear InterruptR5f_intClear
+
+#endif
+
+#if defined(__cplusplus)
+}
+#endif /* defined (__cplusplus) */
+
+#endif /* ti_ipc_family_am65xx_InterruptProxy__include */
diff --git a/packages/ti/ipc/family/am65xx/VirtQueue.c b/packages/ti/ipc/family/am65xx/VirtQueue.c
--- /dev/null
@@ -0,0 +1,558 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** ============================================================================
+ * @file VirtQueue.c
+ *
+ * @brief Virtio Queue implementation for BIOS
+ *
+ * Differences between BIOS version and Linux kernel (include/linux/virtio.h):
+ * - Renamed module from virtio.h to VirtQueue_Object.h to match the API
+ * prefixes;
+ * - BIOS (XDC) types and CamelCasing used;
+ * - virtio_device concept removed (i.e, assumes no containing device);
+ * - simplified scatterlist from Linux version;
+ * - VirtQueue_Objects are created statically here, so just added a
+ * VirtQueue_Object_init()
+ * fxn to take the place of the Virtio vring_new_virtqueue() API;
+ * - The notify function is implicit in the implementation, and not provided
+ * by the client, as it is in Linux virtio.
+ *
+ * All VirtQueue operations can be called in any context.
+ *
+ * The virtio header should be included in an application as follows:
+ * @code
+ * #include <ti/ipc/family/am65xx/VirtQueue.h>
+ * @endcode
+ *
+ */
+
+/* this define must precede inclusion of any xdc header file */
+#define Registry_CURDESC ti_ipc_family_am65xx__Desc
+#define MODULE_NAME "ti.ipc.family.am65xx.VirtQueue"
+
+#include <string.h>
+
+#include <xdc/std.h>
+#include <xdc/runtime/System.h>
+#include <xdc/runtime/Assert.h>
+#include <xdc/runtime/Error.h>
+#include <xdc/runtime/Memory.h>
+#include <xdc/runtime/Registry.h>
+#include <xdc/runtime/Log.h>
+#include <xdc/runtime/Diags.h>
+
+#include <ti/sysbios/hal/Hwi.h>
+#include <ti/sysbios/knl/Clock.h>
+#include <ti/sysbios/gates/GateHwi.h>
+#include <ti/sysbios/hal/Cache.h>
+
+#include <ti/ipc/MultiProc.h>
+#include <ti/ipc/remoteproc/Resource.h>
+#include <ti/ipc/remoteproc/rsc_types.h>
+#include <ti/ipc/rpmsg/virtio_ring.h>
+#include <ti/ipc/rpmsg/_VirtQueue.h>
+#include <ti/pm/IpcPower.h>
+#include <ti/sdo/ipc/notifyDrivers/IInterrupt.h>
+
+#include "InterruptProxy.h"
+#include "VirtQueue.h"
+
+/*
+ * The following three VIRTIO_* defines must match those in
+ * <Linux_kernel>/include/uapi/linux/virtio_config.h
+ */
+#define VIRTIO_CONFIG_S_ACKNOWLEDGE 1
+#define VIRTIO_CONFIG_S_DRIVER 2
+#define VIRTIO_CONFIG_S_DRIVER_OK 4
+
+#define VRING_BUFS_PRIMED (VIRTIO_CONFIG_S_ACKNOWLEDGE | \
+ VIRTIO_CONFIG_S_DRIVER | VIRTIO_CONFIG_S_DRIVER_OK)
+
+/* Used for defining the size of the virtqueue registry */
+#define NUM_QUEUES 2
+
+/*
+ * Size of the virtqueues (expressed in number of buffers supported,
+ * and must be power of two)
+ */
+#define VQ_SIZE 256
+
+/*
+ * enum - Predefined Mailbox Messages
+ *
+ * @RP_MSG_MBOX_READY: informs the slave that we're up and running. will be
+ * followed by another mailbox message that carries the HOST's virtual address
+ * of the shared buffer. This would allow the HOST's drivers to send virtual
+ * addresses of the buffers.
+ *
+ * @RP_MSG_MBOX_STATE_CHANGE: informs the receiver that there is an inbound
+ * message waiting in its own receive-side vring. please note that currently
+ * this message is optional: alternatively, one can explicitly send the index
+ * of the triggered virtqueue itself. the preferred approach will be decided
+ * as we progress and experiment with those design ideas.
+ *
+ * @RP_MSG_MBOX_CRASH: this message indicates that the BIOS side is unhappy
+ *
+ * @RP_MBOX_ECHO_REQUEST: this message requests the remote processor to reply
+ * with RP_MBOX_ECHO_REPLY
+ *
+ * @RP_MBOX_ECHO_REPLY: this is a reply that is sent when RP_MBOX_ECHO_REQUEST
+ * is received.
+ *
+ * @RP_MBOX_ABORT_REQUEST: tells the M3 to crash on demand
+ *
+ * @RP_MBOX_BOOTINIT_DONE: this message indicates the BIOS side has reached a
+ * certain state during the boot process. This message is used to inform the
+ * host that the basic BIOS initialization is done, and lets the host use this
+ * notification to perform certain actions.
+ */
+enum {
+ RP_MSG_MBOX_READY = (Int)0xFFFFFF00,
+ RP_MSG_MBOX_STATE_CHANGE = (Int)0xFFFFFF01,
+ RP_MSG_MBOX_CRASH = (Int)0xFFFFFF02,
+ RP_MBOX_ECHO_REQUEST = (Int)0xFFFFFF03,
+ RP_MBOX_ECHO_REPLY = (Int)0xFFFFFF04,
+ RP_MBOX_ABORT_REQUEST = (Int)0xFFFFFF05,
+ RP_MSG_FLUSH_CACHE = (Int)0xFFFFFF06,
+ RP_MSG_BOOTINIT_DONE = (Int)0xFFFFFF07,
+ RP_MSG_HIBERNATION = (Int)0xFFFFFF10,
+ RP_MSG_HIBERNATION_FORCE = (Int)0xFFFFFF11,
+ RP_MSG_HIBERNATION_ACK = (Int)0xFFFFFF12,
+ RP_MSG_HIBERNATION_CANCEL = (Int)0xFFFFFF13
+};
+
+#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
+#define RP_MSG_NUM_BUFS (VQ_SIZE) /* must be power of two */
+#define RP_MSG_BUF_SIZE (512)
+#define RP_MSG_BUFS_SPACE (RP_MSG_NUM_BUFS * RP_MSG_BUF_SIZE * 2)
+
+#define PAGE_SIZE (4096)
+/*
+ * The alignment to use between consumer and producer parts of vring.
+ * Note: this is part of the "wire" protocol. If you change this, you need
+ * to update your BIOS image as well
+ */
+#define RP_MSG_VRING_ALIGN (4096)
+
+/* With 256 buffers, our vring will occupy 3 pages */
+#define RP_MSG_RING_SIZE ((DIV_ROUND_UP(vring_size(RP_MSG_NUM_BUFS, \
+ RP_MSG_VRING_ALIGN), PAGE_SIZE)) * PAGE_SIZE)
+
+/* The total IPC space needed to communicate with a remote processor */
+#define RPMSG_IPC_MEM (RP_MSG_BUFS_SPACE + 2 * RP_MSG_RING_SIZE)
+
+typedef struct VirtQueue_Object {
+ /* Id for this VirtQueue_Object */
+ UInt16 id;
+
+ /* The function to call when buffers are consumed (can be NULL) */
+ VirtQueue_callback callback;
+
+ /* Shared state */
+ struct vring vring;
+
+ /* Number of free buffers */
+ UInt16 num_free;
+
+ /* Last available index; updated by VirtQueue_getAvailBuf */
+ UInt16 last_avail_idx;
+
+ /* Will eventually be used to kick remote processor */
+ UInt16 procId;
+
+ /* Gate to protect from multiple threads */
+ GateHwi_Handle gateH;
+
+ /* Base phys addr - used for quick pa/va translations */
+ UInt32 basePa;
+
+ /* Base virt addr - used for quick pa/va translations */
+ UInt32 baseVa;
+} VirtQueue_Object;
+
+/* module diags mask */
+Registry_Desc Registry_CURDESC;
+
+static struct VirtQueue_Object *queueRegistry[NUM_QUEUES] = {NULL};
+
+static UInt16 hostProcId;
+
+#define DSPEVENTID 5
+IInterrupt_IntInfo intInfo;
+
+/*!
+ * ======== _VirtQueue_init ========
+ *
+ * This function adds the VirtQueue "module" to the Registry so that
+ * DIAGS will work with this non-XDC module.
+ * Since VirtQueue_init is not called by XDC-VirtQueue module clients, this
+ * function is called in the first VirtQueue fxn called: VirtQueue_create.
+ */
+static Void _VirtQueue_init()
+{
+ static int initialized = 0;
+
+ if (!initialized) {
+ Registry_Result result;
+
+ /* register with xdc.runtime to get a diags mask */
+ result = Registry_addModule(&Registry_CURDESC, MODULE_NAME);
+ Assert_isTrue(result == Registry_SUCCESS, (Assert_Id)NULL);
+
+ initialized = 1;
+ }
+}
+
+static inline Void * _VirtQueue_getVA(VirtQueue_Handle vq, UInt32 pa)
+{
+ return (Void *)(pa - vq->basePa + vq->baseVa);
+}
+
+/*!
+ * ======== VirtQueue_kick ========
+ */
+Void VirtQueue_kick(VirtQueue_Handle vq)
+{
+ /* For now, simply interrupt remote processor */
+ if (vq->vring.avail->flags & VRING_AVAIL_F_NO_INTERRUPT) {
+ Log_print0(Diags_USER1,
+ "VirtQueue_kick: no kick because of VRING_AVAIL_F_NO_INTERRUPT\n");
+ return;
+ }
+
+ Log_print2(Diags_USER1,
+ "VirtQueue_kick: Sending interrupt to proc %d with payload 0x%x\n",
+ (IArg)vq->procId, (IArg)vq->id);
+ InterruptProxy_intSend(vq->procId, NULL, vq->id);
+}
+
+/*!
+ * ======== VirtQueue_addUsedBuf ========
+ */
+Int VirtQueue_addUsedBuf(VirtQueue_Handle vq, Int16 head, Int len)
+{
+ struct vring_used_elem *used;
+ IArg key;
+
+ key = GateHwi_enter(vq->gateH);
+ if ((head > vq->vring.num) || (head < 0)) {
+ GateHwi_leave(vq->gateH, key);
+ Error_raise(NULL, Error_E_generic, 0, 0);
+ }
+
+ /*
+ * The virtqueue contains a ring of used buffers. Get a pointer to the
+ * next entry in that used ring.
+ */
+ used = &vq->vring.used->ring[vq->vring.used->idx % vq->vring.num];
+ used->id = head;
+ used->len = len;
+
+ vq->vring.used->idx++;
+ GateHwi_leave(vq->gateH, key);
+
+ return (0);
+}
+
+/*!
+ * ======== VirtQueue_getAvailBuf ========
+ */
+Int16 VirtQueue_getAvailBuf(VirtQueue_Handle vq, Void **buf, Int *len)
+{
+ Int16 head;
+ IArg key;
+
+ key = GateHwi_enter(vq->gateH);
+ Log_print6(Diags_USER1, "getAvailBuf vq: 0x%x %d %d %d 0x%x 0x%x\n",
+ (IArg)vq, vq->last_avail_idx, vq->vring.avail->idx, vq->vring.num,
+ (IArg)&vq->vring.avail, (IArg)vq->vring.avail);
+
+ /* Clear flag here to avoid race condition with remote processor.
+ * This is a negative flag, clearing it means that we want to
+ * receive an interrupt when a buffer has been added to the pool.
+ */
+ vq->vring.used->flags &= ~VRING_USED_F_NO_NOTIFY;
+
+ /* There's nothing available? */
+ if (vq->last_avail_idx == vq->vring.avail->idx) {
+ head = (-1);
+ }
+ else {
+ /* No need to be kicked about added buffers anymore */
+ vq->vring.used->flags |= VRING_USED_F_NO_NOTIFY;
+
+ /*
+ * Grab the next descriptor number they're advertising, and increment
+ * the index we've seen.
+ */
+ head = vq->vring.avail->ring[vq->last_avail_idx++ % vq->vring.num];
+
+ *buf = _VirtQueue_getVA(vq, vq->vring.desc[head].addr);
+ *len = vq->vring.desc[head].len;
+ }
+ GateHwi_leave(vq->gateH, key);
+
+ return (head);
+}
+
+/*!
+ * ======== VirtQueue_disableCallback ========
+ */
+Void VirtQueue_disableCallback(VirtQueue_Object *vq)
+{
+ /* TODO */
+ Log_print0(Diags_USER1, "VirtQueue_disableCallback called.");
+}
+
+/*!
+ * ======== VirtQueue_enableCallback ========
+ */
+Bool VirtQueue_enableCallback(VirtQueue_Object *vq)
+{
+ Log_print0(Diags_USER1, "VirtQueue_enableCallback called.");
+
+ /* TODO */
+ return (FALSE);
+}
+
+/*!
+ * ======== VirtQueue_isr ========
+ * Note 'arg' is ignored: it is the Hwi argument, not the mailbox argument.
+ */
+Void VirtQueue_isr(UArg msg)
+{
+ VirtQueue_Object *vq;
+
+ msg = InterruptProxy_intClear(hostProcId, &intInfo);
+
+ Log_print1(Diags_USER1, "VirtQueue_isr received msg = 0x%x\n", msg);
+
+ switch(msg) {
+ case (UInt)RP_MSG_MBOX_READY:
+ return;
+
+ case (UInt)RP_MBOX_ECHO_REQUEST:
+ InterruptProxy_intSend(hostProcId, NULL, (UInt)(RP_MBOX_ECHO_REPLY));
+ return;
+
+ case (UInt)RP_MBOX_ABORT_REQUEST:
+ {
+ /* Suppress Coverity Error: FORWARD_NULL: */
+ /* coverity[assign_zero] */
+ Fxn f = (Fxn)0x0;
+ Log_print0(Diags_USER1, "Crash on demand ...\n");
+ /* coverity[var_deref_op] */
+ f();
+ }
+ return;
+
+ case (UInt)RP_MSG_FLUSH_CACHE:
+ Cache_wbAll();
+ return;
+#if 0
+/* TODO: Support Hibernation */
+ case (UInt)RP_MSG_HIBERNATION:
+ if (IpcPower_canHibernate() == FALSE) {
+ InterruptProxy_intSend(hostProcId, NULL,
+ (UInt)RP_MSG_HIBERNATION_CANCEL);
+ return;
+ }
+
+ /* Fall through */
+ case (UInt)RP_MSG_HIBERNATION_FORCE:
+ /* Ack request */
+ InterruptProxy_intSend(hostProcId, NULL,
+ (UInt)RP_MSG_HIBERNATION_ACK);
+ IpcPower_suspend();
+ return;
+#endif
+ default:
+ /*
+ * If the message isn't one of the above, it's either part of the
+ * 2-message synchronization sequence or it a virtqueue message
+ */
+ break;
+ }
+
+ /* Don't let unknown messages to pass as a virtqueue index */
+ if (msg >= NUM_QUEUES) {
+ /* Adding print here deliberately, we should never see this */
+ System_printf("VirtQueue_isr: Invalid mailbox message 0x%x "
+ "received\n", msg);
+ return;
+ }
+
+ vq = queueRegistry[msg];
+ if (vq) {
+ vq->callback(vq);
+ }
+}
+
+
+/*!
+ * ======== VirtQueue_create ========
+ */
+VirtQueue_Handle VirtQueue_create(UInt16 remoteProcId, VirtQueue_Params *params,
+ Error_Block *eb)
+{
+ VirtQueue_Object *vq;
+ Void *vringAddr;
+ Int result;
+
+ /* Perform initialization we can't do in Instance_init (being non-XDC): */
+ _VirtQueue_init();
+
+ vq = Memory_alloc(NULL, sizeof(VirtQueue_Object), 0, eb);
+ if (NULL == vq) {
+ return (NULL);
+ }
+
+ /* Create the thread protection gate */
+ vq->gateH = GateHwi_create(NULL, eb);
+ if (Error_check(eb)) {
+ Log_error0("VirtQueue_create: could not create gate object");
+ Memory_free(NULL, vq, sizeof(VirtQueue_Object));
+ return (NULL);
+ }
+
+ vq->callback = params->callback;
+ vq->id = params->vqId;
+ vq->procId = remoteProcId;
+ vq->last_avail_idx = 0;
+
+ switch (vq->id) {
+ /* IPC transport vrings */
+ case ID_SELF_TO_HOST:
+ case ID_HOST_TO_SELF:
+ vq->basePa = (UInt32)Resource_getVringDA(vq->id);
+ Assert_isTrue(vq->basePa != 0, NULL);
+
+ result = Resource_physToVirt(vq->basePa, &(vq->baseVa));
+ Assert_isTrue(result == Resource_S_SUCCESS, (Assert_Id)NULL);
+
+ vringAddr = (Void *)vq->baseVa;
+ break;
+ default:
+ GateHwi_delete(&vq->gateH);
+ Memory_free(NULL, vq, sizeof(VirtQueue_Object));
+ return (NULL);
+ }
+
+ Log_print3(Diags_USER1,
+ "vring: %d 0x%x (0x%x)\n", vq->id, (IArg)vringAddr,
+ RP_MSG_RING_SIZE);
+
+ /* See coverity related comment in vring_init() */
+ /* coverity[overrun-call] */
+ vring_init(&(vq->vring), RP_MSG_NUM_BUFS, vringAddr, RP_MSG_VRING_ALIGN);
+
+ /*
+ * Don't trigger a mailbox message every time MPU makes another buffer
+ * available
+ */
+ if (vq->procId == hostProcId) {
+ vq->vring.used->flags &= ~VRING_USED_F_NO_NOTIFY;
+ }
+
+ queueRegistry[vq->id] = vq;
+
+ return (vq);
+}
+
+/*!
+ * ======== VirtQueue_startup ========
+ */
+Void VirtQueue_startup()
+{
+ hostProcId = MultiProc_getId("HOST");
+
+/* Note that "64P" matches 64P, 674, 66 and others.
+ * TODO: Leaving C64P for now. If am65xx adds c7x, need to add corresponding changes.
+ */
+#if defined(xdc_target__isaCompatible_64P)
+ intInfo.intVectorId = DSPEVENTID;
+#endif
+#if 0 /* TODO: Disable IPC power init for now. Enable when IPCPower is ported */
+ /* Initilize the IpcPower module */
+ IpcPower_init();
+#endif
+ /*
+ * Wait for HLOS (Virtio device) to indicate that priming of host's receive
+ * buffers is complete, indicating that host is ready to send.
+ *
+ * Though this is a Linux Virtio configuration status, it must be
+ * implemented by each non-Linux HLOS as well.
+ */
+ Log_print1(Diags_USER1, "VirtQueue_startup: VDEV status: 0x%x\n",
+ Resource_getVdevStatus(VIRTIO_ID_RPMSG));
+ Log_print0(Diags_USER1, "VirtQueue_startup: Polling VDEV status...\n");
+ while (Resource_getVdevStatus(VIRTIO_ID_RPMSG) != VRING_BUFS_PRIMED);
+ Log_print1(Diags_USER1, "VirtQueue_startup: VDEV status: 0x%x\n",
+ Resource_getVdevStatus(VIRTIO_ID_RPMSG));
+
+ InterruptProxy_intRegister(hostProcId, &intInfo, (Fxn)VirtQueue_isr,
+ (UArg)NULL);
+ Log_print0(Diags_USER1, "Passed VirtQueue_startup\n");
+}
+
+/*!
+ * ======== VirtQueue_postCrashToMailbox ========
+ */
+Void VirtQueue_postCrashToMailbox(Void)
+{
+ InterruptProxy_intSend(0, NULL, (UInt)RP_MSG_MBOX_CRASH);
+}
+
+#define CACHE_WB_TICK_PERIOD 5
+
+/*!
+ * ======== ti_ipc_family_am65xx_VirtQueue_cacheWb ========
+ *
+ * Used for flushing SysMin trace buffer.
+ */
+Void ti_ipc_family_am65xx_VirtQueue_cacheWb()
+{
+ static UInt32 oldticks = 0;
+ UInt32 newticks;
+
+ newticks = Clock_getTicks();
+ if (newticks - oldticks < (UInt32)CACHE_WB_TICK_PERIOD) {
+ /* Don't keep flushing cache */
+ return;
+ }
+
+ oldticks = newticks;
+
+ /* Flush the cache */
+ Cache_wbAll();
+}
diff --git a/packages/ti/ipc/family/am65xx/VirtQueue.h b/packages/ti/ipc/family/am65xx/VirtQueue.h
--- /dev/null
@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2011-2018, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** ============================================================================
+ * @file VirtQueue.h
+ *
+ * @brief Virtio Queue interface for BIOS
+ *
+ * Differences between BIOS version and Linux kernel (include/linux/virtio.h):
+ * - Renamed module from virtio.h to VirtQueue.h to match the API prefixes;
+ * - BIOS (XDC) types and CamelCasing used;
+ * - virtio_device concept removed (i.e, assumes no containing device);
+ * - removed scatterlist;
+ * - VirtQueues are created statically here, so just added a VirtQueue_init()
+ * fxn to take the place of the Virtio vring_new_virtqueue() API;
+ * - The notify function is implicit in the implementation, and not provided
+ * by the client, as it is in Linux virtio.
+ * - Broke into APIs to add/get used and avail buffers, as the API is
+ * assymmetric.
+ *
+ * Usage:
+ * This IPC only works between one processor designated as the Host (Linux)
+ * and one or more Slave processors (BIOS).
+ *
+ * For any Host/Slave pair, there are 2 VirtQueues (aka Vrings);
+ * Only the Host adds new buffers to the avail list of a vring;
+ * Available buffers can be empty or full, depending on direction;
+ * Used buffer means "processed" (emptied or filled);
+ *
+ * Host:
+ * - To send buffer to the slave processor:
+ * add_avail_buf(slave_virtqueue);
+ * kick(slave_virtqueue);
+ * get_used_buf(slave_virtqueue);
+ * - To receive buffer from slave processor:
+ * add_avail_buf(host_virtqueue);
+ * kick(host_virtqueue);
+ * get_used_buf(host_virtqueue);
+ *
+ * Slave:
+ * - To send buffer to the host:
+ * get_avail_buf(host_virtqueue);
+ * add_used_buf(host_virtqueue);
+ * kick(host_virtqueue);
+ * - To receive buffer from the host:
+ * get_avail_buf(slave_virtqueue);
+ * add_used_buf(slave_virtqueue);
+ * kick(slave_virtqueue);
+ *
+ * All VirtQueue operations can be called in any context.
+ *
+ * The virtio header should be included in an application as follows:
+ * @code
+ * #include <ti/ipc/rpmsg/VirtQueue.h>
+ * @endcode
+ *
+ * ============================================================================
+ */
+
+#ifndef ti_ipc_family_am6x_VirtQueue__include
+#define ti_ipc_family_am6x_VirtQueue__include
+
+#include <xdc/runtime/Error.h>
+
+#if defined (__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief a queue to register buffers for sending or receiving.
+ */
+typedef struct VirtQueue_Object *VirtQueue_Handle;
+
+/*!
+ * @var VirtQueue_callback
+ * @brief Signature of any callback function that can be registered with the
+ * VirtQueue
+ *
+ * @param[in] VirtQueue Pointer to the VirtQueue which was signalled.
+ */
+typedef Void (*VirtQueue_callback)(VirtQueue_Handle);
+
+/*!
+ * @brief VirtQueue_params
+ */
+typedef struct VirtQueue_Params {
+ VirtQueue_callback callback;
+ Int vqId;
+} VirtQueue_Params;
+
+/* Params_init */
+static inline void VirtQueue_Params_init( VirtQueue_Params *prms )
+{
+ /* Do nothing: We are emulating an XDC generated fxn, w/o XDC config! */
+}
+
+/*!
+ * @brief Initialize at runtime the VirtQueue
+ *
+ * @param[in] procId Processor ID associated with this VirtQueue.
+ * @param[in] params VirtQueue_Params {callback, vqId}.
+ * @param[in] eb Error_Block (or NULL).
+ *
+ * @Returns Returns a handle to a new initialized VirtQueue.
+ */
+VirtQueue_Handle VirtQueue_create(UInt16 procId, VirtQueue_Params *params,
+ Error_Block *eb);
+
+/*!
+ * @brief Notify other processor of new buffers in the queue.
+ *
+ * After one or more add_buf calls, invoke this to kick the other side.
+ *
+ * @param[in] vq the VirtQueue.
+ *
+ * @sa VirtQueue_addBuf
+ */
+Void VirtQueue_kick(VirtQueue_Handle vq);
+
+/*!
+ * @brief Used at startup-time for initialization
+ *
+ * Should be called before any other VirtQueue APIs
+ */
+Void VirtQueue_startup();
+
+
+/*
+ * ============================================================================
+ * Host Only Functions:
+ * ============================================================================
+ */
+
+/*!
+ * @brief Add available buffer to virtqueue's available buffer list.
+ * Only used by Host.
+ *
+ * @param[in] vq the VirtQueue.
+ * @param[in] buf the buffer to be processed by the slave.
+ *
+ * @return Remaining capacity of queue or a negative error.
+ *
+ * @sa VirtQueue_getUsedBuf
+ */
+Int VirtQueue_addAvailBuf(VirtQueue_Handle vq, Void *buf);
+
+/*!
+ * @brief Get the next used buffer.
+ * Only used by Host.
+ *
+ * @param[in] vq the VirtQueue.
+ *
+ * @return Returns NULL or the processed buffer.
+ *
+ * @sa VirtQueue_addAvailBuf
+ */
+Void *VirtQueue_getUsedBuf(VirtQueue_Handle vq);
+
+/*
+ * ============================================================================
+ * Slave Only Functions:
+ * ============================================================================
+ */
+
+/*!
+ * @brief Get the next available buffer.
+ * Only used by Slave.
+ *
+ * @param[in] vq the VirtQueue.
+ * @param[out] buf Pointer to location of available buffer;
+ * @param[out] len Length of the available buffer message.
+ *
+ * @return Returns a token used to identify the available buffer, to be
+ * passed back into VirtQueue_addUsedBuf();
+ * token is negative if failure to find an available buffer.
+ *
+ * @sa VirtQueue_addUsedBuf
+ */
+Int16 VirtQueue_getAvailBuf(VirtQueue_Handle vq, Void **buf, Int *len);
+
+/*!
+ * @brief Add used buffer to virtqueue's used buffer list.
+ * Only used by Slave.
+ *
+ * @param[in] vq the VirtQueue.
+ * @param[in] token token of the buffer to be added to vring used list.
+ * @param[in] len length of the message being added.
+ *
+ * @return Remaining capacity of queue or a negative error.
+ *
+ * @sa VirtQueue_getAvailBuf
+ */
+Int VirtQueue_addUsedBuf(VirtQueue_Handle vq, Int16 token, Int len);
+
+/*!
+ * @brief Post crash message to host mailbox
+ */
+Void VirtQueue_postCrashToMailbox(Void);
+
+#if defined (__cplusplus)
+}
+#endif /* defined (__cplusplus) */
+
+#endif /* ti_ipc_family_am6x_VirtQueue__include */
diff --git a/packages/ti/ipc/family/am65xx/VirtQueue.xdc b/packages/ti/ipc/family/am65xx/VirtQueue.xdc
--- /dev/null
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * ======== VirtQueue.xdc ========
+ */
+package ti.ipc.family.am65xx;
+
+/*!
+ * ======== VirtQueue ========
+ */
+@Template("./VirtQueue.xdt")
+
+metaonly module VirtQueue
+{
+}
diff --git a/packages/ti/ipc/family/am65xx/VirtQueue.xdt b/packages/ti/ipc/family/am65xx/VirtQueue.xdt
--- /dev/null
@@ -0,0 +1,45 @@
+%%{
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+var pkg = this.$package.$name.replace(/\./g, "_");
+
+%%}
+extern Void `pkg`_VirtQueue_cacheWb();
+
+/*
+ * ======== VirtQueue_cacheWb ========
+ */
+Void VirtQueue_cacheWb()
+{
+ `pkg`_VirtQueue_cacheWb();
+}
diff --git a/packages/ti/ipc/family/am65xx/VirtQueue.xs b/packages/ti/ipc/family/am65xx/VirtQueue.xs
--- /dev/null
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== VirtQueue.xs ========
+ */
+
+/*
+ * ======== module$use ========
+ * Use other modules required by this module
+ */
+function module$use()
+{
+ xdc.useModule('ti.ipc.remoteproc.Resource');
+ xdc.loadPackage('ti.pm');
+ xdc.useModule('ti.sdo.utils.MultiProc');
+
+ xdc.useModule('ti.sysbios.hal.Cache');
+ xdc.useModule('ti.sysbios.hal.Hwi');
+ xdc.useModule('ti.sysbios.gates.GateHwi');
+ xdc.useModule('ti.sysbios.knl.Clock');
+
+ xdc.useModule('xdc.runtime.Assert');
+ xdc.useModule('xdc.runtime.Error');
+ xdc.useModule('xdc.runtime.Diags');
+ xdc.useModule('xdc.runtime.Log');
+ xdc.useModule('xdc.runtime.Memory');
+ xdc.useModule('xdc.runtime.Registry');
+ xdc.useModule('xdc.runtime.System');
+
+ /* bring in target specific modules */
+ var Program = xdc.useModule('xdc.cfg.Program');
+ var targIsaChain = "/" + Program.build.target.getISAChain().join("/") + "/";
+
+ if (targIsaChain.match("/v7R/")) {
+ xdc.useModule('ti.sdo.ipc.family.am65xx.InterruptR5f');
+ }
+}
diff --git a/packages/ti/ipc/family/am65xx/package.bld b/packages/ti/ipc/family/am65xx/package.bld
--- /dev/null
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== package.bld ========
+ */
+var Build = xdc.useModule('xdc.bld.BuildEnvironment');
+var Pkg = xdc.useModule('xdc.bld.PackageContents');
+var IpcBuild = xdc.loadCapsule("ti/sdo/ipc/Build.xs");
+
+var objList = [ "VirtQueue.c" ];
+
+var trgFilter = {
+ field: "isa",
+ list: [ "v7R" ]
+};
+
+/* if not building a product release, build package libraries */
+if (Bld_goal != "release") {
+ IpcBuild.buildLibs(objList, undefined, trgFilter, arguments);
+ IpcBuild.buildLibs(objList, undefined, trgFilter, ["profile=smp"]);
+}
+
+Pkg.otherFiles = [
+ "package.bld",
+ "InterruptProxy.h",
+ "VirtQueue.h"
+].concat(objList);
+
+/* include source files in the release package */
+Pkg.attrs.exportSrc = true;
+Pkg.attrs.exportCfg = true;
+
+Pkg.generatedFiles.$add("lib/");
diff --git a/packages/ti/ipc/family/am65xx/package.xdc b/packages/ti/ipc/family/am65xx/package.xdc
--- /dev/null
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2017 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== package.xdc ========
+ */
+
+/*!
+ * ======== ti.ipc.family.am65xx ========
+ */
+package ti.ipc.family.am65xx[1,0,0] {
+ module VirtQueue;
+}
diff --git a/packages/ti/ipc/family/am65xx/package.xs b/packages/ti/ipc/family/am65xx/package.xs
--- /dev/null
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== package.xs ========
+ */
+var Build = null;
+
+/*
+ * ======== close ========
+ */
+function close()
+{
+ if (xdc.om.$name != 'cfg') {
+ return;
+ }
+
+ Build = xdc.useModule('ti.sdo.ipc.Build');
+}
+
+/*
+ * ======== Package.getLibs ========
+ * This function is called when a program's configuration files are
+ * being generated and it returns the name of a library appropriate
+ * for the program's configuration.
+ */
+function getLibs(prog)
+{
+ var BIOS = xdc.module('ti.sysbios.BIOS');
+ var libPath;
+ var suffix;
+
+ if (Build.libType == Build.LibType_PkgLib) {
+ /* lib path defined in Build.buildLibs() */
+ libPath = (BIOS.smpEnabled ? "lib/smpipc/debug" : "lib/ipc/debug");
+
+ /* find a compatible suffix */
+ if ("findSuffix" in prog.build.target) {
+ suffix = prog.build.target.findSuffix(this);
+ }
+ else {
+ suffix = prog.build.target.suffix;
+ }
+ return (libPath + "/" + this.$name + ".a" + suffix);
+ }
+ else {
+ return (Build.getLibs(this));
+ }
+}
+
+/*
+ * ======== validate ========
+ */
+function validate()
+{
+ if (xdc.om.$name == "cfg") {
+ if (Program.build.target.isa.match(/v7R/)) {
+ /* On AM65XX, VirtQueue only supports SMP BIOS */
+ var BIOS = xdc.module('ti.sysbios.BIOS');
+ }
+ }
+}
index 3a71dd90fa0ba966bb2ab2a26d774c7538852589..f6fa8cf4ef28534de6629f6b0579fd135d7dc47f 100644 (file)
%%{
/*
- * Copyright (c) 2011-2014, Texas Instruments Incorporated
+ * Copyright (c) 2011-2018, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
% "resource table (" + prog.cpu.attrs.cpuCore + ")");
% }
% }
+% else if (prog.cpu.deviceName.match(/AM65X/)) {
+% /* TODO: Need to add AM65XX Device */
+% if (prog.cpu.attrs.cpuCore.match(/R5/)) {
+% //print("ti.ipc.remoteproc.Resource.xdt : AM65XX_R5");
+% }
+#include <ti/ipc/remoteproc/rsc_table_am65xx_r5f.h>
+% }
% else {
% print("ti.ipc.remoteproc.Resource.xdt - unable to provide resource table " +
% "(" + prog.cpu.deviceName + ", " + prog.cpu.attrs.cpuCore + ")");
index 4a61bd647e71ee09afc99af258f280cb3266f419..bdb71d75ef860d000b56f956d1040ceca9c2becf 100644 (file)
/*
- * Copyright (c) 2011-2015 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2011-2018 Texas Instruments Incorporated - http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
var trgFilter = {
field: "isa",
- list: [ "64T", "66", "66e", "674", "v7M", "v7M4" ]
+ list: [ "64T", "66", "66e", "674", "v7M", "v7M4", "v7R" ]
};
/* if not building a product release, build package libraries */
"rsc_table_omap5_dsp.h",
"rsc_table_omap5_ipu.h",
"rsc_table_vayu_dsp.h",
- "rsc_table_vayu_ipu.h"
+ "rsc_table_vayu_ipu.h",
+ "rsc_table_am65xx_r5f.h"
].concat(objList);
/* include source files in the release package */
diff --git a/packages/ti/ipc/remoteproc/rsc_table_am65xx_r5f.h b/packages/ti/ipc/remoteproc/rsc_table_am65xx_r5f.h
--- /dev/null
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2017-2018, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== rsc_table_am65xx_r5f.h ========
+ *
+ * Define the resource table entries for all R5F cores. This will be
+ * incorporated into corresponding base images, and used by the remoteproc
+ * on the host-side to allocated/reserve resources.
+ *
+ */
+
+#ifndef _RSC_TABLE_AM65XX_R5F_H_
+#define _RSC_TABLE_AM65XX_R5F_H_
+
+#include "rsc_types.h"
+
+#define R5F_MEM_TEXT 0x9C200000
+#define R5F_MEM_DATA 0x9C300000
+
+#define R5F_MEM_IPC_DATA 0x9C100000
+#define R5F_MEM_IPC_VRING 0x9C000000
+#define R5F_MEM_RPMSG_VRING0 0x9C000000
+#define R5F_MEM_RPMSG_VRING1 0x9C010000
+#define R5F_MEM_VRING_BUFS0 0x9C040000
+#define R5F_MEM_VRING_BUFS1 0x9C080000
+
+#define R5F_MEM_IPC_VRING_SIZE SZ_1M
+#define R5F_MEM_IPC_DATA_SIZE (SZ_1M)
+
+#define R5F_MEM_TEXT_SIZE (SZ_1M)
+
+#define R5F_MEM_DATA_SIZE (SZ_1M)
+
+#define R5F_NUM_ENTRIES 6
+
+/*
+ * Assign fixed RAM addresses to facilitate a fixed MMU table.
+ * PHYS_MEM_IPC_VRING & PHYS_MEM_IPC_DATA MUST be together.
+ */
+/* See CMA BASE addresses in Linux side: arch/arm/mach-omap2/remoteproc.c */
+#define PHYS_MEM_IPC_VRING 0x9C000000
+
+/*
+ * Sizes of the virtqueues (expressed in number of buffers supported,
+ * and must be power of 2)
+ */
+#define R5F_RPMSG_VQ0_SIZE 256
+#define R5F_RPMSG_VQ1_SIZE 256
+
+/* flip up bits whose indices represent features we support */
+#define RPMSG_R5F_C0_FEATURES 1
+
+struct my_resource_table {
+ struct resource_table base;
+
+ UInt32 offset[R5F_NUM_ENTRIES]; /* Should match 'num' in actual definition */
+
+ /* rpmsg vdev entry */
+ struct fw_rsc_vdev rpmsg_vdev;
+ struct fw_rsc_vdev_vring rpmsg_vring0;
+ struct fw_rsc_vdev_vring rpmsg_vring1;
+
+ /* ipcdata carveout entry */
+ struct fw_rsc_carveout ipcdata_cout;
+
+ /* text carveout entry */
+ struct fw_rsc_carveout text_cout;
+
+ /* data carveout entry */
+ struct fw_rsc_carveout data_cout;
+
+ /* trace entry */
+ struct fw_rsc_trace trace;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem0;
+};
+
+#define TRACEBUFADDR (UInt32)&ti_trace_SysMin_Module_State_0_outbuf__A
+
+#pragma DATA_SECTION(ti_ipc_remoteproc_ResourceTable, ".resource_table")
+#pragma DATA_ALIGN(ti_ipc_remoteproc_ResourceTable, 4096)
+
+const struct my_resource_table ti_ipc_remoteproc_ResourceTable = {
+ 1, /* we're the first version that implements this */
+ R5F_NUM_ENTRIES, /* number of entries in the table */
+ 0, 0, /* reserved, must be zero */
+ /* offsets to entries */
+ {
+ offsetof(struct my_resource_table, rpmsg_vdev),
+ offsetof(struct my_resource_table, ipcdata_cout),
+ offsetof(struct my_resource_table, text_cout),
+ offsetof(struct my_resource_table, data_cout),
+ offsetof(struct my_resource_table, trace),
+ offsetof(struct my_resource_table, devmem0),
+ },
+
+ /* rpmsg vdev entry */
+ {
+ TYPE_VDEV, VIRTIO_ID_RPMSG, 0,
+ RPMSG_R5F_C0_FEATURES, 0, 0, 0, 2, { 0, 0 },
+ /* no config data */
+ },
+ /* the two vrings */
+ { R5F_MEM_RPMSG_VRING0, 4096, R5F_RPMSG_VQ0_SIZE, 1, 0 },
+ { R5F_MEM_RPMSG_VRING1, 4096, R5F_RPMSG_VQ1_SIZE, 2, 0 },
+
+ {
+ TYPE_CARVEOUT,
+ R5F_MEM_IPC_DATA, 0,
+ R5F_MEM_IPC_DATA_SIZE, 0, 0, "R5F_MEM_IPC_DATA",
+ },
+
+ {
+ TYPE_CARVEOUT,
+ R5F_MEM_TEXT, 0,
+ R5F_MEM_TEXT_SIZE, 0, 0, "R5F_MEM_TEXT",
+ },
+
+ {
+ TYPE_CARVEOUT,
+ R5F_MEM_DATA, 0,
+ R5F_MEM_DATA_SIZE, 0, 0, "R5F_MEM_DATA",
+ },
+
+ {
+ TYPE_TRACE, TRACEBUFADDR, 0x8000, 0, "trace:r5f0",
+ },
+
+ {
+ TYPE_DEVMEM,
+ R5F_MEM_IPC_VRING, PHYS_MEM_IPC_VRING,
+ R5F_MEM_IPC_VRING_SIZE, 0, 0, "R5F_MEM_IPC_VRING",
+ },
+
+};
+
+#endif /* _RSC_TABLE_AM65XX_R5F_H_ */
index b444ca45f9407201c0157c5bb90690609c05a57c..76fcdcd1deece579a4e4c37fe53352dad3a7291c 100644 (file)
/*
- * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2015-2018 Texas Instruments Incorporated - http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
break;
}
}
+ else if (target.isa.match(/^v7R$/)) {
+ switch (device) {
+ case "AM65X":
+ defs += " -DAM65XX -DRPMSG_NS_2_0";
+ break;
+ default:
+ throw new Error("Unsupported device: " + device);
+ break;
+ }
+ }
return (defs);
}
index 75d84dbe7521e697f344b167117395069aa823d7..2cc4250f20810ac51ca6f162ce67575ff6a822b9 100644 (file)
/*
- * Copyright (c) 2011-2015 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2011-2018 Texas Instruments Incorporated - http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
#include <ti/ipc/family/omap54xx/VirtQueue.h>
#elif defined(VAYU)
#include <ti/ipc/family/vayu/VirtQueue.h>
+#elif defined(AM65XX)
+#include <ti/ipc/family/am65xx/VirtQueue.h>
#else
#error unknown processor!
#endif
index db280ed6e21c9f95444d83cea60ec16694689b77..528104475aad9834201ea9cd843807f76667c1b0 100644 (file)
/*
- * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2015-2018 Texas Instruments Incorporated - http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
xdc.useModule('ti.ipc.family.vayu.VirtQueue');
break;
+ case "AM65X": /* AM65XX */
+ xdc.useModule('ti.ipc.family.am65xx.VirtQueue');
+ break;
+
default:
throw new Error("Unspported device: " + device);
break;
index 6ee819d187af0d6d69bc192d4a28eb13f664fb40..e877bd99e08136751e6bdf67b5ceb272dd8cda83 100644 (file)
/*
- * Copyright (c) 2011-2015 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2011-2018 Texas Instruments Incorporated - http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
defs: "-DOMAP5 -DDSP -DRPMSG_NS_2_0"
}).addObjects(objList);
}
+ else if (targ.isa == "v7R") {
+ Pkg.addLibrary("lib/" + profile + "/" + name + "_am65xx", targ, {
+ profile: profile,
+ copts: myCopts,
+ defs: "-DAM65XX -DRPMSG_NS_2_0",
+ }).addObjects(objList);
+ }
else {
/* target not suppoted */
continue;
index a109f3589840c342b329728702e59fa76713e4ef..2c45e4fffcae77f128dd4841a1c2d960a63523b6 100644 (file)
/*
- * Copyright (c) 2011-2015 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2011-2018 Texas Instruments Incorporated - http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
platform = "vayu";
break;
+ case "AM65XX":
+ platform = "am65xx";
+ break;
+
default:
throw ("Unspported device: " + device);
break;
diff --git a/packages/ti/ipc/tests/R5FLink.cmd b/packages/ti/ipc/tests/R5FLink.cmd
--- /dev/null
@@ -0,0 +1,69 @@
+/*----------------------------------------------------------------------------*/
+/* R5FLink.cmd */
+/* */
+/* (c) Texas Instruments 2017-2018, All rights reserved. */
+/* */
+
+/* USER CODE BEGIN (0) */
+/* USER CODE END */
+
+/*----------------------------------------------------------------------------*/
+/* Linker Settings */
+--retain="*(.intvecs)"
+--retain="*(.intvecsNew)"
+
+/*----------------------------------------------------------------------------*/
+/* Memory Map */
+
+/* Memory Map for AM65X platform
+ *
+ * --- External Memory ---
+ * Virtual Physical Size Comment
+ * ------------------------------------------------------------------------
+ * 9C20_0000 ???0_0000 10_0000 ( 1 MB) EXT_CODE
+ * 9C30_0000 ???0_0000 10_0000 ( 2 MB) EXT_DATA
+ * 9C40_0000 ???0_0000 30_0000 ( 3 MB) EXT_HEAP
+ * 9C10_0000 ???0_0000 6_0000 ( 384 kB) TRACE_BUF
+ * 9C16_0000 ???6_0000 1_0000 ( 64 kB) EXC_DATA
+ * 9C17_0000 ???7_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
+ */
+
+#define EXT_CODE_BASE 0x9C200000
+#define EXT_DATA_BASE 0x9C300000
+#define RAM0_ADDR 0x41C00000
+#define ATCM_START 0x00000000
+
+-e __VECS_ENTRY_POINT
+
+MEMORY{
+ ATCM (RWX) : origin=ATCM_START, length=0x00008000
+ BTCM (RWX) : origin=0x41010000, length=0x00008000
+ RAM0 (RW) : origin=RAM0_ADDR length=0x00080000
+ EXT_CODE (RWX) : origin=EXT_CODE_BASE length=0x00100000
+ EXT_DATA (RW) : origin=EXT_DATA_BASE length=0x00100000
+ EXT_HEAP (RW) : origin=0x9C400000 length=0x00300000
+ TRACE_BUF (RW) : origin=0x9C100000 length=0x00060000
+ EXC_DATA (RW) : origin=0x9C160000 length=0x00010000
+ PM_DATA (RW) : origin=0x9C170000 length=0x00020000
+}
+
+/*----------------------------------------------------------------------------*/
+/* Section Configuration */
+SECTIONS{
+ .vecs : {
+ __VECS_ENTRY_POINT = .;
+ } > ATCM_START
+
+ .init_text : {
+ boot.*(.text)
+ *(.text:ti_sysbios_family_arm_MPU_*)
+ *(.text:ti_sysbios_family_arm_v7r_Cache_*)
+ *(.text:xdc_runtime_Startup_reset*)
+ } > ATCM
+ .resource_table : {
+ __RESOURCE_TABLE = .;
+ } > EXT_DATA_BASE
+
+ .tracebuf : {} > TRACE_BUF
+}
+/*----------------------------------------------------------------------------*/
diff --git a/packages/ti/ipc/tests/R5fmpu_am65xx.cfg b/packages/ti/ipc/tests/R5fmpu_am65xx.cfg
--- /dev/null
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+var MPU = xdc.useModule('ti.sysbios.family.arm.MPU');
+MPU.enableMPU = true;
+MPU.enableBackgroundRegion = true;
+
+var attrs = new MPU.RegionAttrs();
+MPU.initRegionAttrsMeta(attrs);
+
+/* This entry covers the whole 32 bit memory range
+ Address: 0x00000000-0xffffffff */
+attrs.enable = true;
+/* The following 4 lines set the memory to be
+ Strongly Ordered & Shareable */
+attrs.tex = 0;
+attrs.cacheable = false;
+attrs.bufferable = false;
+attrs.shareable = true;
+/*--------------------------------------------------------------*/
+attrs.noExecute = true;
+//attrs.accPerm = 1; /* RW at PL1 */
+attrs.accPerm = 0x3; /* RW at PL1 & 2 */
+attrs.subregionDisableMask = 0;
+MPU.setRegionMeta(0, 0x00000000, MPU.RegionSize_4G, attrs);
+
+/* This entry covers the ATCM mapped to 0 */
+attrs.enable = true
+/* The following 4 lines set the memory to be
+ Outer and Inner write-back, write-allocate & Shareable */
+attrs.tex = 1;
+attrs.cacheable = true;
+attrs.bufferable = true;
+attrs.shareable = false;
+/*--------------------------------------------------------------*/
+attrs.noExecute = false;
+//attrs.accPerm = 1; /* RW at PL1 */
+attrs.accPerm = 0x3; /* RW at PL1 & 2 */
+attrs.subregionDisableMask = 0;
+MPU.setRegionMeta(1, 0x00000000, MPU.RegionSize_32K, attrs);
+
+/* This entry covers ATCM if mapped to 0x41000000 */
+attrs.enable = true;
+/* The following 4 lines set the memory to be
+ Outer and Inner write-back, write-allocate & not shareable */
+attrs.tex = 1;
+attrs.cacheable = true;
+attrs.bufferable = true;
+attrs.shareable = false;
+/*--------------------------------------------------------------*/
+attrs.noExecute = false;
+//attrs.accPerm = 1; /* RW at PL1 */
+attrs.accPerm = 0x3; /* RW at PL1 & 2 */
+attrs.subregionDisableMask = 0;
+MPU.setRegionMeta(2, 0x41000000, MPU.RegionSize_32K, attrs);
+
+/* This entry covers BTCM if mapped to 0x41010000 */
+attrs.enable = true;
+/* The following 4 lines set the memory to be
+ Outer and Inner write-back, write-allocate & not shareable */
+attrs.tex = 1;
+attrs.cacheable = true;
+attrs.bufferable = true;
+attrs.shareable = false;
+/*--------------------------------------------------------------*/
+attrs.noExecute = false;
+//attrs.accPerm = 1; /* RW at PL1 */
+attrs.accPerm = 0x3; /* RW at PL1 & 2 */
+attrs.subregionDisableMask = 0x0;
+MPU.setRegionMeta(3, 0x41010000, MPU.RegionSize_32K, attrs);
+
+/* This entry covers RAM0 */
+attrs.enable = true;
+/* The following 4 lines set the memory to be
+ Outer and Inner write-back, write-allocate & not shareable */
+attrs.tex = 1;
+attrs.cacheable = true;
+attrs.bufferable = true;
+attrs.shareable = false;
+/*--------------------------------------------------------------*/
+attrs.noExecute = false;
+//attrs.accPerm = 1; /* RW at PL1 */
+attrs.accPerm = 0x3; /* RW at PL1 & 2 */
+attrs.subregionDisableMask = 0;
+MPU.setRegionMeta(4, 0x41C00000, MPU.RegionSize_512K, attrs);
+
+/* This entry covers MSMC SRAM */
+attrs.enable = true;
+/* The following 4 lines set the memory to be
+ Outer and Inner write-back, write-allocate & not shareable */
+attrs.tex = 1;
+attrs.cacheable = true;
+attrs.bufferable = true;
+attrs.shareable = false; /* NOTE: Setting it true will make it non-cacheable */
+/*--------------------------------------------------------------*/
+attrs.noExecute = true;
+//attrs.accPerm = 1; /* RW at PL1 */
+attrs.accPerm = 0x3; /* RW at PL1 & 2 */
+attrs.subregionDisableMask = 0;
+MPU.setRegionMeta(5, 0x70000000, MPU.RegionSize_512K, attrs);
+
+/* This entry covers DDR memory */
+attrs.enable = true;
+/* The following 4 lines set the memory to be
+ Outer and Inner write-back, write-allocate & shareable */
+attrs.bufferable = true;
+attrs.cacheable = true;
+attrs.shareable = true; /* NOTE: Setting it true will make it non-cacheable */
+attrs.tex = 1;
+
+/*--------------------------------------------------------------*/
+attrs.noExecute = false;
+//attrs.accPerm = 1; /* RW at PL1 */
+attrs.accPerm = 0x3; /* RW at PL1 & 2 */
+attrs.tex = 1;
+attrs.subregionDisableMask = 0;
+MPU.setRegionMeta(6, 0x9C000000, MPU.RegionSize_8M, attrs);
diff --git a/packages/ti/ipc/tests/messageq_common.cfg.xs b/packages/ti/ipc/tests/messageq_common.cfg.xs
index f923e1a7a9f69dd5bcfd60664823e56058cf3311..dea080b979f17309d9782f948fda7c3273acfdbe 100644 (file)
/*
- * Copyright (c) 2012-2015 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2012-2018 Texas Instruments Incorporated - http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
Diags.ALWAYS_ON);
*/
}
+else if (Program.platformName.match(/^ti\.platforms\.cortexR:AM65X/) &&
+ Program.cpu.attrs.cpuCore.match(/^R5$/)) {
+
+ print("messageq_common.cfg.xs cpuCore:" + Program.cpu.attrs.cpuCore);
+ var VirtQueue = xdc.useModule('ti.ipc.family.am65xx.VirtQueue');
+/* TODO: Need to check on setting the right size */
+// SysMin.bufSize = 0x8000;
+// Memory.defaultHeapSize = 0x20000;
+
+ /* Enable Memory Translation module that operates on the Resource Table */
+ var Resource = xdc.useModule('ti.ipc.remoteproc.Resource');
+ Resource.loadSymbol = "__RESOURCE_TABLE";
+
+ var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
+ MultiProc.setConfig("R5F-0", ["HOST", "R5F-0", "R5F-1"]);
+
+ xdc.loadPackage('ti.sdo.ipc.family.am65xx');
+ xdc.useModule('ti.sdo.ipc.family.am65xx.InterruptR5f');
+ xdc.loadPackage('ti.ipc.rpmsg');
+ xdc.loadPackage('ti.ipc.family.am65xx');
+
+ var List = xdc.useModule('ti.sdo.utils.List');
+
+ xdc.useModule('ti.sysbios.xdcruntime.GateThreadSupport');
+ var GateSwi = xdc.useModule('ti.sysbios.gates.GateSwi');
+ xdc.loadCapsule("R5fmpu_am65xx.cfg");
+
+ var Hwi = xdc.useModule('ti.sysbios.family.arm.v7r.keystone3.Hwi');
+/* TODO: Need to check on equivalent for K3 */
+// Hwi.enableException = true;
+
+ var Core = xdc.useModule('ti.sysbios.family.arm.v7r.keystone3.Core');
+
+ var Timer = xdc.module('ti.sysbios.timers.dmtimer.Timer');
+ Timer.checkFrequency = false; /* Disable frequency check */
+ for (var i = 0; i < 4; i++) {
+ Timer.intFreqs[i].lo = 20000000; /* Set a high Timer frequency value
+ as default may be too small and
+ cause frquenct interrupts. */
+ Timer.intFreqs[i].hi = 0;
+ }
+
+}
else {
- throw("messageq_common.cfg.xs: Did not match any platform!");
+ throw("messageq_common.cfg.xs: Did not match any platform!"
+ + " platform:" + Program.platformName + " cpuCore:"
+ + Program.cpu.attrs.cpuCore + " deviceName:"
+ + Program.cpu.deviceName);
}
-Hwi.enableException = true;
-
xdc.useModule('ti.ipc.ipcmgr.IpcMgr');
BIOS.addUserStartupFunction('&IpcMgr_ipcStartup');
index 6b2a9decc53465685cb57ce45a305d2df5d8c3d6..15039154045fce95ef66545c3081619ad71ce2a8 100644 (file)
/*
- * Copyright (c) 2012-2017, Texas Instruments Incorporated
+ * Copyright (c) 2012-2018, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
stackMemory: "EXT_DATA",
};
+/* Note the EXT_CODE and EXT_DATA sections are specified in the
+ Linker command file
+ */
+Build.platformTable["ti.platforms.cortexR:AM65X"] = {
+
+ codeMemory : "EXT_CODE",
+ dataMemory : "EXT_DATA",
+ stackMemory: "EXT_DATA",
+};
+
/*
* Create Keystone platform instances without any external memory.
* The main reason for this is to prevent SYS/BIOS from tagging
/* currently only build for OMAPL138, Keystone II, OMAP5, and Vayu*/
if (!((targ.isa == "674") || (targ.isa == "66") ||
- (targ.isa.match(/v7M(|4)/)) || (targ.isa == "64T"))) {
+ (targ.isa.match(/v7M(|4)/)) || (targ.isa == "64T") || (targ.isa == "v7R"))) {
continue;
}
for (var j = 0; j < targ.platforms.length; j++) {
var platform = targ.platforms[j];
- /* currently only build for OMAPL138, Keystone II, OMAP5, and Vayu*/
+ /* currently only build for OMAPL138, Keystone II, OMAP5, Vayu, AM6x*/
if (!((platform.match(/^ti\.platforms\.evm6614\:DSP/)) ||
(platform.match(/^ti\.platforms\.simKepler/)) ||
(platform.match(/^ti.platforms.evmC66AK2E/)) ||
(platform.match(/^ti\.platform\.omap54xx/)) ||
(platform.match(/^ti\.platforms\.sdp5430/)) ||
(platform.match(/^ti\.platform\.vayu/)) ||
+ (platform.match(/^ti\.platforms\.cortexR\:AM65X/)) ||
(platform.match(/^ti\.platforms\.evmDRA7XX/)) ||
(platform.match(/\.platforms\.evmOMAPL138/)))) {
continue;
extraDefs = " -DRPMSG_NS_2_0";
}
- /* All Keystone platforms with 4.1/4.4 kernels also require RPMSG_NS_2_0 */
+ /* All Keystone platforms with 4.1/4.4/4.9 kernels also require RPMSG_NS_2_0 */
if (platform.match(/^ti.platforms.evmC66AK2E/) ||
platform.match(/^ti.platforms.evmTCI66AK2G02/) ||
platform.match(/^ti.platforms.evmTCI6630K2L/) ||
extraDefs = " -DRPMSG_NS_2_0";
}
+ /* AM65XX require MmRpc and therefore use RPMSG_NS_2_0 */
+ if (platform.match(/^ti\.platforms\.cortexR\:AM65X/)) {
+ extraDefs = " -DRPMSG_NS_2_0";
+ }
+
/* messageq_fault */
if (platform.match(/^ti\.platform\.vayu\.dsp1/) ||
platform.match(/^ti\.platforms\.evmDRA7XX:dsp1$/)) {
cfgScript: "gatempapp",
defs: "-D DSP_1" + extraDefs
}).addObjects(["messageq_fault.c"]);
- } else {
+ } else if (platform.match(/^ti\.platforms\.cortexR\:AM65X/) &&
+ (targ.isa == "v7R")) {
+ Pkg.addExecutable(name + "/messageq_fault", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: extraDefs,
+ lopts: "-l R5FLink.cmd",
+ }).addObjects(["messageq_fault.c"]);
+ } else {
Pkg.addExecutable(name + "/messageq_fault", targ, platform, {
cfgScript: "rpmsg_transport",
- defs: extraDefs
+ defs: extraDefs,
}).addObjects(["messageq_fault.c"]);
}
/* ping_rpmsg */
- Pkg.addExecutable(name + "/ping_rpmsg", targ, platform, {
- cfgScript: "ping_rpmsg",
- defs: extraDefs
- }).addObjects(["ping_rpmsg.c"]);
+ if (platform.match(/^ti\.platforms\.cortexR\:AM65X/) &&
+ (targ.isa == "v7R")) {
+ Pkg.addExecutable(name + "/ping_rpmsg", targ, platform, {
+ cfgScript: "ping_rpmsg",
+ defs: extraDefs,
+ lopts: "-l R5FLink.cmd",
+ }).addObjects(["ping_rpmsg.c"]);
+ } else {
+ Pkg.addExecutable(name + "/ping_rpmsg", targ, platform, {
+ cfgScript: "ping_rpmsg",
+ defs: extraDefs,
+ }).addObjects(["ping_rpmsg.c"]);
+ }
/* ping_tasks */
- Pkg.addExecutable(name + "/ping_tasks", targ, platform, {
- cfgScript: "ping_rpmsg",
- defs: extraDefs
- }).addObjects(["ping_tasks.c", "ping_tasks_main.c"]);
+ if (platform.match(/^ti\.platforms\.cortexR\:AM65X/) &&
+ (targ.isa == "v7R")) {
+ Pkg.addExecutable(name + "/ping_tasks", targ, platform, {
+ cfgScript: "ping_rpmsg",
+ defs: extraDefs,
+ lopts: "-l R5FLink.cmd",
+ }).addObjects(["ping_tasks.c", "ping_tasks_main.c"]);
+ } else {
+ Pkg.addExecutable(name + "/ping_tasks", targ, platform, {
+ cfgScript: "ping_rpmsg",
+ defs: extraDefs,
+ }).addObjects(["ping_tasks.c", "ping_tasks_main.c"]);
+ }
/* gatempapp */
if (platform.match(/^ti\.platform\.vayu\.dsp1/) ||
}
/* messageq_multi */
- Pkg.addExecutable(name + "/messageq_multi", targ, platform, {
- cfgScript: "rpmsg_transport",
- defs: "-D BENCHMARK" + extraDefs
- }).addObjects(["messageq_multi.c"]);
+ if (platform.match(/^ti\.platforms\.cortexR\:AM65X/) &&
+ (targ.isa == "v7R")) {
+ Pkg.addExecutable(name + "/messageq_multi", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK" + extraDefs,
+ lopts: "-l R5FLink.cmd",
+ }).addObjects(["messageq_multi.c"]);
+ } else {
+ Pkg.addExecutable(name + "/messageq_multi", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK" + extraDefs
+ }).addObjects(["messageq_multi.c"]);
+ }
/* messageq_multimulti */
- Pkg.addExecutable(name + "/messageq_multimulti", targ, platform, {
- cfgScript: "rpmsg_transport",
- defs: "-D BENCHMARK" + extraDefs
- }).addObjects(["messageq_multimulti.c"]);
+ if (platform.match(/^ti\.platforms\.cortexR\:AM65X/) &&
+ (targ.isa == "v7R")) {
+ Pkg.addExecutable(name + "/messageq_multimulti", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK" + extraDefs,
+ lopts: "-l R5FLink.cmd",
+ }).addObjects(["messageq_multimulti.c"]);
+ } else {
+ Pkg.addExecutable(name + "/messageq_multimulti", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK" + extraDefs
+ }).addObjects(["messageq_multimulti.c"]);
+ }
/* messageq_single */
if (platform.match(/^ti\.platforms\.sdp5430/) &&
- (targ.isa == "64T")) {
- Pkg.addExecutable(name + "/messageq_single", targ, platform, {
- cfgScript: "rpmsg_transport",
- defs: "-D BENCHMARK -D DSP" + extraDefs
- }).addObjects(["messageq_single.c"]);
- } else if (platform.match(/^ti\.platforms\.sdp5430/) &&
- (targ.isa == "M4")) {
- Pkg.addExecutable(name + "/messageq_single", targ, platform, {
- cfgScript: "rpmsg_transport",
- defs: "-D BENCHMARK -D IPU" + extraDefs
- }).addObjects(["messageq_single.c"]);
- } else {
- Pkg.addExecutable(name + "/messageq_single", targ, platform, {
- cfgScript: "rpmsg_transport",
- defs: "-D BENCHMARK " + extraDefs
- }).addObjects(["messageq_single.c"]);
- }
+ (targ.isa == "64T")) {
+ Pkg.addExecutable(name + "/messageq_single", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK -D DSP" + extraDefs,
+ }).addObjects(["messageq_single.c"]);
+ } else if (platform.match(/^ti\.platforms\.sdp5430/) &&
+ (targ.isa == "M4")) {
+ Pkg.addExecutable(name + "/messageq_single", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK -D IPU" + extraDefs
+ }).addObjects(["messageq_single.c"]);
+ } else if (platform.match(/^ti\.platforms\.cortexR\:AM65X/) &&
+ (targ.isa == "v7R")) {
+ Pkg.addExecutable(name + "/messageq_single", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK " + extraDefs,
+ lopts: "-l R5FLink.cmd",
+ }).addObjects(["messageq_single.c" ]);
+ } else {
+ Pkg.addExecutable(name + "/messageq_single", targ, platform, {
+ cfgScript: "rpmsg_transport",
+ defs: "-D BENCHMARK " + extraDefs
+ }).addObjects(["messageq_single.c"]);
+ }
/* TODO: NameServerApp.xe66 too big for K2E's 512 KB L2SRAM */
if (!platform.match(/^ti.platforms.evmC66AK2E/)) {
/* NameServerApp */
- Pkg.addExecutable(name + "/NameServerApp", targ, platform, {
- cfgScript: "nameserverapp",
- }).addObjects(["NameServerApp.c"]);
+ if (platform.match(/^ti\.platforms\.cortexR\:AM65X/) &&
+ (targ.isa == "v7R")) {
+ Pkg.addExecutable(name + "/NameServerApp", targ, platform, {
+ cfgScript: "nameserverapp",
+ lopts: "-l R5FLink.cmd",
+ }).addObjects(["NameServerApp.c"]);
+ } else {
+ Pkg.addExecutable(name + "/NameServerApp", targ, platform, {
+ cfgScript: "nameserverapp",
+ }).addObjects(["NameServerApp.c"]);
+ }
}
/* nano_test - demonstrates passing ptrs using CMEM */
diff --git a/packages/ti/ipc/tests/ping_rpmsg_common.cfg.xs b/packages/ti/ipc/tests/ping_rpmsg_common.cfg.xs
index 7cc8e60d40937f91a539c35c502494588e785eb1..29350e9ccbfa317461ae1bb66748e4f7edbeb1a7 100644 (file)
/*
- * Copyright (c) 2012-2015 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2012-2018 Texas Instruments Incorporated - http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
var BIOS = xdc.useModule('ti.sysbios.BIOS');
BIOS.heapSize = 0x10000;
-//BIOS.libType = BIOS.LibType_Custom;
+/* Reduces code size, by only pulling in modules explicitly referenced: */
+BIOS.libType = BIOS.LibType_Custom;
var Idle = xdc.useModule('ti.sysbios.knl.Idle');
Idle.addFunc('&VirtQueue_cacheWb');
Diags.ALWAYS_ON);
*/
}
-else {
- throw("ping_rpmsg_common.cfg: Did not match any platform!");
-}
+else if (Program.platformName.match(/^ti\.platforms\.cortexR:AM65X/) &&
+ Program.cpu.attrs.cpuCore.match(/^R5$/)) {
+
+/* TODO: Need check on bufSize & defaultHeapSize */
+// SysMin.bufSize = 0x8000;
+// Memory.defaultHeapSize = 0x20000;
+ var VirtQueue = xdc.useModule('ti.ipc.family.am65xx.VirtQueue');
+
+ /* Enable Memory Translation module that operates on the Resource Table */
+ var Resource = xdc.useModule('ti.ipc.remoteproc.Resource');
+
+ Resource.loadSymbol = "__RESOURCE_TABLE";
-Hwi.enableException = true;
+ var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
+ MultiProc.setConfig("R5F-0", ["HOST", "R5F-0", "R5F-1"]);
+
+ xdc.loadCapsule("R5fmpu_am65xx.cfg");
+
+ var Hwi = xdc.useModule('ti.sysbios.family.arm.v7r.keystone3.Hwi');
+/* TODO: Need to check on equivalent for K3 */
+/* Hwi.enableException = true; */
+
+ var SysMin = xdc.useModule('ti.trace.SysMin');
+ System.SupportProxy = SysMin;
+ SysMin.bufSize = 0x8000;
+
+ Program.sectMap[".tracebuf"] = "TRACE_BUF";
+}else {
+ throw("ping_rpmsg_common.cfg: Did not match any platform!"
+ + " platform:" + Program.platformName + "cpuCore:"
+ + Program.cpu.attrs.cpuCore );
+}
xdc.useModule('ti.ipc.ipcmgr.IpcMgr');
BIOS.addUserStartupFunction('&IpcMgr_rpmsgStartup');
index 257684dea309896b49c0b69e2cc82b65992bd2cd..f5120590da305e13f8539f9f24a79df631d199e0 100644 (file)
%%{
/*
- * Copyright (c) 2013, Texas Instruments Incorporated
+ * Copyright (c) 2013-2018, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
Program.build.target.name.match(/M4F/) ||
Program.build.target.name.match(/A15/) ||
Program.build.target.name.match(/A9/) ||
- Program.build.target.name.match(/A8/))) {
+ Program.build.target.name.match(/A8/) ||
+ Program.build.target.name.match(/A53F/))) {
tplt = xdc.loadTemplate(this.$package.packageBase +
"/makefile_gccArmLto.xdt");
index b6fd1b544937209f48b921518f165a97c8f2c323..d38ee1ab107dc97f4c3ef4f62e6b2cac22289489 100644 (file)
/*
- * Copyright (c) 2013-2015 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2013-2018 Texas Instruments Incorporated - http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
var customGnuArmA9Opts = " ";
var customGnuArmA8Opts = " ";
var customGnuArmA15Opts = " ";
+var customGnuArmA53Opts = " ";
var ccOptsList = {
"ti.targets.C64P" : custom6xOpts,
"ti.targets.arm.elf.M3" : customArmOpts,
"ti.targets.arm.elf.M4" : customArmOpts,
"ti.targets.arm.elf.M4F" : customArmOpts,
+ "ti.targets.arm.elf.R5F" : customArmOpts,
"gnu.targets.arm.M3" : customGnuArmM3Opts,
"gnu.targets.arm.M4" : customGnuArmM4Opts,
"gnu.targets.arm.M4F" : customGnuArmM4FOpts,
"gnu.targets.arm.A8F" : customGnuArmA8Opts,
"gnu.targets.arm.A9F" : customGnuArmA9Opts,
"gnu.targets.arm.A15F" : customGnuArmA15Opts,
+ "gnu.targets.arm.A53F" : customGnuArmA53Opts,
};
var ipcPackages = [
"ti.sdo.ipc.family.tci663x",
"ti.sdo.ipc.family.tda3xx",
"ti.sdo.ipc.family.vayu",
+ "ti.sdo.ipc.family.am65xx",
"ti.sdo.ipc.gates",
"ti.sdo.ipc.heaps",
"ti.sdo.ipc.notifyDrivers",
"ti.ipc.family.tci6614",
"ti.ipc.family.tci6638",
"ti.ipc.family.vayu",
+ "ti.ipc.family.am65xx",
"ti.ipc.namesrv",
"ti.ipc.remoteproc",
"ti.ipc.transports"
"ti.ipc.family.vayu" : {
cSources: [ "VirtQueue.c" ]
},
+ "ti.ipc.family.am65xx" : {
+ cSources: [ "VirtQueue.c" ]
+ },
"ti.ipc.rpmsg" : {
cSources: [ "NameMap.c", "RPMessage.c" ]
}
"ti/sdo/ipc/family/tda3xx/NotifyDriverMbx.c " +
"ti/sdo/ipc/family/tda3xx/NotifySetup.c ";
+var A53FSources = "ti/sdo/ipc/family/am65xx/InterruptHost.c " +
+ "ti/sdo/ipc/family/am65xx/NotifyDriverMbx.c " +
+ "ti/sdo/ipc/family/am65xx/NotifySetup.c " +
+ "ti/sdo/ipc/gates/GateHWSpinlock.c " +
+ "ti/sdo/ipc/gates/GateHWSem.c ";
+
+var R5FSources = "ti/sdo/ipc/gates/GateHWSpinlock.c " +
+ "ti/sdo/ipc/family/am65xx/InterruptR5f.c " +
+ "ti/sdo/ipc/family/am65xx/NotifyDriverMbx.c " +
+ "ti/sdo/ipc/family/am65xx/NotifySetup.c " +
+ "ti/ipc/family/am65xx/VirtQueue.c ";
+
var cList = {
"ti.targets.C64P" : commonSources + C647xSources +
C64PSources,
"ti.targets.arm.elf.M3" : commonSources + M3Sources,
"ti.targets.arm.elf.M4" : commonSources + M4Sources,
"ti.targets.arm.elf.M4F" : commonSources + M4Sources,
+ "ti.targets.arm.elf.R5F" : commonSources + R5FSources,
"gnu.targets.arm.A15F" : commonSources + A15gSources,
"gnu.targets.arm.A8F" : commonSources + A8gSources,
"gnu.targets.arm.M3" : commonSources + M3Sources,
"gnu.targets.arm.M4" : commonSources + M4Sources,
"gnu.targets.arm.M4F" : commonSources + M4Sources,
+ "gnu.targets.arm.A53F" : commonSources + A53FSources,
};
var asmListNone = [
"ti.targets.arm.elf.M3" : asmListNone,
"ti.targets.arm.elf.M4" : asmListNone,
"ti.targets.arm.elf.M4F" : asmListNone,
+ "ti.targets.arm.elf.R5F" : asmListNone,
"gnu.targets.arm.M3" : asmListNone,
"gnu.targets.arm.M4" : asmListNone,
"gnu.targets.arm.A8F" : asmListNone,
"gnu.targets.arm.A9F" : asmListNone,
"gnu.targets.arm.A15F" : asmListNone,
+ "gnu.targets.arm.A53F" : asmListNone,
};
function getDefaultCustomCCOpts()
index b7c1f344cbc22ea2e1c7df991d264be0d2731d14..44883c2e96f53f44da157c87db2760b475277eca 100644 (file)
/*
- * Copyright (c) 2013-2015 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (c) 2013-2018 Texas Instruments Incorporated - http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
'TMS320C66AK2E05' : ['C66AK2E05'],
'TMS320TCI6630K2L' : ['TCI6630K2L'],
'LM3.*' : ['LM4.*'],
- 'Vayu' : ['DRA7XX']
+ 'Vayu' : ['DRA7XX'],
}
/*
'Vayu' : ["DSP1", "DSP2", "EVE1", "EVE2", "EVE3", "EVE4",
"IPU1", "IPU2", "IPU1-0", "IPU1-1", "IPU2-0",
"IPU2-1", "HOST"],
- 'TDA3X' : ["DSP1", "DSP2", "IPU1", "IPU1-0", "IPU1-1", "EVE1"]
+ 'TDA3X' : ["DSP1", "DSP2", "IPU1", "IPU1-0", "IPU1-1", "EVE1"],
+ 'AM65X' : ["HOST", "R5F-0", "R5F-1"]
};
setDeviceAliases(procNames, deviceAliases);
'TMS320DA830' : 1,
'OMAPL138' : 1,
'Vayu' : 1,
- 'TDA3X' : 1
+ 'TDA3X' : 1,
+ 'AM65X' : 1
};
setDeviceAliases(hostNeedsSlaveData, deviceAliases);
'TMS320TCI6636' : ["HOST0"],
'TMS320TCI6638' : ["HOST0"],
'Kepler' : ["HOST"],
+ 'AM65X ' : ["HOST"],
};
setDeviceAliases(hostProcNames, deviceAliases);
'Vayu' : { del: 'ti.sdo.ipc.nsremote.NameServerRemoteNotify',},
'TDA3X' : { del: 'ti.sdo.ipc.nsremote.NameServerRemoteNotify' },
'TMS320TCI6634' : { del: 'ti.sdo.ipc.nsremote.NameServerRemoteNotify',},
+ 'AM65X' : { del: 'ti.sdo.ipc.nsremote.NameServerRemoteNotify',},
};
setDeviceAliases(nameServerRemoteDelegates, deviceAliases);
'Arctic' : { del: 'ti.sdo.ipc.family.arctic.NotifyCircSetup', },
'LM3.*' : { del: 'ti.sdo.ipc.notifyDrivers.NotifySetupNull', },
'Vayu' : { del: 'ti.sdo.ipc.family.vayu.NotifySetup', },
+ 'AM65X' : { del: 'ti.sdo.ipc.family.am65xx.NotifySetup', },
'TDA3X' : { del: 'ti.sdo.ipc.family.tda3xx.NotifySetup' },
'OMAP5430' : { del: 'ti.sdo.ipc.notifyDrivers.NotifySetupNull' }
'Arctic' : { del: 'ti.sdo.ipc.transports.TransportShmNotifySetup', },
'LM3.*' : { del: 'ti.sdo.ipc.transports.TransportNullSetup', },
'Vayu' : { del: 'ti.sdo.ipc.transports.TransportShmSetup', },
- 'TDA3X' : { del: 'ti.sdo.ipc.transports.TransportShmSetup' }
+ 'TDA3X' : { del: 'ti.sdo.ipc.transports.TransportShmSetup' },
+ 'AM6XX' : { del: 'ti.sdo.ipc.transports.TransportShmSetup', },
};
setDeviceAliases(messageQSetupDelegates, deviceAliases);
'TMS320C66AK2E05' : { del: 'ti.sdo.ipc.family.tci663x.Interrupt', },
'TMS320TCI6630K2L' : { del: 'ti.sdo.ipc.family.tci663x.Interrupt', },
},
+ 'ti.catalog.arm.cortexa53' : {
+ 'AM65X' : { del: 'ti.sdo.ipc.family.am65xx.InterruptHost', },
+ },
+ 'ti.catalog.arm.cortexr5' : {
+ 'AM65X' : { del: 'ti.sdo.ipc.family.am65xx.InterruptR5f', },
+ },
'ti.catalog.c6000' : {
'OMAP3530' : { del: 'ti.sdo.ipc.family.omap3530.InterruptDsp', },
'TMS320CDM6446' : { del: 'ti.sdo.ipc.family.dm6446.InterruptDsp', },
numLocks: 256
},
},
+ 'ti.catalog.arm.cortexa53' : {
+ 'AM65X' : {
+ baseAddr: 0x0030E00800,
+ numLocks: 256
+ },
+ },
+ 'ti.catalog.arm.cortexr5' : {
+ 'AM65X' : {
+ baseAddr: 0x0030E00800,
+ numLocks: 256
+ },
+ },
'ti.catalog.c6000' : {
'TMS320TI816X' : {
baseAddr: 0x080CA800,
/* A15 is the already the host no need to generate data */
if ((Program.cpu.catalogName == 'ti.catalog.arm.cortexa8') ||
(Program.cpu.catalogName == 'ti.catalog.arm.cortexa9') ||
- (Program.cpu.catalogName == 'ti.catalog.arm.cortexa15')) {
+ (Program.cpu.catalogName == 'ti.catalog.arm.cortexa15') ||
+ (Program.cpu.catalogName == 'ti.catalog.arm.cortexa53')) {
return (false);
}
diff --git a/packages/ti/sdo/ipc/family/am65xx/InterruptHost.c b/packages/ti/sdo/ipc/family/am65xx/InterruptHost.c
--- /dev/null
@@ -0,0 +1,262 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== InterruptHost.c ========
+ * Ducati/A8 based interupt manager
+ */
+
+#include <xdc/std.h>
+#include <xdc/runtime/Assert.h>
+
+#include <ti/sysbios/family/arm/gicv3/Hwi.h>
+
+#include <ti/sdo/ipc/family/am65xx/NotifySetup.h>
+#include <ti/sdo/ipc/notifyDrivers/IInterrupt.h>
+#include <ti/sdo/ipc/_Ipc.h>
+#include <ti/sdo/utils/_MultiProc.h>
+
+#include "package/internal/InterruptHost.xdc.h"
+
+/* Register access method. */
+#define REG16(A) (*(volatile UInt16 *) (A))
+#define REG32(A) (*(volatile UInt32 *) (A))
+
+#define PROCID(IDX) (InterruptHost_procIdTable[(IDX)])
+#define MBX_TABLE_IDX(SRC, DST) ((PROCID(SRC) * InterruptHost_NUM_CORES) + \
+ PROCID(DST))
+#define SUBMBX_IDX(IDX) (InterruptHost_mailboxTable[(IDX)] & 0xFF)
+#define MBX_USER_IDX(IDX) ((InterruptHost_mailboxTable[(IDX)] >> 8) \
+ & 0xFF)
+#define MBX_BASEADDR_IDX(IDX) ((InterruptHost_mailboxTable[(IDX)] >> 16) \
+ & 0xFFFF)
+
+#define MAILBOX_REG_VAL(M) (0x1 << (2 * M))
+
+#define MAILBOX_MESSAGE(IDX) (InterruptHost_mailboxBaseAddr[ \
+ MBX_BASEADDR_IDX(IDX)] + 0x40 + \
+ (0x4 * SUBMBX_IDX(IDX)))
+#define MAILBOX_STATUS(IDX) (InterruptHost_mailboxBaseAddr[ \
+ MBX_BASEADDR_IDX(IDX)] + 0xC0 + \
+ (0x4 * SUBMBX_IDX(IDX)))
+
+#define MAILBOX_IRQSTATUS_CLR(IDX) (InterruptHost_mailboxBaseAddr[ \
+ MBX_BASEADDR_IDX(IDX)] + (0x10 * \
+ MBX_USER_IDX(IDX)) + 0x104)
+#define MAILBOX_IRQENABLE_SET(IDX) (InterruptHost_mailboxBaseAddr[ \
+ MBX_BASEADDR_IDX(IDX)] + (0x10 * \
+ MBX_USER_IDX(IDX)) + 0x108)
+#define MAILBOX_IRQENABLE_CLR(IDX) (InterruptHost_mailboxBaseAddr[ \
+ MBX_BASEADDR_IDX(IDX)] + (0x10 * \
+ MBX_USER_IDX(IDX)) + 0x10C)
+#define MAILBOX_EOI_REG(IDX) (InterruptHost_mailboxBaseAddr[ \
+ MBX_BASEADDR_IDX(IDX)] + 0x140)
+
+/*
+ *************************************************************************
+ * Module functions
+ *************************************************************************
+ */
+
+/*
+ * ======== InterruptHost_intEnable ========
+ * Enable remote processor interrupt
+ */
+Void InterruptHost_intEnable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo)
+{
+ UInt16 index;
+ UInt subMbxIdx;
+
+ index = MBX_TABLE_IDX(remoteProcId, MultiProc_self());
+
+ /* If the remote processor communicates via mailboxes, we should enable
+ * the Mailbox IRQ instead of enabling the Hwi because multiple mailboxes
+ * share the same Hwi
+ */
+ subMbxIdx = SUBMBX_IDX(index);
+ REG32(MAILBOX_IRQENABLE_SET(index)) = MAILBOX_REG_VAL(subMbxIdx);
+}
+
+/*
+ * ======== InterruptHost_intDisable ========
+ * Disables remote processor interrupt
+ */
+Void InterruptHost_intDisable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo)
+{
+ UInt16 index;
+ UInt subMbxIdx;
+
+ index = MBX_TABLE_IDX(remoteProcId, MultiProc_self());
+
+ /* If the remote processor communicates via mailboxes, we should disable
+ * the Mailbox IRQ instead of disabling the Hwi because multiple mailboxes
+ * share the same Hwi
+ */
+ subMbxIdx = SUBMBX_IDX(index);
+ REG32(MAILBOX_IRQENABLE_CLR(index)) = MAILBOX_REG_VAL(subMbxIdx);
+}
+
+/*
+ * ======== InterruptHost_intRegister ========
+ */
+Void InterruptHost_intRegister(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo,
+ Fxn func, UArg arg)
+{
+ UInt key;
+ Int index;
+ InterruptHost_FxnTable *table;
+
+ Assert_isTrue(remoteProcId < ti_sdo_utils_MultiProc_numProcessors,
+ ti_sdo_ipc_Ipc_A_internal);
+
+ /* Assert that our MultiProc id is set correctly */
+ Assert_isTrue((InterruptHost_hostProcId == MultiProc_self()),
+ ti_sdo_ipc_Ipc_A_internal);
+
+ /* index is the virtual id (invariant) */
+ index = PROCID(remoteProcId);
+
+ intInfo->localIntId = NotifySetup_interruptTable(index);
+
+ /* Disable global interrupts */
+ key = Hwi_disable();
+
+ /* store callback function by virtual id */
+ table = &(InterruptHost_module->fxnTable[index]);
+ table->func = func;
+ table->arg = arg;
+
+ InterruptHost_intClear(remoteProcId, intInfo);
+
+ /* plug the cpu interrupt with notify setup dispatch isr */
+ NotifySetup_plugHwi(remoteProcId, intInfo->localIntId,
+ InterruptHost_intShmStub);
+
+ InterruptHost_intEnable(remoteProcId, intInfo);
+
+ /* Restore global interrupts */
+ Hwi_restore(key);
+}
+
+/*
+ * ======== InterruptHost_intUnregister ========
+ */
+Void InterruptHost_intUnregister(UInt16 remoteProcId,
+ IInterrupt_IntInfo *intInfo)
+{
+ Int index;
+ InterruptHost_FxnTable *table;
+
+ /* Disable the mailbox interrupt source */
+ InterruptHost_intDisable(remoteProcId, intInfo);
+
+ NotifySetup_unplugHwi(remoteProcId, intInfo->localIntId);
+
+ /* index is the virtual id (invariant) */
+ index = PROCID(remoteProcId);
+
+ /* Clear the FxnTable entry for the remote processor */
+ table = &(InterruptHost_module->fxnTable[index]);
+ table->func = NULL;
+ table->arg = 0;
+}
+
+/*
+ * ======== InterruptHost_intSend ========
+ * Send interrupt to the remote processor
+ */
+Void InterruptHost_intSend(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo,
+ UArg arg)
+{
+ UInt key;
+ UInt16 index;
+
+ index = MBX_TABLE_IDX(MultiProc_self(), remoteProcId);
+ key = Hwi_disable();
+ if (REG32(MAILBOX_STATUS(index)) == 0) {
+ REG32(MAILBOX_MESSAGE(index)) = arg;
+ }
+ Hwi_restore(key);
+}
+
+/*
+ * ======== InterruptHost_intPost ========
+ * Simulate an interrupt from a remote processor
+ */
+Void InterruptHost_intPost(UInt16 srcProcId, IInterrupt_IntInfo *intInfo,
+ UArg arg)
+{
+ UInt key;
+ UInt16 index;
+
+ index = MBX_TABLE_IDX(srcProcId, MultiProc_self());
+ key = Hwi_disable();
+ if (REG32(MAILBOX_STATUS(index)) == 0) {
+ REG32(MAILBOX_MESSAGE(index)) = arg;
+ }
+ Hwi_restore(key);
+}
+
+/*
+ * ======== InterruptHost_intClear ========
+ * Clear interrupt
+ */
+UInt InterruptHost_intClear(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo)
+{
+ UInt arg;
+ UInt16 index;
+
+ index = MBX_TABLE_IDX(remoteProcId, MultiProc_self());
+ arg = REG32(MAILBOX_MESSAGE(index));
+ REG32(MAILBOX_IRQSTATUS_CLR(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index));
+
+ return (arg);
+}
+
+/*
+ *************************************************************************
+ * Internals functions
+ *************************************************************************
+ */
+
+/*
+ * ======== InterruptHost_intShmMbxStub ========
+ */
+Void InterruptHost_intShmStub(UInt16 idx)
+{
+ UInt16 srcVirtId;
+ InterruptHost_FxnTable *table;
+
+ srcVirtId = idx / InterruptHost_NUM_CORES;
+ table = &(InterruptHost_module->fxnTable[srcVirtId]);
+ (table->func)(table->arg);
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/InterruptHost.xdc b/packages/ti/sdo/ipc/family/am65xx/InterruptHost.xdc
--- /dev/null
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2012-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * ======== InterruptHost.xdc ========
+ *
+ */
+
+import ti.sdo.utils.MultiProc;
+
+/*!
+ * ======== InterruptHost ========
+ * AM65XX/V8A based interrupt manager
+ */
+module InterruptHost inherits ti.sdo.ipc.notifyDrivers.IInterrupt
+{
+ /* Total number of cores on am65xx SoC */
+ const UInt8 NUM_CORES = 3;
+
+ /* Number of Cores in A15 Sub-system */
+ const UInt8 NUM_HOST_CORES = 1;
+
+ /* Number of System Mailboxes */
+ const UInt8 NUM_SYS_MBX = 3;
+
+ /* Base address for the Mailbox subsystem */
+ config UInt32 mailboxBaseAddr[NUM_SYS_MBX];
+
+ /*
+ * Mailbox table for storing encoded Base Address, mailbox user Id,
+ * and sub-mailbox index.
+ */
+ config UInt32 mailboxTable[NUM_CORES * NUM_CORES];
+
+ config UInt32 procIdTable[NUM_CORES];
+
+internal:
+ /*! Statically retrieve procIds to avoid doing this at runtime */
+ config UInt r5f_0ProcId = MultiProc.INVALIDID;
+ config UInt hostProcId = MultiProc.INVALIDID;
+ config UInt r5f_1ProcId = MultiProc.INVALIDID;
+
+ /*! Function table */
+ struct FxnTable {
+ Fxn func;
+ UArg arg;
+ }
+
+ /*!
+ * ======== intShmStub ========
+ * Stub to be plugged
+ */
+ Void intShmStub(UInt16 idx);
+
+ struct Module_State {
+ /*
+ * Create a function table of length NUM_CORES (Total number of cores
+ * in the System).
+ */
+ FxnTable fxnTable[NUM_CORES];
+ };
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/InterruptHost.xs b/packages/ti/sdo/ipc/family/am65xx/InterruptHost.xs
--- /dev/null
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== InterruptHost.xs ========
+ */
+
+/*
+ * ======== module$use ========
+ */
+function module$use()
+{
+ xdc.useModule("xdc.runtime.Assert");
+
+ xdc.useModule("ti.sysbios.family.arm.v8a.Mmu");
+ xdc.useModule("ti.sysbios.family.arm.gicv3.Hwi");
+
+ xdc.useModule("ti.sdo.ipc.Ipc");
+ xdc.useModule("ti.sdo.ipc.family.am65xx.InterruptHost");
+ xdc.useModule("ti.sdo.ipc.family.am65xx.NotifySetup");
+
+ var TableInit = xdc.useModule("ti.sdo.ipc.family.am65xx.TableInit");
+
+ /* initialize procIdTable */
+ TableInit.initProcId(this);
+
+ /* initialize mailboxTable */
+ TableInit.generateTable(this);
+
+ /* Initialize mailbox base address table */
+ /* TODO: 0x0031F80000 is address from main domain memory map
+ * Need to find any addresss translation involved for v8A */
+ this.mailboxBaseAddr[0] = 0x0031F80000; /* System Mailbox 0 */
+ /* Initialize mailbox base address table */
+ /* TODO: 0x0031F80000 is address from main domain memory map
+ * Need to find any addresss translation involved for v8A */
+ this.mailboxBaseAddr[1] = 0x0031F81000; /* System Mailbox 1 */
+ /* Initialize mailbox base address table */
+ /* TODO: 0x0031F80000 is address from main domain memory map
+ * Need to find any addresss translation involved for v8A */
+ this.mailboxBaseAddr[2] = 0x0031F82000; /* System Mailbox 0 */
+}
+
+/*
+ * ======== module$static$init ========
+ * Initialize the target state object.
+ */
+function module$static$init(state, mod)
+{
+ for (var i = 0; i < this.procIdTable.length; i++) {
+ state.fxnTable[i].func = null;
+ state.fxnTable[i].arg = 0;
+ }
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/InterruptR5f.c b/packages/ti/sdo/ipc/family/am65xx/InterruptR5f.c
--- /dev/null
@@ -0,0 +1,298 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * ======== InterruptR5f.c ========
+ * AM65XX R5F based interupt manager
+ */
+
+#include <xdc/std.h>
+#include <xdc/runtime/Assert.h>
+
+#include <ti/sysbios/BIOS.h>
+#include <ti/sysbios/family/arm/v7r/keystone3/Core.h>
+#include <ti/sysbios/family/arm/v7r/keystone3/Hwi.h>
+
+#include <ti/sdo/ipc/family/am65xx/NotifySetup.h>
+
+#include <ti/sdo/ipc/notifyDrivers/IInterrupt.h>
+#include <ti/sdo/utils/_MultiProc.h>
+
+#include "package/internal/InterruptR5f.xdc.h"
+
+/* Register access method. */
+#define REG16(A) (*(volatile UInt16 *) (A))
+#define REG32(A) (*(volatile UInt32 *) (A))
+
+#define PROCID(IDX) (InterruptR5f_procIdTable[(IDX)])
+#define MBX_TABLE_IDX(SRC, DST) ((PROCID(SRC) * InterruptR5f_NUM_CORES) + \
+ PROCID(DST))
+#define SUBMBX_IDX(IDX) (InterruptR5f_mailboxTable[(IDX)] & 0xFF)
+#define MBX_USER_IDX(IDX) ((InterruptR5f_mailboxTable[(IDX)] >> 8) \
+ & 0xFF)
+#define MBX_BASEADDR_IDX(IDX) ((InterruptR5f_mailboxTable[(IDX)] >> 16) \
+ & 0xFFFF)
+
+#define MAILBOX_REG_VAL(M) (0x1 << (2 * M))
+
+#define MAILBOX_MESSAGE(IDX) (InterruptR5f_mailboxBaseAddr[ \
+ MBX_BASEADDR_IDX(IDX)] + 0x40 + \
+ (0x4 * SUBMBX_IDX(IDX)))
+#define MAILBOX_STATUS(IDX) (InterruptR5f_mailboxBaseAddr[ \
+ MBX_BASEADDR_IDX(IDX)] + 0xC0 + \
+ (0x4 * SUBMBX_IDX(IDX)))
+
+#define MAILBOX_IRQSTATUS_CLR(IDX) (InterruptR5f_mailboxBaseAddr[ \
+ MBX_BASEADDR_IDX(IDX)] + (0x10 * \
+ MBX_USER_IDX(IDX)) + 0x104)
+#define MAILBOX_IRQENABLE_SET(IDX) (InterruptR5f_mailboxBaseAddr[ \
+ MBX_BASEADDR_IDX(IDX)] + (0x10 * \
+ MBX_USER_IDX(IDX)) + 0x108)
+#define MAILBOX_IRQENABLE_CLR(IDX) (InterruptR5f_mailboxBaseAddr[ \
+ MBX_BASEADDR_IDX(IDX)] + (0x10 * \
+ MBX_USER_IDX(IDX)) + 0x10C)
+#define MAILBOX_EOI_REG(IDX) (InterruptR5f_mailboxBaseAddr[ \
+ MBX_BASEADDR_IDX(IDX)] + 0x140)
+
+#define WUGENIPU 19
+
+/*
+ *************************************************************************
+ * Module functions
+ *************************************************************************
+ */
+
+/*
+ * ======== InterruptR5f_intEnable ========
+ * Enable remote processor interrupt
+ */
+Void InterruptR5f_intEnable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo)
+{
+ UInt16 index;
+ Bool useMailbox = TRUE;
+ UInt subMbxIdx;
+
+ index = MBX_TABLE_IDX(remoteProcId, MultiProc_self());
+
+ if ((remoteProcId == InterruptR5f_r5f_0ProcId) ||
+ (remoteProcId == InterruptR5f_r5f_1ProcId)) {
+ Hwi_enableInterrupt(WUGENIPU);
+ useMailbox = FALSE;
+ }
+
+ /* If the remote processor communicates via mailboxes, we should enable
+ * the Mailbox IRQ instead of enabling the Hwi because multiple mailboxes
+ * share the same Hwi
+ */
+ if (useMailbox) {
+ subMbxIdx = SUBMBX_IDX(index);
+ REG32(MAILBOX_IRQENABLE_SET(index)) = MAILBOX_REG_VAL(subMbxIdx);
+ }
+}
+
+/*
+ * ======== InterruptR5f_intDisable ========
+ * Disables remote processor interrupt
+ */
+Void InterruptR5f_intDisable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo)
+{
+ UInt16 index;
+ Bool useMailbox = TRUE;
+ UInt subMbxIdx;
+
+ if ((remoteProcId == InterruptR5f_r5f_0ProcId) ||
+ (remoteProcId == InterruptR5f_r5f_1ProcId)) {
+ Hwi_disableInterrupt(WUGENIPU);
+ useMailbox = FALSE;
+ }
+
+ index = MBX_TABLE_IDX(remoteProcId, MultiProc_self());
+
+ /* If the remote processor communicates via mailboxes, we should disable
+ * the Mailbox IRQ instead of disabling the Hwi because multiple mailboxes
+ * share the same Hwi
+ */
+ if (useMailbox) {
+ subMbxIdx = SUBMBX_IDX(index);
+ REG32(MAILBOX_IRQENABLE_CLR(index)) = MAILBOX_REG_VAL(subMbxIdx);
+ }
+}
+
+/*
+ * ======== InterruptR5f_intRegister ========
+ */
+Void InterruptR5f_intRegister(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo,
+ Fxn func, UArg arg)
+{
+ Hwi_Params hwiAttrs;
+ UInt key;
+ Int index;
+ InterruptR5f_FxnTable *table;
+
+ Assert_isTrue(remoteProcId < ti_sdo_utils_MultiProc_numProcessors,
+ ti_sdo_utils_MultiProc_A_invalidMultiProcId);
+
+ /* index is the virtual id (invariant) */
+ index = PROCID(remoteProcId);
+
+ intInfo->localIntId = NotifySetup_interruptTable(index);
+
+ /* Disable global interrupts */
+ key = Hwi_disable();
+
+ /* store callback function by virtual id */
+ table = &(InterruptR5f_module->fxnTable[index]);
+ table->func = func;
+ table->arg = arg;
+
+ InterruptR5f_intClear(remoteProcId, intInfo);
+
+ Hwi_Params_init(&hwiAttrs);
+ hwiAttrs.maskSetting = Hwi_MaskingOption_LOWER;
+
+ /* plug the cpu interrupt with notify setup dispatch isr */
+ NotifySetup_plugHwi(remoteProcId, intInfo->localIntId,
+ InterruptR5f_intShmMbxStub);
+
+ InterruptR5f_intEnable(remoteProcId, intInfo);
+
+ /* Restore global interrupts */
+ Hwi_restore(key);
+}
+
+/*
+ * ======== InterruptR5f_intUnregister ========
+ */
+Void InterruptR5f_intUnregister(UInt16 remoteProcId,
+ IInterrupt_IntInfo *intInfo)
+{
+ Int index;
+ Hwi_Handle hwiHandle;
+ InterruptR5f_FxnTable *table;
+
+ /* Disable the mailbox interrupt source */
+ InterruptR5f_intDisable(remoteProcId, intInfo);
+
+ if ((remoteProcId == InterruptR5f_r5f_0ProcId) ||
+ (remoteProcId == InterruptR5f_r5f_1ProcId)) {
+ hwiHandle = Hwi_getHandle(WUGENIPU);
+ Hwi_delete(&hwiHandle);
+ }
+ else {
+ NotifySetup_unplugHwi(remoteProcId, intInfo->localIntId);
+ }
+
+ /* index is the virtual id (invariant) */
+ index = PROCID(remoteProcId);
+
+ /* Clear the FxnTable entry for the remote processor */
+ table = &(InterruptR5f_module->fxnTable[index]);
+ table->func = NULL;
+ table->arg = 0;
+}
+
+
+/*
+ * ======== InterruptR5f_intSend ========
+ * Send interrupt to the remote processor
+ */
+Void InterruptR5f_intSend(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo,
+ UArg arg)
+{
+ UInt key;
+ UInt16 index;
+
+ index = MBX_TABLE_IDX(MultiProc_self(), remoteProcId);
+ key = Hwi_disable();
+ while (REG32(MAILBOX_STATUS(index)) != 0) {
+ Hwi_restore(key);
+ key = Hwi_disable();
+ }
+ REG32(MAILBOX_MESSAGE(index)) = arg;
+ Hwi_restore(key);
+
+}
+
+
+/*
+ * ======== InterruptR5f_intPost ========
+ * Simulate an interrupt from a remote processor
+ */
+Void InterruptR5f_intPost(UInt16 srcProcId, IInterrupt_IntInfo *intInfo,
+ UArg arg)
+{
+ UInt key;
+ UInt16 index;
+
+ index = MBX_TABLE_IDX(srcProcId, MultiProc_self());
+ key = Hwi_disable();
+ if (REG32(MAILBOX_STATUS(index)) == 0) {
+ REG32(MAILBOX_MESSAGE(index)) = arg;
+ }
+ Hwi_restore(key);
+
+}
+
+/*
+ * ======== InterruptR5f_intClear ========
+ * Clear interrupt
+ */
+UInt InterruptR5f_intClear(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo)
+{
+ UInt arg;
+ UInt16 index;
+
+ index = MBX_TABLE_IDX(remoteProcId, MultiProc_self());
+ arg = REG32(MAILBOX_MESSAGE(index));
+ REG32(MAILBOX_IRQSTATUS_CLR(index)) =
+ MAILBOX_REG_VAL(SUBMBX_IDX(index));
+
+ return (arg);
+}
+
+/*
+ *************************************************************************
+ * Internals functions
+ *************************************************************************
+ */
+
+/*
+ * ======== InterruptR5f_intShmMbxStub ========
+ */
+Void InterruptR5f_intShmMbxStub(UInt16 idx)
+{
+ UInt16 srcVirtId;
+ InterruptR5f_FxnTable *table;
+
+ srcVirtId = idx / InterruptR5f_NUM_CORES;
+ table = &(InterruptR5f_module->fxnTable[srcVirtId]);
+ (table->func)(table->arg);
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/InterruptR5f.xdc b/packages/ti/sdo/ipc/family/am65xx/InterruptR5f.xdc
--- /dev/null
@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * ======== InterruptR5f.xdc ========
+ *
+ */
+
+import ti.sdo.utils.MultiProc;
+
+/*!
+ * ======== InterruptR5f ========
+ * R5F interrupt manager
+ */
+module InterruptR5f inherits ti.sdo.ipc.notifyDrivers.IInterrupt
+{
+ /*!
+ * Maximum number of cores
+ *
+ * @_nodoc
+ */
+ const UInt8 NUM_CORES = 3;
+
+ /*!
+ * Maximum number of IPU cores
+ *
+ * @_nodoc
+ */
+ const UInt8 NUM_R5f_CORES = 2;
+
+
+ /*!
+ * Number of System mailboxes used by IPC
+ *
+ * This represents the number of System mailboxes used by IPC. IPC
+ * currently uses system mailbox 0
+ */
+ const UInt8 NUM_SYS_MBX = 3;
+
+ /*!
+ * Base address for the mailbox subsystems
+ *
+ * The `mailboxBaseAddr` array indicates the virtual addresses through
+ * which IPC will access various mailboxes. The specific mailbox addresses
+ * each array index maps to follows:
+ * @p(blist)
+ * - 0 - System Mailbox 0
+ * @p
+ *
+ * Note that these mailboxes are not accessible at their physical
+ * addresses (in the 0x4XXX_XXXX range). So default virtual addresses
+ * through which these mailboxes will be accessed are assigned in the
+ * 0x6XXX_XXXX range. Users must ensure these virtual addresses are
+ * correctly mapped to the 0x4XXX_XXXX-based phys addrs in each IPUs AMMU.
+ */
+ config UInt32 mailboxBaseAddr[NUM_SYS_MBX];
+
+ /*!
+ * Mailbox table for storing encoded Base Address, mailbox user Id,
+ * and sub-mailbox index.
+ *
+ * @_nodoc
+ */
+ config UInt32 mailboxTable[NUM_CORES * NUM_CORES];
+
+ /*!
+ * Base address for the R5F CTRL register
+ */
+ config UInt32 r5fCtrlBaseAddr = 0x40001000;
+
+ /*!
+ * Processor Id table
+ *
+ * @_nodoc
+ */
+ config UInt32 procIdTable[NUM_CORES];
+
+internal:
+
+ /*! Statically retrieve procIds to avoid doing this at runtime */
+ config UInt r5f_0ProcId = MultiProc.INVALIDID;
+ config UInt hostProcId = MultiProc.INVALIDID;
+ config UInt r5f_1ProcId = MultiProc.INVALIDID;
+
+ /*! Function table */
+ struct FxnTable {
+ Fxn func;
+ UArg arg;
+ }
+
+ /*! Stub to be plugged for inter R5F core interrupts */
+ Void intShmR5fStub(UArg arg);
+
+ /*! Stub to be plugged for intra R5F core interrupts */
+ Void intShmMbxStub(UInt16 idx);
+
+ struct Module_State {
+ /*
+ * Create a function table of length 8 (Total number of cores in the
+ * System) for each M4 core.
+ */
+ FxnTable fxnTable[NUM_CORES];
+ };
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/InterruptR5f.xs b/packages/ti/sdo/ipc/family/am65xx/InterruptR5f.xs
--- /dev/null
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== InterruptR5f.xs ========
+ *
+ */
+
+/*
+ * ======== module$use ========
+ */
+function module$use()
+{
+ xdc.useModule("xdc.runtime.Assert");
+
+ xdc.useModule("ti.sysbios.BIOS");
+ xdc.useModule("ti.sysbios.family.arm.v7r.keystone3.Core");
+ xdc.useModule("ti.sysbios.family.arm.v7r.keystone3.Hwi");
+
+ xdc.useModule("ti.sdo.ipc.family.am65xx.NotifySetup");
+ xdc.useModule("ti.sdo.ipc.notifyDrivers.IInterrupt");
+ xdc.useModule("ti.sdo.utils.MultiProc");
+
+ var TableInit = xdc.useModule("ti.sdo.ipc.family.am65xx.TableInit");
+
+ /* Initisalize procIdTable */
+ TableInit.initProcId(this);
+
+ /* Initialize mailboxTable */
+ TableInit.generateTable(this);
+
+ /* Initialize mailbox base addrs */
+
+ if (this.mailboxBaseAddr[0] == undefined) {
+ /* TODO: 0x0031F80000 is address from main domain memory map
+ * Need to find any addresss translation involved for v7R */
+ this.mailboxBaseAddr[0] = 0x0031F80000; /* System Mailbox 0 */
+ }
+ if (this.mailboxBaseAddr[1] == undefined) {
+ /* TODO: 0x0031F80000 is address from main domain memory map
+ * Need to find any addresss translation involved for v7R */
+ this.mailboxBaseAddr[1] = 0x0031F81000; /* System Mailbox 1 */
+ }
+ if (this.mailboxBaseAddr[2] == undefined) {
+ /* TODO: 0x0031F80000 is address from main domain memory map
+ * Need to find any addresss translation involved for v7R */
+ this.mailboxBaseAddr[2] = 0x0031F82000; /* System Mailbox 2 */
+ }
+
+ /*
+ * In case of a spec change, follow the process shown below:
+ * 1. Update the mailboxBaseAddr Table.
+ * 2. Update the dspInterruptTable.
+ * 3. Update Virtual Index assignment.
+ * 4. Update numCores, numEves and eveMbx2BaseIdx variables
+ * in order to correctly intialize the mailboxTable.
+ */
+}
+
+/*
+ * ======== module$static$init ========
+ * Initialize module values.
+ */
+function module$static$init(state, mod)
+{
+ for (var i = 0; i < this.procIdTable.length; i++) {
+ state.fxnTable[i].func = null;
+ state.fxnTable[i].arg = 0;
+ }
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/NotifyDriverMbx.c b/packages/ti/sdo/ipc/family/am65xx/NotifyDriverMbx.c
--- /dev/null
@@ -0,0 +1,398 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== NotifyDriverMbx.c ========
+ */
+#include <xdc/std.h>
+#include <xdc/runtime/Assert.h>
+#include <xdc/runtime/Startup.h>
+
+#if defined(xdc_target__isaCompatible_v7R)
+
+#include <ti/sysbios/family/arm/v7r/keystone3/Hwi.h>
+
+#elif defined(xdc_target__isaCompatible_v8A)
+
+#include <ti/sysbios/family/arm/gicv3/Hwi.h>
+
+#else
+#error Invalid target
+#endif
+
+#include <ti/sdo/ipc/_Notify.h>
+#include <ti/sdo/ipc/family/am65xx/NotifySetup.h>
+#include <ti/sdo/utils/_MultiProc.h>
+
+#include "package/internal/NotifyDriverMbx.xdc.h"
+
+/* Bit mask operations */
+#define SET_BIT(num,pos) ((num) |= (1u << (pos)))
+#define CLEAR_BIT(num,pos) ((num) &= ~(1u << (pos)))
+#define TEST_BIT(num,pos) ((num) & (1u << (pos)))
+
+/* register access methods */
+#define REG16(A) (*(volatile UInt16 *)(A))
+#define REG32(A) (*(volatile UInt32 *)(A))
+
+#define MAILBOX_FIFOLENGTH 4
+#define PROCID(idx) (NotifyDriverMbx_procIdTable[(idx)])
+
+#define MBX_BASEADDR_IDX(idx) \
+ ((NotifyDriverMbx_mailboxTable[(idx)] >> 16) & 0xFFFF)
+
+#define MAILBOX_ADDR(idx) \
+ (NotifyDriverMbx_mailboxBaseAddr[MBX_BASEADDR_IDX(idx)])
+
+#define MBX_TABLE_IDX(src, dst) \
+ ((PROCID(src) * NotifyDriverMbx_NUM_CORES) + PROCID(dst))
+
+#define SUBMBX_IDX(idx) (NotifyDriverMbx_mailboxTable[(idx)] & 0xFF)
+
+#define MBX_USER_IDX(idx) ((NotifyDriverMbx_mailboxTable[(idx)] >> 8) & 0xFF)
+
+#define MAILBOX_REG_VAL(m) (0x1 << (2 * m))
+
+#define MAILBOX_MESSAGE(idx) \
+ (MAILBOX_ADDR(idx) + 0x40 + (0x4 * SUBMBX_IDX(idx)))
+
+#define MAILBOX_STATUS(idx) \
+ (MAILBOX_ADDR(idx) + 0xC0 + (0x4 * SUBMBX_IDX(idx)))
+
+#define MAILBOX_IRQSTATUS_CLR(idx) \
+ (MAILBOX_ADDR(idx) + 0x104 + (0x10 * MBX_USER_IDX(idx)))
+
+#define MAILBOX_IRQENABLE_SET(idx) \
+ (MAILBOX_ADDR(idx) + 0x108 + (0x10 * MBX_USER_IDX(idx)))
+
+#define MAILBOX_IRQENABLE_CLR(idx) \
+ (MAILBOX_ADDR(idx) + 0x10C + (0x10 * MBX_USER_IDX(idx)))
+
+#define MAILBOX_EOI_REG(idx) (MAILBOX_ADDR(idx) + 0x140)
+
+#define EVENT_GROUP_SIZE 32
+
+/* empty the mailbox for the given index, clear its interrupt */
+#define MAILBOX_INIT(idx) \
+ while (REG32(MAILBOX_STATUS(idx)) != 0) { \
+ REG32(MAILBOX_MESSAGE(idx)); \
+ } \
+ REG32(MAILBOX_IRQSTATUS_CLR(idx)) = MAILBOX_REG_VAL(SUBMBX_IDX(idx)); \
+ REG32(MAILBOX_EOI_REG(idx)) = MBX_USER_IDX(idx);
+
+/*
+ *************************************************************************
+ * Module functions
+ *************************************************************************
+ */
+
+/*
+ * ======== NotifyDriverMbx_Module_startup ========
+ */
+Int NotifyDriverMbx_Module_startup(Int phase)
+{
+#if defined(xdc_target__isaCompatible_v7R)
+
+ /* nothing to do on this processor */
+ return (Startup_DONE);
+
+#elif defined(xdc_target__isaCompatible_v8A)
+
+ return (Startup_DONE);
+
+#else
+#error Invalid target
+#endif
+}
+
+/*
+ **************************************************************
+ * Instance functions
+ **************************************************************
+ */
+
+/*
+ * ======== NotifyDriverMbx_Instance_init ========
+ */
+Void NotifyDriverMbx_Instance_init(NotifyDriverMbx_Object *obj,
+ const NotifyDriverMbx_Params *params)
+{
+ UInt key;
+ UInt16 selfVirtId;
+ UInt16 index;
+
+ obj->evtRegMask = 0;
+ obj->notifyHandle = NULL;
+ obj->remoteProcId = params->remoteProcId;
+ obj->remoteVirtId = PROCID(params->remoteProcId);
+ obj->cpuIntrNum = params->intVectorId;
+
+ /* disable global interrupts */
+ key = Hwi_disable();
+
+ /* clear inbound mailbox of all old messages */
+ selfVirtId = PROCID(MultiProc_self());
+ index = (obj->remoteVirtId * NotifyDriverMbx_NUM_CORES) + selfVirtId;
+ MAILBOX_INIT(index);
+
+ /* must use processor virtual ID to store driver handle in table */
+ NotifyDriverMbx_module->drvHandles[obj->remoteVirtId] = obj;
+
+ /* plug the cpu interrupt */
+ NotifySetup_plugHwi(params->remoteProcId, params->intVectorId,
+ NotifyDriverMbx_isr);
+
+ /* enable the mailbox interrupt from the remote core */
+ NotifyDriverMbx_enable(obj);
+
+ /* restore global interrupts */
+ Hwi_restore(key);
+}
+
+/*
+ * ======== NotifyDriverMbx_Instance_finalize ========
+ */
+Void NotifyDriverMbx_Instance_finalize(NotifyDriverMbx_Object *obj)
+{
+
+ /* disable the mailbox interrupt source */
+ NotifyDriverMbx_disable(obj);
+
+ /* unplug isr and unprogram the event dispatcher */
+ NotifySetup_unplugHwi(obj->remoteProcId, obj->cpuIntrNum);
+
+ /* must use processor virtual ID to remove driver handle from table */
+ NotifyDriverMbx_module->drvHandles[obj->remoteVirtId] = NULL;
+}
+
+/*
+ * ======== NotifyDriverMbx_registerEvent ========
+ */
+Void NotifyDriverMbx_registerEvent(NotifyDriverMbx_Object *obj,
+ UInt32 eventId)
+{
+ UInt hwiKey;
+
+ /*
+ * Disable interrupt line to ensure that isr doesn't
+ * preempt registerEvent and encounter corrupt state
+ */
+ hwiKey = Hwi_disable();
+
+ /* Set the 'registered' bit */
+ SET_BIT(obj->evtRegMask, eventId);
+
+ /* Restore the interrupt line */
+ Hwi_restore(hwiKey);
+}
+
+/*
+ * ======== NotifyDriverMbx_unregisterEvent ========
+ */
+Void NotifyDriverMbx_unregisterEvent(NotifyDriverMbx_Object *obj,
+ UInt32 eventId)
+{
+ UInt hwiKey;
+
+ /*
+ * Disable interrupt line to ensure that isr doesn't
+ * preempt registerEvent and encounter corrupt state
+ */
+ hwiKey = Hwi_disable();
+
+ /* Clear the registered bit */
+ CLEAR_BIT(obj->evtRegMask, eventId);
+
+ /* Restore the interrupt line */
+ Hwi_restore(hwiKey);
+}
+
+/*
+ * ======== NotifyDriverMbx_sendEvent ========
+ */
+/*
+ * PUT_NOTIFICATION will spin waiting for enough room in the mailbox FIFO
+ * to store the number of messages needed for the notification ('numMsgs').
+ * If spinning is necesssary (i.e. if waitClear is TRUE and there isn't enough
+ * room in the FIFO) then PUT_NOTIFICATION will allow pre-emption while
+ * spinning.
+ *
+ * PUT_NOTIFICATION needs to prevent another local thread from writing to the
+ * same mailbox after the current thread has
+ * 1) determined that there is enough room to write the notification and
+ * 2) written the first of two messages to the mailbox.
+ * This is needed to respectively prevent
+ * 1) both threads from incorrectly assuming there is enough space in the FIFO
+ * for their own notifications
+ * 2) the interrupting thread from writing a notification between two
+ * two messages that need to be successivly written by the preempted thread.
+ * Therefore, the check for enough FIFO room and one/both mailbox write(s)
+ * should all occur atomically (i.e. with interrupts disabled)
+ */
+#define PUT_NOTIFICATION(idx) \
+ key = Hwi_disable(); \
+ while(MAILBOX_FIFOLENGTH - REG32(MAILBOX_STATUS(idx)) < numMsgs) { \
+ Hwi_restore(key); \
+ if (!waitClear) { \
+ return (Notify_E_FAIL); \
+ } \
+ key = Hwi_disable(); \
+ }; \
+ REG32(MAILBOX_MESSAGE(idx)) = eventId + smallPayload; \
+ if (smallPayload == 0xFFFFFFE0) { \
+ REG32(MAILBOX_MESSAGE(idx)) = payload; \
+ } \
+ Hwi_restore(key);
+
+Int NotifyDriverMbx_sendEvent(NotifyDriverMbx_Object *obj, UInt32 eventId,
+ UInt32 payload, Bool waitClear)
+{
+ UInt16 selfVirtId = PROCID(MultiProc_self());
+ UInt16 index;
+ UInt key;
+ UInt numMsgs;
+ UInt32 smallPayload;
+
+ /* Decide if the payload is small enough to fit in the first mbx msg */
+ if (payload < 0x7FFFFFF) {
+ smallPayload = (payload << 5);
+ numMsgs = 1;
+ }
+ else {
+ smallPayload = 0xFFFFFFE0;
+ numMsgs = 2;
+ }
+
+ index = (selfVirtId * NotifyDriverMbx_NUM_CORES) + obj->remoteVirtId;
+ PUT_NOTIFICATION(index);
+
+ return (Notify_S_SUCCESS);
+}
+
+/*
+ * ======== NotifyDriverMbx_disable ========
+ */
+Void NotifyDriverMbx_disable(NotifyDriverMbx_Object *obj)
+{
+ UInt16 selfVirtId = PROCID(MultiProc_self());
+ UInt16 index;
+
+ index = (obj->remoteVirtId * NotifyDriverMbx_NUM_CORES) + selfVirtId;
+ REG32(MAILBOX_IRQENABLE_CLR(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index));
+}
+
+/*
+ * ======== NotifyDriverMbx_enable ========
+ */
+Void NotifyDriverMbx_enable(NotifyDriverMbx_Object *obj)
+{
+ UInt16 selfVirtId = PROCID(MultiProc_self());
+ UInt16 index;
+
+ index = (obj->remoteVirtId * NotifyDriverMbx_NUM_CORES) + selfVirtId;
+ REG32(MAILBOX_IRQENABLE_SET(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index));
+}
+
+/*
+ * ======== NotifyDriverMbx_disableEvent ========
+ */
+Void NotifyDriverMbx_disableEvent(NotifyDriverMbx_Object *obj, UInt32 eventId)
+{
+ /* NotifyDriverMbx_disableEvent not supported by this driver */
+ Assert_isTrue(FALSE, NotifyDriverMbx_A_notSupported);
+}
+
+/*
+ * ======== NotifyDriverMbx_enableEvent ========
+ */
+Void NotifyDriverMbx_enableEvent(NotifyDriverMbx_Object *obj, UInt32 eventId)
+{
+ /* NotifyDriverMbx_enableEvent not supported by this driver */
+ Assert_isTrue(FALSE, NotifyDriverMbx_A_notSupported);
+}
+
+/*
+ *************************************************************************
+ * Internal functions
+ *************************************************************************
+ */
+
+/*
+ * ======== NotifyDriverMbx_isr ========
+ */
+
+/* Read a message from the mailbox. The low 5 bits of the message
+ * contains the eventId. The high 27 bits of the message contains
+ * either:
+ * 1) The payload if the payload is less than 0x7FFFFFF
+ * 2) 0x7FFFFFF otherwise
+ * If the high 27 bits of the first message is 0x7FFFFFF, then the
+ * payload is in the next mailbox message.
+ *
+ * idx = mailbox table index
+ */
+#define MESSAGE_DELIVERY(idx) \
+ msg = REG32(MAILBOX_MESSAGE(idx)); \
+ eventId = (UInt16)(msg & 0x1F); \
+ payload = msg >> 5; \
+ if (payload == 0x7FFFFFF) { \
+ while(REG32(MAILBOX_STATUS(idx)) == 0); \
+ payload = REG32(MAILBOX_MESSAGE(idx)); \
+ } \
+ REG32(MAILBOX_IRQSTATUS_CLR(idx)) = MAILBOX_REG_VAL(SUBMBX_IDX(idx)); \
+ obj = NotifyDriverMbx_module->drvHandles[srcVirtId]; \
+ Assert_isTrue(obj != NULL, ti_sdo_ipc_Notify_A_internal); \
+ if (TEST_BIT(obj->evtRegMask, eventId)) { \
+ ti_sdo_ipc_Notify_exec(obj->notifyHandle, eventId, payload); \
+ } \
+ REG32(MAILBOX_EOI_REG(idx)) = MBX_USER_IDX(idx);
+
+Void NotifyDriverMbx_isr(UInt16 idx)
+{
+ NotifyDriverMbx_Object *obj;
+ UInt32 msg, payload;
+ UInt16 eventId;
+ UInt16 srcVirtId;
+
+ srcVirtId = idx / NotifyDriverMbx_NUM_CORES;
+ MESSAGE_DELIVERY(idx)
+}
+
+/*
+ * ======== NotifyDriverMbx_setNotifyHandle ========
+ */
+Void NotifyDriverMbx_setNotifyHandle(NotifyDriverMbx_Object *obj,
+ Ptr notifyHandle)
+{
+ /* internally used, so no assert needed */
+ obj->notifyHandle = (ti_sdo_ipc_Notify_Handle)notifyHandle;
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/NotifyDriverMbx.xdc b/packages/ti/sdo/ipc/family/am65xx/NotifyDriverMbx.xdc
--- /dev/null
@@ -0,0 +1,198 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== NotifyDriverMbx.xdc ================
+ */
+package ti.sdo.ipc.family.am65xx;
+
+import ti.sdo.utils.MultiProc;
+import ti.sdo.ipc.interfaces.INotifyDriver;
+import ti.sdo.ipc.Notify;
+
+import ti.sysbios.hal.Hwi;
+
+import xdc.runtime.Assert;
+import xdc.rov.ViewInfo;
+
+/*!
+ * ======== NotifyDriverMbx ========
+ * A notify driver based on hardware mailbox.
+ *
+ * This notify driver uses hardware mailboxes to transmit notifications
+ * to remote processors. This driver implements the
+ * {@link ti.sdo.ipc.interfaces.INotifyDriver} interface.
+ *
+ * Unlike the Notify drivers available in the {@link ti.sdo.ipc.notifyDrivers}
+ * package, this driver is not generic and will only work with the Vayu
+ * family of devices.
+ *
+ * The driver does not use shared memory. The event IDs and payloads are
+ * transmitted via the hardware mailbox FIFO. The FIFO can hold up to 4
+ * mailbox messages. The number of notification that can be stored in the
+ * FIFO depends on the size of the payloads being sent via Notify_sendEvent.
+ * If the payload is less than 0x7FFFFFF, then a single message will be
+ * sent per notification. Otherwise, two mailbox messages are needed to
+ * send the notification.
+ *
+ * The behavior of Notify_sendEvent when the FIFO is full depends on the
+ * value of the 'waitClear' argument to the function. If 'waitClear' is
+ * TRUE, then Notify_sendEvent will spin waiting for enough room in the
+ * FIFO. If 'waitClear' is FALSE, then Notify_sendEvent will return
+ * Notify_E_FAIL.
+ *
+ * The Notify_enableEvent and Notify_disableEvent APIs are not supported
+ * by this driver.
+ */
+@InstanceFinalize
+@ModuleStartup
+
+module NotifyDriverMbx inherits ti.sdo.ipc.interfaces.INotifyDriver
+{
+ /*! @_nodoc */
+ metaonly struct BasicView {
+ String remoteProc;
+ }
+
+ /*! @_nodoc */
+ metaonly struct MailboxView {
+ String direction;
+ String mailboxAddr;
+ Int subMbxId;
+ Int msgCount;
+ Int mbxInterrupt;
+ }
+
+ /*! @_nodoc */
+ metaonly struct ModuleView {
+ NotifyDriverMbx.Handle drvHandles[NUM_CORES];
+ }
+
+ /*!
+ * ======== rovViewInfo ========
+ */
+ @Facet
+ metaonly config ViewInfo.Instance rovViewInfo =
+ ViewInfo.create({
+ viewMap: [
+ ['Basic',
+ {
+ type: ViewInfo.INSTANCE,
+ viewInitFxn: 'viewInitBasic',
+ structName: 'BasicView'
+ }
+ ],
+ ['Mailbox',
+ {
+ type: ViewInfo.INSTANCE_DATA,
+ viewInitFxn: 'viewInitMailbox',
+ structName: 'MailboxView'
+ }
+ ]
+// ['Module',
+// {
+// type: ViewInfo.MODULE,
+// viewInitFxn: 'viewInitModule',
+// structName: 'ModuleView'
+// }
+// ]
+ ]
+ });
+
+ /*!
+ * Assert raised when trying to use Notify_[enable/disable]Event with
+ * NotifyDriverMbx
+ */
+ config Assert.Id A_notSupported = {
+ msg: "A_notSupported: [enable/disable]Event not supported"
+ };
+
+instance:
+
+ /*!
+ * ======== remoteProcId ========
+ * The MultiProc ID corresponding to the remote processor
+ *
+ * This is a required parameter, it is not optional.
+ */
+ config UInt16 remoteProcId = MultiProc.INVALIDID;
+
+ /*!
+ * ======== intVectorId ========
+ * Interrupt vector ID to be used by the driver.
+ *
+ * This parameter is only used by C66 targets.
+ * This is a required parameter, it is not optional.
+ */
+ config UInt intVectorId = ~1u;
+
+internal:
+ /* total number of cores on Am6x SoC */
+ const UInt8 NUM_CORES = 3;
+
+ /* number of system mailboxes (used by IPC) */
+ const UInt8 NUM_SYS_MBX = 3;
+
+ /* Mailbox table for storing encoded base address, mailbox user ID,
+ * and sub-mailbox index.
+ */
+ config UInt32 mailboxTable[NUM_CORES * NUM_CORES];
+
+ /* base address table for the mailbox subsystem */
+ /* TODO use the table in NotifySetup module */
+ config UInt32 mailboxBaseAddr[NUM_SYS_MBX];
+
+ /* map MultiProc ID to virtual ID, virtId = procIdTable[procId] */
+ config UInt32 procIdTable[NUM_CORES];
+
+ config UInt r5f1_0ProcId = MultiProc.INVALIDID;
+ config UInt hostProcId = MultiProc.INVALIDID;
+
+ /* plugs the interrupt and executes the callback functions */
+ Void isr(UInt16 idx);
+
+ /*! instance state structure */
+ struct Instance_State {
+ Bits32 evtRegMask; /* local event register mask */
+ Notify.Handle notifyHandle; /* handle to front-end object */
+ UInt16 remoteProcId; /* remote processor ID */
+ UInt16 remoteVirtId; /* remote processor virtual ID */
+ Int cpuIntrNum; /* cpu interrupt number */
+ }
+
+ struct Module_State {
+ /* Used by the isr to retrieve the driver handle. This table is
+ * indexed by virtual processorID.
+ */
+ NotifyDriverMbx.Handle drvHandles[NUM_CORES];
+ };
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/NotifyDriverMbx.xs b/packages/ti/sdo/ipc/family/am65xx/NotifyDriverMbx.xs
--- /dev/null
@@ -0,0 +1,225 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== NotifyDriverMbx.xs ================
+ */
+var NotifyDriverMbx = null;
+var isaChain = "";
+
+const NAVSS_MAILBOX0_CLUSTER0_BASEADDR = 0x0031F80000;
+const NAVSS_MAILBOX0_CLUSTER1_BASEADDR = 0x0031F81000;
+const NAVSS_MAILBOX0_CLUSTER2_BASEADDR = 0x0031F82000;
+
+/*
+ * ======== module$use ========
+ */
+function module$use()
+{
+ /* load modules needed in meta domain and in target domain */
+ var TableInit = xdc.useModule("ti.sdo.ipc.family.am65xx.TableInit");
+ var MultiProc = xdc.useModule("ti.sdo.utils.MultiProc");
+ NotifyDriverMbx = this;
+ xdc.useModule('xdc.runtime.Assert');
+ xdc.useModule('xdc.runtime.Startup');
+
+ /* concatenate isa chain into single string for easier matching */
+ isaChain = "#" + Program.build.target.getISAChain().join("#") + "#";
+
+ if (isaChain.match(/#v7R#/)) {
+ xdc.useModule('ti.sysbios.family.arm.v7r.keystone3.Hwi');
+ }
+ else if (isaChain.match(/#v8A#/)) {
+ xdc.useModule('ti.sysbios.family.arm.gicv3.Hwi');
+ }
+
+ xdc.useModule("ti.sdo.ipc.Notify");
+ xdc.useModule('ti.sdo.ipc.family.am65xx.NotifySetup');
+
+ /* initialize procIdTable */
+ TableInit.initProcId(this);
+
+ /* Initialize mailboxTable */
+ TableInit.generateTable(this);
+
+ if (isaChain.match(/#v7R#/)) {
+
+ if (this.mailboxBaseAddr[0] == undefined) {
+ this.mailboxBaseAddr[0] = NAVSS_MAILBOX0_CLUSTER0_BASEADDR; /* NAVSS Mailbox 0 */
+ }
+ if (this.mailboxBaseAddr[1] == undefined) {
+ this.mailboxBaseAddr[1] = NAVSS_MAILBOX0_CLUSTER1_BASEADDR; /* NAVSS Mailbox 1 */
+ }
+ if (this.mailboxBaseAddr[2] == undefined) {
+ this.mailboxBaseAddr[2] = NAVSS_MAILBOX0_CLUSTER2_BASEADDR; /* NAVSS Mailbox 2 */
+ }
+ }
+ else {
+ throw("Invalid target: " + Program.build.target.$name);
+ }
+}
+
+
+/*
+ * ======== module$static$init ========
+ * Initialize the target state object.
+ */
+function module$static$init(state, mod)
+{
+
+ for (var i = 0; i < state.drvHandles.length; i++) {
+ state.drvHandles[i] = null;
+ }
+
+ if (isaChain.match(/#v7R#/)) {
+ }
+ else if (isaChain.match(/#v8A#/)) {
+ }
+ else {
+ throw("Invalid target: " + Program.build.target.$name);
+ }
+}
+
+/*
+ *************************************************************************
+ * ROV View functions
+ *************************************************************************
+ */
+
+/*
+ * ======== viewInitBasic ========
+ * Initizalize the 'Basic' ROV view. Called once per instance.
+ *
+ * view = instance of 'struct NotifyDriverMbx.BasicView'
+ */
+function viewInitBasic(view, obj)
+{
+ var Program = xdc.useModule('xdc.rov.Program');
+ var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
+
+ /* view.remoteProc */
+ try {
+ view.remoteProc = MultiProc.getName$view(obj.remoteProcId);
+ }
+ catch (e) {
+ Program.displayError(view, 'remoteProc',
+ "Problem retrieving proc name: " + e);
+ }
+}
+
+/*
+ * ======== viewInitMailbox ========
+ * Initizalize the 'Mailbox' ROV view. Called once per instance.
+ *
+ * view = instance of 'struct xdc.rov.Program.InstDataView'
+ */
+function viewInitMailbox(view, obj)
+{
+ var Program = xdc.useModule('xdc.rov.Program');
+ var ScalarStructs = xdc.useModule('xdc.rov.support.ScalarStructs');
+ var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
+ var modCfg = Program.getModuleConfig(
+ 'ti.sdo.ipc.family.am65xx.NotifyDriverMbx');
+
+ /* view.label (use remote processor name) */
+ try {
+ view.label = MultiProc.getName$view(obj.remoteProcId);
+ }
+ catch (e) {
+ Program.displayError(view, 'remoteProcId',
+ "Problem retrieving proc name: " + e);
+ }
+
+ /* create an array to hold the instance data table */
+ var dataTable = new Array();
+ var mailbox = ["Inbound", "Outbound"];
+
+ for (var i = 0; i < mailbox.length; i++) {
+
+ /* create the view element */
+ var elem = Program.newViewStruct(
+ 'ti.sdo.ipc.family.am65xx.NotifyDriverMbx', 'Mailbox');
+
+ /* elem.direction (make a descriptive label) */
+ if (mailbox[i] == "Inbound") {
+ elem.direction = mailbox[i] + " (from " + view.label + ")";
+ }
+ else if (mailbox[i] == "Outbound") {
+ elem.direction = mailbox[i] + " (to " + view.label + ")";
+ }
+ else {
+ throw new Error("invalid mailbox type");
+ }
+
+ /* elem.mailboxAddr */
+ var selfVirtId = modCfg.procIdTable[MultiProc.self$view()];
+ var idx;
+
+ if (mailbox[i] == "Inbound") {
+ idx = (obj.remoteVirtId * modCfg.NUM_CORES) + selfVirtId;
+ }
+ else if (mailbox[i] == "Outbound") {
+ idx = (selfVirtId * modCfg.NUM_CORES) + obj.remoteVirtId;
+ }
+ else {
+ throw new Error("invalid mailbox type");
+ }
+
+ var baseAddrIdx = (modCfg.mailboxTable[idx] >> 16) & 0xFFFF;
+ var mailboxAddr = modCfg.mailboxBaseAddr[baseAddrIdx];
+ elem.mailboxAddr = "0x" + Number(mailboxAddr).toString(16);
+
+ /* elem.subMbxId */
+ elem.subMbxId = modCfg.mailboxTable[idx] & 0xFF;
+
+ /* elem.msgCount */
+ try {
+ var MAILBOX_STATUS_IN = Program.fetchStruct(
+ ScalarStructs.S_Bits32$fetchDesc,
+ mailboxAddr + 0xC0 + (0x4 * elem.subMbxId), false);
+ elem.msgCount = MAILBOX_STATUS_IN.elem;
+ }
+ catch (e) {
+ Program.displayError(view, 'msgCount',
+ "Problem retrieving messsage count: " + e);
+ }
+
+ /* elem.mbxInterrupt */
+ elem.mbxInterrupt = (modCfg.mailboxTable[idx] >> 8) & 0xFF;
+
+ /* add the element to the instance data table */
+ dataTable.push(elem);
+ }
+
+ /* view.elements */
+ view.elements = dataTable;
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/NotifySetup.c b/packages/ti/sdo/ipc/family/am65xx/NotifySetup.c
--- /dev/null
@@ -0,0 +1,561 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== NotifySetup.c ========
+ */
+#include <xdc/std.h>
+#include <xdc/runtime/Assert.h>
+#include <xdc/runtime/Error.h>
+#include <xdc/runtime/Startup.h>
+
+#include <ti/sdo/ipc/_Notify.h>
+#include <ti/sdo/ipc/family/am65xx/NotifyDriverMbx.h>
+#include <ti/sdo/ipc/notifyDrivers/NotifyDriverShm.h>
+#include <ti/sdo/utils/_MultiProc.h>
+
+#if defined(xdc_target__isaCompatible_v7R)
+
+#include <ti/sysbios/BIOS.h>
+#include <ti/sysbios/family/arm/v7r/keystone3/Hwi.h>
+#include <ti/sysbios/family/arm/v7r/keystone3/Core.h>
+
+#elif defined(xdc_target__isaCompatible_v8A)
+#include <ti/sysbios/family/arm/gicv3/Hwi.h>
+#else
+#error Invalid target
+#endif
+
+#include "package/internal/NotifySetup.xdc.h"
+
+
+#define EVENT_GROUP_SIZE 32
+
+/* register access methods */
+#define REG16(A) (*(volatile UInt16 *)(A))
+#define REG32(A) (*(volatile UInt32 *)(A))
+
+/* ipc helper macros */
+#define MAILBOX_REG_VAL(m) (0x1 << (2 * (m)))
+
+#define VIRTID(procId) (NotifySetup_procIdTable[(procId)])
+
+#define MBX_BASEADDR_IDX(idx) ((NotifySetup_mailboxTable[(idx)] >> 16) & 0xFFFF)
+
+#define MBX_USER_IDX(idx) ((NotifySetup_mailboxTable[(idx)] >> 8) & 0xFF)
+
+#define SUBMBX_IDX(idx) (NotifySetup_mailboxTable[(idx)] & 0xFF)
+
+#define MAILBOX_ADDR(idx) \
+ (NotifySetup_mailboxBaseAddr[MBX_BASEADDR_IDX(idx)])
+
+#define MAILBOX_STATUS(idx) \
+ (MAILBOX_ADDR((idx)) + 0xC0 + (0x4 * SUBMBX_IDX((idx))))
+
+#define MAILBOX_IRQENABLE_SET(idx) \
+ (MAILBOX_ADDR((idx)) + 0x108 + (0x10 * MBX_USER_IDX((idx))))
+
+#define MBOX_IRQ_ENABLE(idx) \
+ ((REG32(MAILBOX_IRQENABLE_SET((idx))) & \
+ MAILBOX_REG_VAL(SUBMBX_IDX((idx)))) != 0)
+
+#define MBOX_MSG_COUNT(idx) (REG32(MAILBOX_STATUS((idx))))
+
+#define M2M_LVL_INT_RTR_BASE 0x00A10000
+#define M2M_LV_INT_ICR0_OFFSET 0x4
+#define NAVSS_INT_RTR_BASE 0x310E0000
+#define NAVSS_INT_ICR0_OFFSET 0x4
+
+/* Corresponds to VIM: 160 */
+#define M2M_LVL_INT_RTR_OUTPUT_R5F0_0 0
+/* Corresponds to VIM: 161 */
+#define M2M_LVL_INT_RTR_OUTPUT_R5F0_1 1
+/* Corresponds to VIM: 162 */
+#define M2M_LVL_INT_RTR_OUTPUT_R5F1_0 2
+/* Corresponds to VIM: 163 */
+#define M2M_LVL_INT_RTR_OUTPUT_R5F1_1 3
+
+#define NAVSS_INT_RTR_INPUT_MAILBOX0_USER0 436
+#define NAVSS_INT_RTR_INPUT_MAILBOX0_USER1 437
+
+#define NAVSS_INT_RTR_INPUT_MAILBOX1_USER0 432
+#define NAVSS_INT_RTR_INPUT_MAILBOX1_USER1 433
+
+#define NAVSS_INT_RTR_INPUT_MAILBOX2_USER0 428
+#define NAVSS_INT_RTR_INPUT_MAILBOX2_USER1 429
+
+/* Corresponds to GIC: 496 */
+#define NAVSS_INT_RTR_OUTPUT_A53_0 112
+/* Corresponds to GIC: 497 */
+#define NAVSS_INT_RTR_OUTPUT_A53_1 113
+
+#define NAVSS_INT_RTR_OUTPUT_R5F0_0 120
+#define NAVSS_INT_RTR_OUTPUT_R5F1_0 121
+#define NAVSS_INT_RTR_OUTPUT_R5F0_1 122
+#define NAVSS_INT_RTR_OUTPUT_R5F1_1 123
+
+/* The following INPUT is connected to NAVSS OUTPUT 120 */
+#define M2M_LVL_INT_RTR_INPUT_A53_PEND_120 184
+/* The following INPUT is connected to NAVSS OUTPUT 121 */
+#define M2M_LVL_INT_RTR_INPUT_A53_PEND_121 185
+
+/* The following INPUT is connected to NAVSS OUTPUT 122 */
+#define M2M_LVL_INT_RTR_INPUT_A53_PEND_122 186
+/* The following INPUT is connected to NAVSS OUTPUT 123 */
+#define M2M_LVL_INT_RTR_INPUT_A53_PEND_123 187
+
+static inline void connect_m2m_lvl_int_rtr(UInt32 input_evt, UInt32 output_line)
+{
+#ifdef INTERRUPT_ROUTING_THROUGH_DMSC
+ /* TODO: Need to add code to configure routing through DMSC */
+#else
+ /* TODO: Eventually the interrupt routing below cannot be done
+ * directly. Need to go through DMSC. Currently this is done
+ * directly to help Pre-silicon testing
+ */
+ *((UInt32 *)(M2M_LVL_INT_RTR_BASE + M2M_LV_INT_ICR0_OFFSET) + output_line) = input_evt;
+#endif
+}
+
+static inline void connect_navss_int_rtr(UInt32 input_evt, UInt32 output_line)
+{
+#ifdef INTERRUPT_ROUTING_THROUGH_DMSC
+ /* TODO: Need to add code to configure routing through DMSC */
+#else
+ /* TODO: Eventually the interrupt routing below cannot be done
+ * directly. Need to go through DMSC. Currently this is done
+ * directly to help Pre-silicon testing
+ */
+ *((UInt32 *)(NAVSS_INT_RTR_BASE + NAVSS_INT_ICR0_OFFSET) + output_line) = input_evt;
+#endif
+}
+
+/*
+ *************************************************************************
+ * Module functions
+ *************************************************************************
+ */
+
+/*
+ * ======== NotifySetup_Module_startup ========
+ */
+Int NotifySetup_Module_startup(Int phase)
+{
+#if defined(xdc_target__isaCompatible_v7R)
+ /* connect mailbox interrupts at startup */
+ if ((Core_getId() == 0)) {
+ /* R5F-0 */
+ /* Navss mailbox 0 User 1 */
+ /* Configure NAVSS interrupt router */
+ connect_navss_int_rtr(NAVSS_INT_RTR_INPUT_MAILBOX0_USER1,
+ NAVSS_INT_RTR_OUTPUT_R5F0_0);
+ /* Configure MCU level interrupt router */
+ connect_m2m_lvl_int_rtr(M2M_LVL_INT_RTR_INPUT_A53_PEND_120,
+ M2M_LVL_INT_RTR_OUTPUT_R5F0_0);
+
+ /* plug mbx2 only if R5F-1 exists */
+ if ((MultiProc_getId("R5F-1") != MultiProc_INVALIDID)) {
+ /* Navss mailbox 2 User 0 */
+ /* Configure NAVSS interrupt router */
+ connect_navss_int_rtr(NAVSS_INT_RTR_INPUT_MAILBOX2_USER0,
+ NAVSS_INT_RTR_OUTPUT_R5F0_1);
+ /* Configure MCU level interrupt router */
+ connect_m2m_lvl_int_rtr(M2M_LVL_INT_RTR_INPUT_A53_PEND_121,
+ M2M_LVL_INT_RTR_OUTPUT_R5F0_1);
+ }
+ }
+ else { /* R5F-1 */
+ /* Navss mailbox 1 User 1 */
+ /* Configure NAVSS interrupt router */
+ connect_navss_int_rtr(NAVSS_INT_RTR_INPUT_MAILBOX1_USER1,
+ NAVSS_INT_RTR_OUTPUT_R5F1_0);
+ /* Configure MCU level interrupt router */
+ connect_m2m_lvl_int_rtr(M2M_LVL_INT_RTR_INPUT_A53_PEND_122,
+ M2M_LVL_INT_RTR_OUTPUT_R5F1_1);
+
+ /* plug mbx2 only if R5F-0 exists */
+ if ((MultiProc_getId("R5F-0") != MultiProc_INVALIDID)) {
+ /* Navss mailbox 2 User 1 */
+ /* Configure NAVSS interrupt router */
+ connect_navss_int_rtr(NAVSS_INT_RTR_INPUT_MAILBOX2_USER1,
+ NAVSS_INT_RTR_OUTPUT_R5F1_1);
+ /* Configure MCU level interrupt router */
+ connect_m2m_lvl_int_rtr(M2M_LVL_INT_RTR_INPUT_A53_PEND_123,
+ M2M_LVL_INT_RTR_OUTPUT_R5F1_1);
+ }
+ }
+ return (Startup_DONE);
+
+#elif defined(xdc_target__isaCompatible_v8A)
+ /* Navss mailbox 0 User 0 */
+ /* Configure NAVSS interrupt router */
+ connect_navss_int_rtr(NAVSS_INT_RTR_INPUT_MAILBOX0_USER0,
+ NAVSS_INT_RTR_OUTPUT_A53_0);
+ /* Navss mailbox 1 User 0 */
+ /* Configure NAVSS interrupt router */
+ connect_navss_int_rtr(NAVSS_INT_RTR_INPUT_MAILBOX1_USER0,
+ NAVSS_INT_RTR_OUTPUT_A53_1);
+ return (Startup_DONE);
+
+#else
+#error Invalid target
+#endif
+}
+
+/*
+ * ======== NotifySetup_interruptTable ========
+ */
+UInt16 NotifySetup_interruptTable(Int srcVirtId)
+{
+ return (NotifySetup_module->interruptTable[srcVirtId]);
+}
+
+/*
+ * ======== NotifySetup_attach ========
+ * Create driver instance specified at config time.
+ *
+ * This functions is generated by the NotifySetup.xdt template.
+ */
+
+/*
+ * ======== NotifySetup_sharedMemReq ========
+ * Compute how much shared memory is required by the driver.
+ *
+ * This functions is generated by the NotifySetup.xdt template.
+ */
+
+/*
+ * ======== NotifySetup_numIntLines ========
+ * Return number of available interrupt lines to the current processor.
+ */
+UInt16 NotifySetup_numIntLines(UInt16 remoteProcId)
+{
+ return (1);
+}
+
+/*
+ * ======== NotifySetup_driverType ========
+ * Find driver type for given connection.
+ *
+ * Search the connection array for the given remote processor. If
+ * found, return the requested notify driver type.
+ */
+NotifySetup_Driver NotifySetup_driverType(UInt16 remoteProcId)
+{
+ Int i;
+ NotifySetup_Driver driver = NotifySetup_Driver_SHAREDMEMORY;
+
+ /* look for remote processor in connection array */
+ for (i = 0; i < NotifySetup_module->connAry.length; i++) {
+ if (remoteProcId == NotifySetup_module->connAry.elem[i].procId) {
+ driver = NotifySetup_module->connAry.elem[i].driver;
+ break;
+ }
+ }
+
+ return (driver);
+}
+
+/*
+ * ======== NotifySetup_plugHwi ========
+ */
+Void NotifySetup_plugHwi(UInt16 remoteProcId, Int cpuIntrNum,
+ NotifySetup_DriverIsr isr)
+{
+ Error_Block eb;
+ UInt key;
+ Hwi_Params hwiParams;
+ UInt16 srcVirtId;
+#if defined(xdc_target__isaCompatible_v7R) \
+ || defined(xdc_target__isaCompatible_v8A)
+ UInt16 idx;
+ UInt mbxIdx;
+#endif
+
+ Error_init(&eb);
+
+ /* disable interrupts */
+ key = Hwi_disable();
+
+ /* map remote processor id to virtual id */
+ srcVirtId = VIRTID(remoteProcId);
+
+ /* save driver ISR in dispatch table */
+ NotifySetup_module->isrDispatchTable[srcVirtId] = isr;
+
+#if defined(xdc_target__isaCompatible_v7R) \
+ || defined(xdc_target__isaCompatible_v8A)
+
+ /* compute table index for given source and destination */
+ idx = (srcVirtId * NotifySetup_NUM_CORES) + VIRTID(MultiProc_self());
+
+ /* compute mailbox index */
+ mbxIdx = MBX_BASEADDR_IDX(idx);
+
+ /* make sure the interrupt is plugged only once */
+ NotifySetup_module->numPlugged[mbxIdx]++;
+
+ if (NotifySetup_module->numPlugged[mbxIdx] == 1) {
+
+ Hwi_Params_init(&hwiParams);
+ hwiParams.maskSetting = Hwi_MaskingOption_LOWER;
+ hwiParams.arg = cpuIntrNum;
+
+ Hwi_create(cpuIntrNum, NotifySetup_dispatchIsr, &hwiParams, &eb);
+ /* TODO: add error handling */
+
+ Hwi_enableInterrupt(cpuIntrNum);
+ }
+
+#else
+#error Invalid target
+#endif
+
+ /* restore interrupts */
+ Hwi_restore(key);
+}
+
+/*
+ * ======== NotifySetup_unplugHwi ========
+ */
+Void NotifySetup_unplugHwi(UInt16 remoteProcId, Int cpuIntrNum)
+{
+ UInt key;
+ Hwi_Handle hwi;
+ UInt16 srcVirtId;
+#if defined(xdc_target__isaCompatible_v7R) \
+ || defined(xdc_target__isaCompatible_v8A)
+ UInt16 idx;
+ UInt mbxIdx;
+#endif
+
+ /* disable global interrupts (TODO: should be a gated module) */
+ key = Hwi_disable();
+
+ /* map processor id to virtual id */
+ srcVirtId = VIRTID(remoteProcId);
+
+ /* remove driver isr from dispatch table */
+ NotifySetup_module->isrDispatchTable[srcVirtId] = NULL;
+
+#if defined(xdc_target__isaCompatible_v7R) \
+ || defined(xdc_target__isaCompatible_v8A)
+
+ /* decrement plug count */
+ idx = (srcVirtId * NotifySetup_NUM_CORES) + VIRTID(MultiProc_self());
+ mbxIdx = MBX_BASEADDR_IDX(idx);
+ NotifySetup_module->numPlugged[mbxIdx]--;
+
+ /* unplug interrupt if last user */
+ if (NotifySetup_module->numPlugged[0] == 0) {
+ hwi = Hwi_getHandle(cpuIntrNum);
+ Hwi_delete(&hwi);
+ }
+
+#else
+#error Invalid target
+#endif
+
+ /* restore global interrupts */
+ Hwi_restore(key);
+}
+
+/*
+ * ======== NotifySetup_Shm_attach ========
+ */
+Int NotifySetup_Shm_attach(UInt16 remoteProcId, Ptr sharedAddr)
+{
+ NotifyDriverShm_Params notifyShmParams;
+ NotifyDriverShm_Handle shmDrvHandle;
+ ti_sdo_ipc_Notify_Handle notifyHandle;
+ Int status = Notify_S_SUCCESS;
+ Error_Block eb;
+
+ Error_init(&eb);
+
+ NotifyDriverShm_Params_init(¬ifyShmParams);
+ notifyShmParams.sharedAddr = sharedAddr;
+ notifyShmParams.remoteProcId = remoteProcId;
+
+ /* create the notify driver instance */
+ shmDrvHandle = NotifyDriverShm_create(¬ifyShmParams, &eb);
+
+ if (shmDrvHandle == NULL) {
+ return (Notify_E_FAIL);
+ }
+
+ /* create the front-end notify instance */
+ notifyHandle = ti_sdo_ipc_Notify_create(
+ NotifyDriverShm_Handle_upCast(shmDrvHandle), remoteProcId, 0,
+ NULL, &eb);
+
+ if (notifyHandle == NULL) {
+ NotifyDriverShm_delete(&shmDrvHandle);
+ status = Notify_E_FAIL;
+ }
+
+ return (status);
+}
+
+/*!
+ * ======== NotifySetup_Shm_sharedMemReq ========
+ */
+SizeT NotifySetup_Shm_sharedMemReq(UInt16 remoteProcId, Ptr sharedAddr)
+{
+ SizeT memReq;
+ NotifyDriverShm_Params notifyShmParams;
+
+ NotifyDriverShm_Params_init(¬ifyShmParams);
+ notifyShmParams.sharedAddr = sharedAddr;
+
+ memReq = NotifyDriverShm_sharedMemReq(¬ifyShmParams);
+
+ return (memReq);
+}
+
+/*
+ * ======== NotifySetup_Mbx_attach ========
+ */
+Int NotifySetup_Mbx_attach(UInt16 remoteProcId, Ptr sharedAddr)
+{
+ Int status = Notify_S_SUCCESS;
+ NotifyDriverMbx_Params params;
+ NotifyDriverMbx_Handle driver;
+ ti_sdo_ipc_Notify_Handle notify;
+ UInt16 virtId;
+ Error_Block eb;
+
+ Error_init(&eb);
+
+ NotifyDriverMbx_Params_init(¶ms);
+ params.remoteProcId = remoteProcId;
+
+ /* set the intVectorId if on the R5F */
+ if ((MultiProc_self() == NotifySetup_r5f_0ProcId) ||
+ (MultiProc_self() == NotifySetup_r5f_1ProcId)) {
+
+ virtId = VIRTID(remoteProcId);
+ params.intVectorId = NotifySetup_module->interruptTable[virtId];
+ }
+
+ /* set the intVectorId if on the HOST */
+ if (MultiProc_self() == NotifySetup_hostProcId) {
+ virtId = VIRTID(remoteProcId);
+ params.intVectorId = NotifySetup_module->interruptTable[virtId];
+ }
+
+ /* create the notify driver instance */
+ driver = NotifyDriverMbx_create(¶ms, &eb);
+
+ if (driver == NULL) {
+ return (Notify_E_FAIL);
+ }
+
+ /* create the front-end notify instance */
+ notify = ti_sdo_ipc_Notify_create(NotifyDriverMbx_Handle_upCast(driver),
+ remoteProcId, 0, NULL, &eb);
+
+ if (notify == NULL) {
+ NotifyDriverMbx_delete(&driver);
+ status = Notify_E_FAIL;
+ }
+
+ return (status);
+}
+
+/*!
+ * ======== NotifySetup_Mbx_sharedMemReq ========
+ */
+SizeT NotifySetup_Mbx_sharedMemReq(UInt16 remoteProcId, Ptr sharedAddr)
+{
+ SizeT memReq = 0;
+
+ return (memReq);
+}
+
+/*
+ *************************************************************************
+ * Internal functions
+ *************************************************************************
+ */
+
+/*
+ * ======== NotifySetup_dispatchIsr ========
+ * Dispatch the current interrupt to the appropriate notify driver
+ *
+ * The given interrupt may be shared by multiple notify drivers. This
+ * ISR inspects the mailbox which raised the interrupt and looks for
+ * all FIFOs which have data and raise the given interrupt. For each
+ * one, the interrupt is dispatched to the registered driver for that
+ * FIFO.
+ *
+ * @param(arg) The eventId which raised the interrupt.
+ */
+Void NotifySetup_dispatchIsr(UArg arg)
+{
+ Int numProcessed;
+ UInt16 idx;
+ UInt16 srcVirtId;
+ UInt16 dstVirtId = VIRTID(MultiProc_self());
+ NotifySetup_DriverIsr driver;
+
+ do {
+ numProcessed = 0;
+
+ for (srcVirtId = 0; srcVirtId < NotifySetup_NUM_CORES; srcVirtId++) {
+
+ /* skip null drivers, processor not in system or self */
+ driver = NotifySetup_module->isrDispatchTable[srcVirtId];
+
+ if (driver == NULL) {
+ continue;
+ }
+
+ /* check if processor would raise the given hardware eventId */
+ if (arg == NotifySetup_module->interruptTable[srcVirtId]) {
+
+ /* compute table index for given source and destination */
+ idx = (srcVirtId * NotifySetup_NUM_CORES) + dstVirtId;
+
+ /* check if submailbox has a message and irq is enabled */
+ if ((MBOX_MSG_COUNT(idx) != 0) && MBOX_IRQ_ENABLE(idx)) {
+
+ /* invoke driver isr to deliver the event */
+ (*driver)(idx);
+
+ /* event has been delivered */
+ numProcessed++;
+ }
+ }
+ }
+ } while (numProcessed != 0);
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/NotifySetup.xdc b/packages/ti/sdo/ipc/family/am65xx/NotifySetup.xdc
--- /dev/null
@@ -0,0 +1,407 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== NotifySetup.xdc ========
+ */
+
+package ti.sdo.ipc.family.am65xx;
+
+import xdc.runtime.Assert;
+import ti.sdo.utils.MultiProc;
+
+/*!
+ * ======== NotifySetup ========
+ * Notify driver setup proxy for Vayu
+ *
+ * This module creates and registers the IPC Notify drivers for the AM65XX
+ * device family. There are two types of notify drivers available: 1) shared
+ * memory driver, and 2) mailbox driver. Use the {@link #connections}
+ * configuration parameter to select which driver to use for communicating
+ * with each remote processor.
+ *
+ * The shared memory notify driver is the default driver. It implements the
+ * full Notify API set. This driver uses memory for passing the notify
+ * payload between processors. The memory is allocated from SharedRegion #0.
+ *
+ * The mailbox notify driver uses hardware FIFOs for passing the notify
+ * payload between processors. No shared memory is required. However, this
+ * driver does not implement the full Notify API set. For example, the
+ * `Notify_sendEvent()` API will never return `Notify_E_EVTNOTREGISTERED`
+ * because it does not track this information.
+ *
+ * When configuring the notify driver, you specify which driver to use
+ * for communicating to each remote processor. If not configured, the
+ * shared memory driver will be used by default. Both sides of each connection
+ * must use the same driver. This is an easy mistake to make and there is
+ * no way to check this.
+ *
+ * This module is primarily used by notify driver authors. It is not expected
+ * that any application would ever use this module in its runtime code.
+ * The typical use of this module is simply to configure which notify driver
+ * to use. See the following example for details.
+ *
+ * @a(Configuration Example)
+ *
+ * The following is a three processor example: HOST DSP1 EVE1. In this
+ * example, HOST and DSP1 will communicate using the shared memory driver
+ * and DSP1 and EVE1 will communicate using the mailbox driver. This example
+ * explicitly configures the shared memory driver for HOST and DSP1, but
+ * this is strictly not necessary. If left unconfigured, the shared memory
+ * driver would be used as the default. Also, the connection between HOST
+ * and EVE1 is left undefined as we don't expect to use this connection.
+ *
+ * Notice that each connection configuration specifies the remote processor
+ * name and the driver type. This is how the local processor declares which
+ * driver it will use when communicating to that remote processor. The
+ * corresponding configuration on the remote processor must be complimentary.
+ *
+ * Add the following to your HOST configuration script.
+ *
+ * @p(code)
+ * // configure the notify driver
+ * var NotifySetup = xdc.useModule('ti.sdo.ipc.family.am65xx.NotifySetup');
+ *
+ * NotifySetup.connections.$add(
+ * new NotifySetup.Connection({
+ * driver: NotifySetup.Driver_SHAREDMEMORY,
+ * procName: "DSP1"
+ * })
+ * );
+ * @p
+ * Add the following to your DSP1 configuration script.
+ *
+ * @p(code)
+ * // configure the notify driver
+ * var NotifySetup = xdc.useModule('ti.sdo.ipc.family.am65xx.NotifySetup');
+ *
+ * NotifySetup.connections.$add(
+ * new NotifySetup.Connection({
+ * driver: NotifySetup.Driver_SHAREDMEMORY,
+ * procName: "HOST"
+ * })
+ * );
+ *
+ * NotifySetup.connections.$add(
+ * new NotifySetup.Connection({
+ * driver: NotifySetup.Driver_MAILBOX,
+ * procName: "EVE1"
+ * })
+ * );
+ * @p
+ * Add the following to your EVE1 configuration script.
+ *
+ * @p(code)
+ * // configure the notify driver
+ * var NotifySetup = xdc.useModule('ti.sdo.ipc.family.am65xx.NotifySetup');
+ *
+ * NotifySetup.connections.$add(
+ * new NotifySetup.Connection({
+ * driver: NotifySetup.Driver_MAILBOX,
+ * procName: "DSP1"
+ * })
+ * );
+ * @p
+ */
+
+@ModuleStartup
+@Template("./NotifySetup.xdt")
+
+module NotifySetup inherits ti.sdo.ipc.interfaces.INotifySetup
+{
+ /*! @_nodoc
+ * ======== DriverIsr ========
+ * Notify driver isr function type definition
+ * param1 = mailbox table index
+ */
+ typedef Void (*DriverIsr)(UInt16);
+
+ /*!
+ * ======== Driver ========
+ * Define the available notify drivers
+ *
+ * For any given connection to a remote processor, one of the
+ * following notify driver types may be used. Each driver has
+ * different characteristics and system requirements.
+ *
+ * @p(html)
+ * <div class="xdocText"><dl>
+ * <dt>Driver_SHAREDMEMORY</dt>
+ * <dd>
+ * This driver uses shared memory for passing the notify payload
+ * between processors. Additional state is also stored in the
+ * shared memory.<br><br>
+ *
+ * There is a separate, cache-aligned block of memory for each
+ * event number. This is necessary to maintain cache coherency.
+ * However, this requires a non-trivial amount of memory.<br><br>
+ * </dd>
+ *
+ * <dt>Driver_MAILBOX</dt>
+ * <dd>
+ * This driver uses a hardware FIFO (provided by the hardware
+ * mailbox) to pass the notify payload between processors. No
+ * shared memory is required by this driver.<br><br>
+ *
+ * This driver does not support the full Notify API set. This
+ * driver has lower delivery latency when compard to the shared
+ * memory driver.<br><br>
+ * </dd>
+ * </dl>
+ * @p
+ */
+ enum Driver {
+ Driver_SHAREDMEMORY = 0x01, /*! shared memory driver */
+ Driver_MAILBOX = 0x02 /*! hardware mailbox driver */
+ };
+
+ /*!
+ * ======== Connection ========
+ * Define a notify driver connection
+ *
+ * Each IPC connection is defined by two end-points: the local
+ * processor and the remote processor. Each connection supports
+ * only one type of notify driver. In other words, both ends of
+ * the connection must configure the same notify driver type.
+ *
+ * However, when a processor has multiple connections (when
+ * communicating with multiple remote processors), each connection
+ * is configured independently. Therefore, different notify drivers
+ * may be used for different connections. Currently, IPC supports
+ * only one connection for each remote processor.
+ *
+ * The configuration for a given connection must be coordinated with
+ * the remote processor. Each processor is only able to configure its
+ * local end-point for the connection. It is important that the remote
+ * processor use the same notify driver for the connection.
+ *
+ * @field(driver)
+ * The driver to be used for this connection. See the {@link #Driver}
+ * enumeration for details.
+ *
+ * @field(procName)
+ * The name of the remote processor for the given connection.
+ * @p
+ */
+ struct Connection {
+ Driver driver; /*! notify driver */
+ String procName; /*! remote processor name */
+ };
+
+ /*!
+ * ======== connections ========
+ * Configure the notify driver for each given connection
+ *
+ * Use this configuration parameter to define which notify driver
+ * is to be used when communicating with remote processors. Create
+ * one entry in this array for each connection. Each entry you create,
+ * defines the local end-point of the connection. The remote processor
+ * must have a complimentary entry in its `connections` array.
+ *
+ * Any connection which is undefined, will use the shared memory
+ * notify driver. It is not necessary to define all connections, just
+ * the ones which will not use the default.
+ *
+ * To define a local end-point connection, establish a reference to
+ * this module and add a new entry to this array.
+ *
+ * The following example show how to setup the mailbox driver for
+ * communicating from DSP1 to EVE1 and EVE2.
+ *
+ * Add the following to your DSP1 configuration script.
+ *
+ * @p(code)
+ * // configure the notify driver
+ * var NotifySetup = xdc.useModule('ti.sdo.ipc.family.am65xx.NotifySetup');
+ *
+ * NotifySetup.connections.$add(
+ * new NotifySetup.Connection({
+ * driver: NotifySetup.Driver_MAILBOX,
+ * procName: "EVE1"
+ * })
+ * );
+ *
+ * NotifySetup.connections.$add(
+ * new NotifySetup.Connection({
+ * driver: NotifySetup.Driver_MAILBOX,
+ * procName: "EVE2"
+ * })
+ * );
+ * @p
+ *
+ * Add the following to your EVE1 configuration script.
+ *
+ * @p(code)
+ * // configure the notify driver
+ * var NotifySetup = xdc.useModule('ti.sdo.ipc.family.am65xx.NotifySetup');
+ *
+ * NotifySetup.connections.$add(
+ * new NotifySetup.Connection({
+ * driver: NotifySetup.Driver_MAILBOX,
+ * procName: "DSP1"
+ * })
+ * );
+ * @p
+ *
+ * Add the following to your EVE2 configuration script.
+ *
+ * @p(code)
+ * // configure the notify driver
+ * var NotifySetup = xdc.useModule('ti.sdo.ipc.family.am65xx.NotifySetup');
+ *
+ * NotifySetup.connections.$add(
+ * new NotifySetup.Connection({
+ * driver: NotifySetup.Driver_MAILBOX,
+ * procName: "DSP1"
+ * })
+ * );
+ * @p
+ */
+ metaonly config Connection connections[length];
+
+ /*! @_nodoc
+ * ======== plugHwi ========
+ * Register an isr for the given interrupt and event.
+ *
+ * @param(remoteProcId) The MutiProc Id of the remote processor
+ * which will raise the given interrupt.
+ *
+ * @param(cpuIntrNum) The interrupt number which will be raised
+ * by the remote processor.
+ *
+ * @param(isr) The ISR which should be invoked to service the
+ * given interrupt.
+ */
+ Void plugHwi(UInt16 remoteProcId, Int cpuIntrNum, DriverIsr isr);
+
+ /*! @_nodoc
+ * ======== unplugHwi ========
+ * Unregister the isr for the given interrupt.
+ */
+ Void unplugHwi(UInt16 remoteProcId, Int cpuIntrNum);
+
+ /*! @_nodoc
+ * ======== interruptTable ========
+ * Accessor method to return interrupt id for given virtual proc id
+ */
+ UInt16 interruptTable(Int srcVirtId);
+
+internal:
+
+ /* total number of cores on Am6x SoC */
+ const UInt8 NUM_CORES = 3;
+
+ /* number of system mailboxes (used by IPC) */
+ const UInt8 NUM_SYS_MBX = 1;
+
+ /* Mailbox table for storing encoded base address, mailbox user ID,
+ * and sub-mailbox index.
+ */
+ config UInt32 mailboxTable[NUM_CORES * NUM_CORES];
+
+ /* base address table for the mailbox subsystem */
+ config UInt32 mailboxBaseAddr[NUM_SYS_MBX];
+
+ /* map procId to discrete processor/core */
+ config UInt r5f_0ProcId = MultiProc.INVALIDID; /* also used for ipu1 */
+ config UInt r5f_1ProcId = MultiProc.INVALIDID;
+ config UInt hostProcId = MultiProc.INVALIDID;
+
+ /* map MultiProc ID to virtual ID, virtId = procIdTable[procId] */
+ config UInt32 procIdTable[NUM_CORES];
+
+ /* runtime driver binding structure */
+ struct DrvBind {
+ Driver driver; /* notify driver */
+ UInt16 procId; /* remote processor ID */
+ };
+
+ /*
+ * ======== A_internal ========
+ * Internal implementation error.
+ */
+ config Assert.Id A_internal = {
+ msg: "A_internal: internal implementation error"
+ };
+
+ /*
+ * ======== driverType ========
+ */
+ Driver driverType(UInt16 remoteProcId);
+
+ /*
+ * ======== Shm_attach ========
+ */
+ Int Shm_attach(UInt16 remoteProcId, Ptr sharedAddr);
+
+ /*
+ * ======== Shm_sharedMemReq ========
+ */
+ SizeT Shm_sharedMemReq(UInt16 remoteProcId, Ptr sharedAddr);
+
+ /*
+ * ======== Mbx_attach ========
+ */
+ Int Mbx_attach(UInt16 remoteProcId, Ptr sharedAddr);
+
+ /*
+ * ======== Mbx_sharedMemReq ========
+ */
+ SizeT Mbx_sharedMemReq(UInt16 remoteProcId, Ptr sharedAddr);
+
+ /*
+ * ======== dispatchIsr ========
+ * Dispatch interrupt to notify driver instance.
+ */
+ Void dispatchIsr(UArg arg);
+
+ /*
+ * ======== Module_State ========
+ */
+ struct Module_State {
+ /* interrupt plug counter */
+ UInt16 numPlugged[];
+
+ /* connection array */
+ DrvBind connAry[length];
+
+ /* Interrupt event IDs used to communicate with this processor.
+ * This table is indexed by virtual processor ID.
+ */
+ UInt16 interruptTable[NUM_CORES];
+
+ /* Notify driver isr dispatch table. This table is indexed
+ * by virtual processor ID.
+ */
+ DriverIsr isrDispatchTable[NUM_CORES];
+ };
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/NotifySetup.xdt b/packages/ti/sdo/ipc/family/am65xx/NotifySetup.xdt
--- /dev/null
@@ -0,0 +1,97 @@
+%%{
+/*
+ * Copyright (c) 2014-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+var pkg = this.$package.$name.replace(/\./g, "_");
+
+%%}
+#include <ti/ipc/Notify.h>
+
+/*
+ * ======== `pkg`_NotifySetup_attach ========
+ */
+Int `pkg`_NotifySetup_attach(UInt16 remoteProcId, Ptr sharedAddr)
+{
+ Int status = Notify_E_FAIL;
+ `pkg`_NotifySetup_Driver driver;
+
+ driver = `pkg`_NotifySetup_driverType(remoteProcId);
+
+ switch (driver) {
+% if (this.$private.driverMask & this.Driver_SHAREDMEMORY) {
+ case `pkg`_NotifySetup_Driver_SHAREDMEMORY:
+ status = `pkg`_NotifySetup_Shm_attach(remoteProcId, sharedAddr);
+ break;
+% }
+% if (this.$private.driverMask & this.Driver_MAILBOX) {
+ case `pkg`_NotifySetup_Driver_MAILBOX:
+ status = `pkg`_NotifySetup_Mbx_attach(remoteProcId, sharedAddr);
+ break;
+% }
+ default:
+ xdc_runtime_Assert_isTrue(FALSE, `pkg`_NotifySetup_A_internal);
+ break;
+ }
+
+ return (status);
+}
+
+/*!
+ * ======== `pkg`_NotifySetup_sharedMemReq ========
+ */
+SizeT `pkg`_NotifySetup_sharedMemReq(UInt16 remoteProcId, Ptr sharedAddr)
+{
+ `pkg`_NotifySetup_Driver driver;
+ SizeT memReq = 0;
+
+ driver = `pkg`_NotifySetup_driverType(remoteProcId);
+
+ switch (driver) {
+% if (this.$private.driverMask & this.Driver_SHAREDMEMORY) {
+ case `pkg`_NotifySetup_Driver_SHAREDMEMORY:
+ memReq = `pkg`_NotifySetup_Shm_sharedMemReq(remoteProcId,
+ sharedAddr);
+ break;
+% }
+% if (this.$private.driverMask & this.Driver_MAILBOX) {
+ case `pkg`_NotifySetup_Driver_MAILBOX:
+ memReq = `pkg`_NotifySetup_Mbx_sharedMemReq(remoteProcId,
+ sharedAddr);
+ break;
+% }
+ default:
+ xdc_runtime_Assert_isTrue(FALSE, `pkg`_NotifySetup_A_internal);
+ break;
+ }
+
+ return (memReq);
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/NotifySetup.xs b/packages/ti/sdo/ipc/family/am65xx/NotifySetup.xs
--- /dev/null
@@ -0,0 +1,243 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== NotifySetup.xs ========
+ */
+var MultiProc = null;
+var Core = null;
+var Mmu = null;
+var isaChain = "";
+
+const NAVSS_MAILBOX0_BASEADDR = 0x0031F80000;
+
+/* The following are decided at the system level */
+/* The following corresponds to M2M Router output 0 */
+const R5F_0_INT_0_NO = 160;
+/* The following corresponds to M2M Router output 1 */
+const R5F_0_INT_1_NO = 161;
+/* The following corresponds to M2M Router output 2 */
+const R5F_1_INT_0_NO = 162;
+/* The following corresponds to M2M Router output 3 */
+const R5F_1_INT_1_NO = 163;
+
+/* The following corresponds to NAVSS output 112 */
+const A53_INT_0_NO = 496;
+/* The following corresponds to NAVSS output 113 */
+const A53_INT_1_NO = 497;
+
+/*
+ * ======== isMbxDrv ========
+ */
+function isMbxDrv(mod, name)
+{
+ if (mod.connections == undefined) {
+ return (false);
+ }
+
+ for (var i = 0; i < mod.connections.length; i++) {
+ if (mod.connections[i].procName == name) {
+ if (mod.connections[i].driver == mod.Driver_MAILBOX) {
+ return (true);
+ }
+ else {
+ return (false);
+ }
+ }
+ }
+
+ return (false);
+}
+
+/*
+ * ======== module$use ========
+ */
+function module$use()
+{
+ /* load modules needed in meta domain and in target domain */
+ var TableInit = xdc.useModule("ti.sdo.ipc.family.am65xx.TableInit");
+ MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
+ xdc.useModule('xdc.runtime.Assert');
+ xdc.useModule('xdc.runtime.Error');
+ xdc.useModule('xdc.runtime.Startup');
+
+ /* concatinate isa chain into single string for easier matching */
+ isaChain = "#" + Program.build.target.getISAChain().join("#") + "#";
+
+ if (isaChain.match(/#v7R#/)) {
+ xdc.useModule("ti.sysbios.BIOS");
+ Core = xdc.useModule("ti.sysbios.family.arm.v7r.keystone3.Core");
+ xdc.useModule('ti.sysbios.family.arm.v7r.keystone3.Hwi');
+ }
+ else if (isaChain.match(/#v8A#/)) {
+ Mmu = xdc.useModule("ti.sysbios.family.arm.v8a.Mmu");
+ xdc.useModule('ti.sysbios.family.arm.gicv3.Hwi');
+ }
+
+ /* initialize procIdTable */
+ TableInit.initProcId(this);
+
+ /* initialize mailboxTable */
+ TableInit.generateTable(this);
+
+ if (isaChain.match(/#v7R#/)) {
+ if (this.mailboxBaseAddr[0] == undefined) {
+ /* TODO: NAVSS_MAILBOX0_BASEADDR is address from main domain memory map
+ * Need to find any addresss translation involved for v7R */
+ this.mailboxBaseAddr[0] = NAVSS_MAILBOX0_BASEADDR; /* System Mailbox 0 */
+ }
+ }
+ else if (isaChain.match(/#v8A#/)) {
+ /* initialize mailbox base address table */
+ /* TODO: NAVSS_MAILBOX0_BASEADDR is address from main domain memory map
+ * Need to find any addresss translation involved for v8A */
+ this.mailboxBaseAddr[0] = NAVSS_MAILBOX0_BASEADDR; /* System Mailbox 0 */
+ }
+ else {
+ throw("Invalid target: " + Program.build.target.$name);
+ }
+
+ if (isaChain.match(/#v8A#/)) {
+if (0) {
+ /* TODO: Need to review if any MMU entry need to be added */
+ /* Add mailbox addresses to the Mmu table.
+ * Force mailbox addresses to be NON cacheable.
+ */
+ var peripheralAttrs = {
+ type : Mmu.DescriptorType_BLOCK, // BLOCK descriptor
+ accPerm : 0, // read/write at PL1
+ noExecute : true, // not executable
+ attrIndx : 1 // MAIR0 Byte1 describes mem attr
+ };
+
+ /* configure the corresponding MMU page descriptor */
+ Mmu.setSecondLevelDescMeta(0x42000000, 0x42000000, peripheralAttrs);
+ Mmu.setSecondLevelDescMeta(0x42200000, 0x42200000, peripheralAttrs);
+ Mmu.setSecondLevelDescMeta(0x48800000, 0x48800000, peripheralAttrs);
+}
+ }
+
+ /* determine which notify drivers to include */
+ this.$private.driverMask = 0;
+
+ /* for unspecfied connections, the default is shared memory */
+ if (this.connections.length < (MultiProc.numProcessors - 1)) {
+ this.$private.driverMask |= this.Driver_SHAREDMEMORY;
+ }
+
+ /* remember which notify drivers have been specified */
+ for (var i = 0; i < this.connections.length; i++) {
+ if (this.connections[i].driver == this.Driver_SHAREDMEMORY) {
+ this.$private.driverMask |= this.Driver_SHAREDMEMORY;
+ }
+ if (this.connections[i].driver == this.Driver_MAILBOX) {
+ this.$private.driverMask |= this.Driver_MAILBOX;
+ }
+ }
+
+ /* If Notify module is already used, then load notify drivers into
+ * configuration model. Do *not* useModule the Notify module. Some
+ * applications require this notify driver but do *not* want the
+ * ti.sdo.ipc package to be loaded.
+ */
+ if (xdc.module('ti.sdo.ipc.Notify').$used) {
+ if (this.$private.driverMask & this.Driver_SHAREDMEMORY) {
+ xdc.useModule('ti.sdo.ipc.notifyDrivers.NotifyDriverShm');
+ }
+ if (this.$private.driverMask & this.Driver_MAILBOX) {
+ xdc.useModule('ti.sdo.ipc.family.am65xx.NotifyDriverMbx');
+ }
+ }
+}
+
+/*
+ * ======== module$static$init ========
+ * Initialize the target state object.
+ */
+function module$static$init(state, mod)
+{
+ var procId;
+
+ /* Initialize the state connAry from the config params. Translate
+ * processor names into IDs for better runtime performance.
+ */
+ state.connAry.length = mod.connections.length;
+
+ for (var i = 0; i < mod.connections.length; i++) {
+ procId = MultiProc.getIdMeta(mod.connections[i].procName);
+ state.connAry[i].procId = procId;
+ state.connAry[i].driver = mod.connections[i].driver;
+ }
+
+ if (isaChain.match(/#v7R#/)) {
+ state.numPlugged.length =mod.NUM_SYS_MBX;
+ for (var i = 0; i < state.numPlugged.length; i++) {
+ state.numPlugged[i] = 0;
+ }
+
+ if (Core.id == 0) {
+ state.interruptTable[0] = 0; /* R5F-0 */
+ state.interruptTable[1] = R5F_0_INT_0_NO; /* HOST */
+ state.interruptTable[2] = R5F_0_INT_1_NO; /* R5F-1 */
+if (0) { /* TODO: Understanding is this is not needed; Need to check */
+ var mbxDrv = isMbxDrv(mod, "R5F-1");
+ state.interruptTable[2] = mbxDrv ? 69 : 19; /*R5F-1 */
+}
+ } else {
+if (0) { /* TODO: Understanding is this is not needed; Need to check */
+ var mbxDrv = isMbxDrv(mod, "R5F-0");
+ state.interruptTable[0] = mbxDrv ? 76 : 19; /* R5F-0 */
+}
+ state.interruptTable[0] = R5F_1_INT_0_NO; /* HOST */
+ state.interruptTable[1] = R5F_1_INT_1_NO; /* R5F-0 */
+ state.interruptTable[2] = 0; /* R5F-1 */
+ }
+ }
+ else if (isaChain.match(/#v8A#/)) {
+ state.numPlugged.length = mod.NUM_SYS_MBX;
+ for (var i = 0; i < state.numPlugged.length; i++) {
+ state.numPlugged[i] = 0;
+ }
+
+ state.interruptTable[0] = A53_INT_0_NO; /* R5F-0 */
+ state.interruptTable[1] = 0; /* HOST */
+ state.interruptTable[2] = A53_INT_1_NO; /* R5F-1 */
+ }
+ else {
+ throw("Invalid target: " + Program.build.target.$name);
+ }
+
+ /* initialize the driver table */
+ for (var i = 0; i < state.isrDispatchTable.length; i++) {
+ state.isrDispatchTable[i] = null;
+ }
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/TableInit.xdc b/packages/ti/sdo/ipc/family/am65xx/TableInit.xdc
--- /dev/null
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2012-2018, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * ======== TableInit.xdc ========
+ */
+
+/*!
+ * ======== TableInit ========
+ */
+
+metaonly module TableInit
+{
+ /*!
+ * ======== initProcId ========
+ */
+ Void initProcId(Any InterruptCore);
+
+ /*!
+ * ======== generateTable ========
+ */
+ Void generateTable(Any InterruptCore);
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/TableInit.xs b/packages/ti/sdo/ipc/family/am65xx/TableInit.xs
--- /dev/null
@@ -0,0 +1,202 @@
+/*
+ * Copyright (c) 2012-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * ======== TableInit.xs ========
+ *
+ */
+
+/*
+ * When assigning virtual indexes to each core make sure
+ * to assign even virtual indexes to DSP/M4 cores with
+ * even Core Ids, and assign odd virtual indexes to DSP/M4
+ * cores with odd Core Ids.
+ *
+ * Example:
+ * DSP physical Core Id = 0 -> Virtual Index = 4;
+ * DSP physical Core Id = 1 -> Virtual Index = 5;
+ *
+ * Virtual Index Assignment:
+ *
+ * | R5F-0 -> 6 |
+ * | HOST -> 8 | R5F-1 -> 9
+ *
+ */
+var r5f_0VirtId = 0;
+var hostVirtId = 1;
+var r5f_1VirtId = 2;
+
+/*
+ * ======== initProcId ========
+ * Assign MultiProc ids and virtual processor ids.
+ */
+function initProcId(mod)
+{
+ var MultiProc = xdc.useModule("ti.sdo.utils.MultiProc");
+
+ for (var i = 0; i < mod.procIdTable.length; i++) {
+ mod.procIdTable[i] = -1;
+ }
+
+ mod.r5f_0ProcId = MultiProc.getIdMeta("R5F-0");
+ mod.r5f_1ProcId = MultiProc.getIdMeta("R5F-1");
+ mod.hostProcId = MultiProc.getIdMeta("HOST");
+
+ if (mod.r5f_0ProcId != MultiProc.INVALIDID) {
+ mod.procIdTable[mod.r5f_0ProcId] = r5f_0VirtId;
+ }
+
+ if (mod.r5f_1ProcId != MultiProc.INVALIDID) {
+ mod.procIdTable[mod.r5f_1ProcId] = r5f_1VirtId;
+ }
+
+ if (mod.hostProcId != MultiProc.INVALIDID) {
+ mod.procIdTable[mod.hostProcId] = hostVirtId;
+ }
+}
+
+/*
+ * Function to generate mailbox table
+ */
+function generateTable(InterruptCore)
+{
+ var SYS_MBX0_OFFSET = 0;
+ var SYS_MBX1_OFFSET = 1;
+ var SYS_MBX2_OFFSET = 2;
+
+ var index;
+ var subMbxIdx;
+ var tableEntry;
+ var mbxUserIdx;
+ var mbxBaseAddrIdx;
+
+ /*
+ * Each entry in the mailbox table stores 3 indexes.
+ * The breakup of each entry is shown below:
+ * Entry format : 0xAAAABBCC
+ * AAAA : Mailbox base address table index
+ * BB : Mailbox User Id
+ * CC : Sub-mailbox index
+ *
+ * In order to lookup the User Id, Sub-mailbox Index and mailbox base
+ * address for a given src and dst core from the mailboxTable, the
+ * procedure shown below is followed:
+ * 1. Find the right entry for the given src and dst core.
+ * mailboxTable index is given by:
+ * Index = (src * NumCores) + dst
+ * 2. Mbx BaseAddr Index = mailboxTable[Index] >> 16
+ * 2. dst Mailbox UserId = (mailboxTable[Index] >> 8) & 0xFF
+ * 3. Sub-Mailbox Index = mailboxTable[Index] & 0xFF
+ */
+
+ /* TODO: Why not maintain mailboxTable as two dimentional array? */
+ /*
+ * 'i' is src core index, and
+ * 'j' is dst core index
+ */
+ for (var i = 0; i < InterruptCore.NUM_CORES; i++) {
+ for (var j = 0; j < InterruptCore.NUM_CORES; j++) {
+
+ /* init mailboxTable */
+ index = (i * InterruptCore.NUM_CORES) + j;
+ InterruptCore.mailboxTable[index] = -1;
+
+ /* No mailbox for same core */
+ if (i == j)
+ continue;
+
+ /* System Mailbox 0 */
+ /* For communication between HOST<->R5F0 */
+ if (((i == r5f_0VirtId) || (i == hostVirtId)) &&
+ ((j == r5f_0VirtId) || (j == hostVirtId))) {
+
+ mbxBaseAddrIdx = (SYS_MBX0_OFFSET) << 16;
+
+ if (j == hostVirtId) {
+ if (i == r5f_0VirtId) {
+ mbxUserIdx = 0 << 8;
+ subMbxIdx = 0;
+ }
+ }
+ else if (j == r5f_0VirtId) {
+ if (i == hostVirtId) {
+ mbxUserIdx = 1 << 8;
+ subMbxIdx = 1;
+ }
+ }
+ }
+ /* System Mailbox 1 */
+ /* For communication between HOST<->R5F1 */
+ if (((i == hostVirtId) || (i == r5f_1VirtId)) &&
+ ((j == hostVirtId) || (j == r5f_1VirtId))) {
+ mbxBaseAddrIdx = (SYS_MBX1_OFFSET) << 16;
+
+ if (j == hostVirtId) {
+ if (i == r5f_1VirtId) {
+ mbxUserIdx = 0 << 8;
+ subMbxIdx = 0;
+ }
+ }
+ else if (j == r5f_1VirtId) {
+ if (i == hostVirtId) {
+ mbxUserIdx = 1 << 8;
+ subMbxIdx = 1;
+ }
+ }
+ }
+
+ /* System Mailbox 2 */
+ /* For communication between R5F0<->R5F1 */
+ if (((i == r5f_0VirtId) || (i == r5f_1VirtId)) &&
+ ((j == r5f_0VirtId) || (j == r5f_1VirtId))) {
+ mbxBaseAddrIdx = (SYS_MBX2_OFFSET) << 16;
+
+ if (j == r5f_0VirtId) {
+ if (i == r5f_1VirtId) {
+ mbxUserIdx = 0 << 8;
+ subMbxIdx = 0;
+ }
+ }
+ else if (j == r5f_1VirtId) {
+ if (i == r5f_0VirtId) {
+ mbxUserIdx = 1 << 8;
+ subMbxIdx = 1;
+ }
+ }
+ }
+
+ tableEntry = mbxBaseAddrIdx | mbxUserIdx | subMbxIdx;
+ InterruptCore.mailboxTable[index] = tableEntry;
+ continue;
+
+ }
+ }
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/package.bld b/packages/ti/sdo/ipc/family/am65xx/package.bld
--- /dev/null
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2012-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== package.bld ========
+ */
+var Build = xdc.useModule('xdc.bld.BuildEnvironment');
+var Pkg = xdc.useModule('xdc.bld.PackageContents');
+var IpcBuild = xdc.loadCapsule("ti/sdo/ipc/Build.xs");
+
+var objList_common = [
+ "NotifySetup.c",
+ "NotifyDriverMbx.c"
+];
+
+var objList_r5f = [
+ "InterruptR5f.c"
+].concat(objList_common);
+
+var trgFilter_r5f = {
+ field: "isa",
+ list: [ "v7R" ]
+};
+
+var objList_host = [
+ "InterruptHost.c"
+].concat(objList_common);
+
+var trgFilter_host = {
+ field: "isa",
+ list: [ "v8A" ]
+};
+
+/* if not building a product release, build package libraries */
+if (Bld_goal != "release") {
+ IpcBuild.buildLibs(objList_r5f, undefined, trgFilter_r5f, arguments);
+ IpcBuild.buildLibs(objList_host, undefined, trgFilter_host, arguments);
+ IpcBuild.buildLibs(objList_host, undefined, trgFilter_host,
+ ["profile=smp"]);
+}
+
+Pkg.otherFiles = [
+ "package.bld",
+ "InterruptR5f.c",
+ "InterruptHost.c"
+].concat(objList_common);
+
+/* include source files in the release package */
+Pkg.attrs.exportSrc = true;
+Pkg.attrs.exportCfg = true;
+
+Pkg.generatedFiles.$add("lib/");
diff --git a/packages/ti/sdo/ipc/family/am65xx/package.xdc b/packages/ti/sdo/ipc/family/am65xx/package.xdc
--- /dev/null
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * ======== package.xdc ========
+ */
+
+requires ti.sdo.ipc;
+
+/*!
+ * ======== ti.sdo.ipc.family.am65xx ========
+ * Device specific modules for AM65XX
+ *
+ * Low-level modules which interact directly with the device are
+ * grouped into family packages. This package handles the AM65XX
+ * class of devices.
+ */
+package ti.sdo.ipc.family.am65xx [1,0,1] {
+ module TableInit;
+ module NotifySetup;
+ module NotifyDriverMbx;
+ module InterruptR5f;
+ module InterruptHost;
+}
diff --git a/packages/ti/sdo/ipc/family/am65xx/package.xs b/packages/ti/sdo/ipc/family/am65xx/package.xs
--- /dev/null
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2012-2018, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== package.xs ========
+ *
+ */
+
+var Build = null;
+
+/*
+ * ======== package.close ========
+ */
+function close()
+{
+ if (xdc.om.$name != 'cfg') {
+ return;
+ }
+
+ Build = xdc.useModule('ti.sdo.ipc.Build');
+}
+
+/*
+ * ======== Package.getLibs ========
+ * This function is called when a program's configuration files are
+ * being generated and it returns the name of a library appropriate
+ * for the program's configuration.
+ */
+function getLibs(prog)
+{
+ var BIOS = xdc.module('ti.sysbios.BIOS');
+ var libPath;
+ var suffix;
+
+ if (Build.libType == Build.LibType_PkgLib) {
+ /* lib path defined in Build.buildLibs() */
+ libPath = (BIOS.smpEnabled ? "lib/smpipc/debug" : "lib/ipc/debug");
+
+ /* find a compatible suffix */
+ if ("findSuffix" in prog.build.target) {
+ suffix = prog.build.target.findSuffix(this);
+ }
+ else {
+ suffix = prog.build.target.suffix;
+ }
+ return (libPath + "/" + this.$name + ".a" + suffix);
+ }
+ else {
+ return (Build.getLibs(this));
+ }
+}
index 1d73bfc853709978fb7b840f1633518de69d2007..1d89a90ef98d3049f6fb95844c9462758a48ae3f 100644 (file)
/*
- * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * Copyright (c) 2012-2018, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
var trgFilter_2 = {
field: "isa",
- list: [ "674", "64T", "v7M", "v7M4", "v7A", "v7A8", "v7A15", "arp32" ]
+ list: [ "674", "64T", "v7M", "v7M4", "v7A", "v7A8", "v7A15", "arp32", "v7R", "v8A" ]
};
var trgFilter_3 = {
index 55fa300cab9c10836a7d2f42666155cf8332c2e2..b4196acae6f4ab28e2f67d5e4e25f590d3d8a789 100644 (file)
%%{
/*
- * Copyright (c) 2013, Texas Instruments Incorporated
+ * Copyright (c) 2013-2018, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
Program.build.target.name.match(/M4F/) ||
Program.build.target.name.match(/A15/) ||
Program.build.target.name.match(/A9/) ||
- Program.build.target.name.match(/A8/))) {
+ Program.build.target.name.match(/A8/) ||
+ Program.build.target.name.match(/A53F/))) {
tplt = xdc.loadTemplate(this.$package.packageBase +
"/makefile_gccArmLto.xdt");
index 0959e7c8a31f663825f8e25fbd115efcd428cfd6..38526400da578f03da287404b6998798c8f8644b 100644 (file)
/*
- * Copyright (c) 2013, Texas Instruments Incorporated
+ * Copyright (c) 2013-2018, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
var customGnuArmA9Opts = " ";
var customGnuArmA8Opts = " ";
var customGnuArmA15Opts = " ";
+var customGnuArmA53Opts = " ";
var ccOptsList = {
"ti.targets.C64P" : custom6xOpts,
"ti.targets.arm.elf.M3" : customArmOpts,
"ti.targets.arm.elf.M4" : customArmOpts,
"ti.targets.arm.elf.M4F" : customArmOpts,
+ "ti.targets.arm.elf.R5F" : customArmOpts,
"gnu.targets.arm.M3" : customGnuArmM3Opts,
"gnu.targets.arm.M4" : customGnuArmM4Opts,
"gnu.targets.arm.M4F" : customGnuArmM4FOpts,
"gnu.targets.arm.A8F" : customGnuArmA8Opts,
"gnu.targets.arm.A9F" : customGnuArmA9Opts,
"gnu.targets.arm.A15F" : customGnuArmA15Opts,
+ "gnu.targets.arm.A53F" : customGnuArmA53Opts,
};
/*
diff --git a/products.mak b/products.mak
index 21da1e48371bb5f6e6ce9854d18328ba7103af47..dddf237f0947da84b65a873b2f6720b912266a83 100644 (file)
--- a/products.mak
+++ b/products.mak
#
-# Copyright (c) 2012-2015 Texas Instruments Incorporated - http://www.ti.com
+# Copyright (c) 2012-2018 Texas Instruments Incorporated - http://www.ti.com
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# Platform to build for
# Supported platforms (choose one):
# OMAPL138, OMAP54XX, DRA7XX, 66AK2G, 66AK2E, TCI6630, TCI6636, TCI6638,
-# TDA3XX
+# TDA3XX, AM65XX
#
# Note, this is used for Linux, QNX and BIOS builds
#
ti.targets.arm.elf.M3 =
ti.targets.arm.elf.M4 =
ti.targets.arm.elf.M4F =
+ti.targets.arm.elf.R5F =
ti.targets.arp32.elf.ARP32 =
ti.targets.arp32.elf.ARP32_far =
gnu.targets.arm.A8F =
gnu.targets.arm.A15F =
+gnu.targets.arm.A53F =