Add power management support to DRA7xx DSP
authorvwan@ti.com <vwan@ti.com>
Thu, 25 Jun 2015 05:13:55 +0000 (22:13 -0700)
committerRobert Tivy <rtivy@ti.com>
Thu, 25 Jun 2015 21:07:30 +0000 (14:07 -0700)
This commit adds support for power management in IPC, by adding an IpcPower
module for the DRA7xx DSP. It also modifies the tests to build with
the BIOS Power module. However, the IpcPower_idle function is not plugged in by
default, so auto-suspend will not take place.

Currently only DSP1 is supported, with the caveat that CCS needs to be used
to first connect to the DSP and 'kick' the device out of idle before
auto-suspend would work. Also the DSP may go into a 'hung state' after
a large number of messages has been exchanged when IpcPower_idle is plugged
in.

This is a first step towards addressing CQ SDOCM00117446.

Signed-off-by: VW <vwan@ti.com>
packages/ti/ipc/family/vayu/VirtQueue.c
packages/ti/ipc/tests/Dsp_vayu.cfg
packages/ti/ipc/tests/package.bld
packages/ti/pm/IpcPowerDsp_dra7xx.c [new file with mode: 0644]
packages/ti/pm/_IpcPower.h
packages/ti/pm/package.bld

index bc23e1e44758628e69b62b812f2797bbce92b3ad..56a5fdb95f912a5d4eef9400ce0a617d87547b6f 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2014, Texas Instruments Incorporated
+ * Copyright (c) 2011-2015, Texas Instruments Incorporated
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -75,9 +75,8 @@
 #include <ti/ipc/MultiProc.h>
 
 #include <ti/ipc/rpmsg/virtio_ring.h>
-#ifndef DSP
 #include <ti/pm/IpcPower.h>
-#endif
+
 #include <string.h>
 
 #include <ti/ipc/remoteproc/Resource.h>
@@ -382,7 +381,6 @@ Void VirtQueue_isr(UArg msg)
             Cache_wbAll();
             return;
 
-#ifndef DSP
         case (UInt)RP_MSG_HIBERNATION:
             if (IpcPower_canHibernate() == FALSE) {
                 InterruptProxy_intSend(hostProcId, NULL,
@@ -397,7 +395,7 @@ Void VirtQueue_isr(UArg msg)
                     (UInt)RP_MSG_HIBERNATION_ACK);
             IpcPower_suspend();
             return;
-#endif
+
         default:
             /*
              *  If the message isn't one of the above, it's either part of the
@@ -500,10 +498,10 @@ Void VirtQueue_startup()
 
 #ifdef DSP
     intInfo.intVectorId = DSPEVENTID;
-#else
+#endif
+
     /* Initilize the IpcPower module */
     IpcPower_init();
-#endif
 
     /*
      * Wait for HLOS (Virtio device) to indicate that priming of host's receive
index 9398ff5595db911b95696042c58a504e191ff061..a6fe8d42ca26bfae7de2814f4d02b42faebe3233 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2014, Texas Instruments Incorporated
+ * Copyright (c) 2012-2015, Texas Instruments Incorporated
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -72,10 +72,10 @@ Resource.loadSegment = "EXT_CODE";
 
 /* Modules used in Power Management */
 xdc.loadPackage('ti.pm');
-/*
-var Power = xdc.useModule('ti.sysbios.family.c64p.tesla.Power');
+
+var Power = xdc.useModule('ti.sysbios.family.c66.vayu.Power');
 Power.loadSegment = "PM_DATA";
-*/
+
 
 /* Idle function that periodically flushes the unicache */
 var Idle = xdc.useModule('ti.sysbios.knl.Idle');
index 00880122bebeb485755cce67a4605ebb876b4268..088b5fad678deba0274d9b8db077a418e1827099 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2014, Texas Instruments Incorporated
+ * Copyright (c) 2012-2015, Texas Instruments Incorporated
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -228,7 +228,7 @@ var evmDRA7XX_SR_0 = {
  *  9520_0000   ???0_0000    30_0000  (   3 MB) EXT_HEAP
  *  9F00_0000   ???0_0000     6_0000  ( 384 kB) TRACE_BUF
  *  9F06_0000   ???6_0000     1_0000  (  64 kB) EXC_DATA
- *  9F07_0000   ???7_0000     2_0000  ( 128 kB) PM_DATA (Power mgmt)
+ *  9F07_0000   ???7_0000     7_0000  ( 448 kB) PM_DATA (Power mgmt)
  */
 var evmDRA7XX_ExtMemMapDsp = {
     EXT_CODE: {
@@ -269,7 +269,7 @@ var evmDRA7XX_ExtMemMapDsp = {
     PM_DATA: {
         name: "PM_DATA",
         base: 0x9F070000,
-        len:  0x00020000,
+        len:  0x00070000,
         space: "data",
         access: "RWX"  /* should this have execute perm? */
     },
diff --git a/packages/ti/pm/IpcPowerDsp_dra7xx.c b/packages/ti/pm/IpcPowerDsp_dra7xx.c
new file mode 100644 (file)
index 0000000..5b9f7a3
--- /dev/null
@@ -0,0 +1,515 @@
+/*
+ * Copyright (c) 2015, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * *  Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * *  Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * *  Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** ============================================================================
+ *  @file       IpcPowerDsp_dra7xx.c
+ *
+ *  @brief      Power Managment for DRA7xx DSP.
+ *
+ *  ============================================================================
+ */
+
+#include <xdc/std.h>
+#include <xdc/runtime/System.h>
+#include <xdc/runtime/Assert.h>
+#include <xdc/runtime/Memory.h>
+#include <xdc/runtime/Log.h>
+#include <xdc/runtime/Diags.h>
+
+#include <ti/sysbios/BIOS.h>
+#include <ti/sysbios/knl/Semaphore.h>
+#include <ti/sysbios/knl/Task.h>
+#include <ti/sysbios/hal/Hwi.h>
+#include <ti/sysbios/knl/Swi.h>
+#include <ti/sysbios/knl/Clock.h>
+#include <ti/sysbios/timers/dmtimer/Timer.h>
+#include <ti/sysbios/family/c66/vayu/Power.h>
+
+#include <ti/pm/IpcPower.h>
+#include "_IpcPower.h"
+
+#define REG32(A)   (*(volatile UInt32 *) (A))
+
+#define DSP_SYS_SYSCONFIG 0x01D00008
+#define IDLE_STBY_MASK    0x0000003C
+
+#define PDCCMD_REG        0x01810000
+#define SLEEP_MODE        0x10000
+
+static UInt32 IpcPower_hibLock;
+static Swi_Handle suspendResumeSwi;
+static Semaphore_Handle IpcPower_semSuspend = NULL;
+static Semaphore_Handle IpcPower_semExit = NULL;
+static Task_Handle IpcPower_tskSuspend = NULL;
+static Int32 refWakeLockCnt;
+
+/* List for storing all registered callback functions */
+static IpcPower_CallbackElem *IpcPower_callbackList = NULL;
+
+/* Module ref count: */
+static Int curInit = 0;
+
+typedef enum IpcPower_SleepMode {
+    IpcPower_SLEEP_MODE_DEEPSLEEP,
+    IpcPower_SLEEP_MODE_WAKELOCK,
+    IpcPower_SLEEP_MODE_WAKEUNLOCK
+} IpcPower_SleepMode;
+
+/* Deep sleep state variable for IpcPower module */
+static Bool IpcPower_deepSleep = TRUE;
+
+static IpcPower_WugenEvtMask wugenEvtMask;
+
+/* PM transition debug counters */
+UInt32 IpcPower_idleCount = 0;
+UInt32 IpcPower_suspendCount = 0;
+UInt32 IpcPower_resumeCount = 0;
+
+/* Handle to store BIOS Tick Timer */
+static Timer_Handle tickTimerHandle = NULL;
+
+/*
+ *  ======== IpcPower_callUserFxns ========
+ */
+static Void IpcPower_callUserFxns(IpcPower_Event event)
+{
+    IpcPower_CallbackElem *node = IpcPower_callbackList;
+
+    /* Call the registered functions matching the event */
+    while (node != NULL) {
+        if (node->event == event) {
+            (*(node->callback))(event, node->data);
+        }
+        node = node->next;
+    }
+}
+
+static inline Void IpcPower_sleepMode(IpcPower_SleepMode opt)
+{
+    IArg hwiKey;
+
+    /* Set/Restore the DeepSleep bit if no timer already in use */
+    hwiKey = Hwi_disable();
+    switch (opt) {
+        case IpcPower_SLEEP_MODE_WAKEUNLOCK:
+            if (refWakeLockCnt) {
+                refWakeLockCnt--;
+            }
+            /* Fall through: */
+        case IpcPower_SLEEP_MODE_DEEPSLEEP:
+            if (!refWakeLockCnt) {
+                IpcPower_deepSleep = TRUE;
+            }
+            break;
+        case IpcPower_SLEEP_MODE_WAKELOCK:
+            refWakeLockCnt++;
+            IpcPower_deepSleep = FALSE;
+            break;
+    }
+    Hwi_restore(hwiKey);
+}
+
+/*
+ *  ======== IpcPower_getWugenEvtMask ========
+ */
+Void IpcPower_getWugenEvtMask(IpcPower_WugenEvtMask *mask)
+{
+    mask->mevt0 = wugenEvtMask.mevt0;
+    mask->mevt1 = wugenEvtMask.mevt1;
+}
+
+/*
+ *  ======== IpcPower_setWugenEvtMask ========
+ */
+Void IpcPower_setWugenEvtMask(IpcPower_WugenEvtMask *mask)
+{
+    wugenEvtMask.mevt0 = mask->mevt0;
+    wugenEvtMask.mevt1 = mask->mevt1;
+}
+
+/*
+ * On the C66 DSPs, there is no official WUGEN IP per se, but the
+ * DSP_SYS_IRQWAKEEN0/1 registers have the same role as WUGEN
+ * event mask registers in terms of determining which interrupts
+ * cause wakeup event generation.
+ */
+static inline Void IpcPower_getWugen(IpcPower_WugenEvtMask *mask)
+{
+    mask->mevt0 = REG32(DSP_SYS_IRQWAKEEN0);
+    mask->mevt1 = REG32(DSP_SYS_IRQWAKEEN1);
+}
+
+static inline Void IpcPower_setWugen(IpcPower_WugenEvtMask *mask)
+{
+    REG32(DSP_SYS_IRQWAKEEN0) |= mask->mevt0;
+    REG32(DSP_SYS_IRQWAKEEN1) |= mask->mevt1;
+}
+
+
+/*
+ *  ======== IpcPower_suspendSwi ========
+ */
+#define FXNN "IpcPower_suspendSwi"
+static Void IpcPower_suspendSwi(UArg arg0, UArg arg1)
+{
+    if (refWakeLockCnt) {
+        Log_print0(Diags_INFO, FXNN":Warning: Wake locks in use\n");
+    }
+
+    /* Invoke the BIOS suspend routine */
+    Power_suspend(Power_Suspend_HIBERNATE);
+
+    Log_print0(Diags_INFO, FXNN":Resume\n");
+}
+#undef FXNN
+
+/*
+ *  ======== IpcPower_suspendTaskFxn ========
+ */
+Void IpcPower_suspendTaskFxn(UArg arg0, UArg arg1)
+{
+    while (curInit) {
+        /* Wait for suspend notification from host-side */
+        Semaphore_pend(IpcPower_semSuspend, BIOS_WAIT_FOREVER);
+
+        if (curInit) {
+            /* Call pre-suspend preparation function */
+            IpcPower_preSuspend();
+
+            Swi_post(suspendResumeSwi);
+
+            /* Call post-resume preparation function */
+            IpcPower_postResume();
+        }
+    }
+
+    /* Signal the task end */
+    Semaphore_post(IpcPower_semExit);
+}
+
+/*
+ *  ======== IpcPower_init ========
+ */
+Void IpcPower_init()
+{
+    Swi_Params swiParams;
+    Task_Params taskParams;
+    Int i;
+    UArg arg;
+    UInt func;
+    Timer_Handle tHandle = NULL;
+
+    if (curInit++) {
+        return;
+    }
+
+    IpcPower_hibLock = 0;
+    refWakeLockCnt = 0;
+
+    for (i = 0; i < Timer_Object_count(); i++) {
+        tHandle = Timer_Object_get(NULL, i);
+        func = (UInt) Timer_getFunc(tHandle, &arg);
+        if (func && ((func == (UInt) ti_sysbios_knl_Clock_doTick__I) ||
+                     (func == (UInt) Clock_tick))) {
+            tickTimerHandle = tHandle;
+            break;
+        }
+    }
+    if (tickTimerHandle == NULL) {
+        System_abort("IpcPower_init: Cannot find tickTimer Handle. Custom"
+                        " clock timer functions currently not supported.\n");
+    }
+
+    IpcPower_semSuspend = Semaphore_create(0, NULL, NULL);
+    IpcPower_semExit = Semaphore_create(0, NULL, NULL);
+
+    Task_Params_init(&taskParams);
+    taskParams.priority = Task_numPriorities - 1; /* Highest priority */
+    taskParams.instance->name = "ti.pm.IpcPower_tskSuspend";
+    IpcPower_tskSuspend = Task_create(IpcPower_suspendTaskFxn, &taskParams,
+        NULL);
+
+    Swi_Params_init(&swiParams);
+    swiParams.priority = Swi_numPriorities - 1; /* Max Priority Swi */
+    suspendResumeSwi = Swi_create(IpcPower_suspendSwi, &swiParams, NULL);
+
+    IpcPower_sleepMode(IpcPower_SLEEP_MODE_DEEPSLEEP);
+
+    /* Setup IDLEMODE and STANDBYMODE in DSP_SYS_SYSCONFIG */
+    REG32(DSP_SYS_SYSCONFIG) |= IDLE_STBY_MASK;
+
+    /* Setup DSP_SYS_IRQWAKEEN0/1 */
+    IpcPower_getWugen(&wugenEvtMask);
+    /* TODO: Add DSP2 support */
+    wugenEvtMask.mevt0 |= VAYU_DSP1_WUGEN_INT_MASK0;
+    wugenEvtMask.mevt1 |= VAYU_DSP1_WUGEN_INT_MASK1;
+    IpcPower_setWugen(&wugenEvtMask);
+}
+
+/*
+ *  ======== IpcPower_exit ========
+ */
+Void IpcPower_exit()
+{
+
+    --curInit;
+
+    if (curInit == 0) {
+        /* Unblock PM suspend task */
+        Semaphore_post(IpcPower_semSuspend);
+
+        /* Wait for task completion */
+        Semaphore_pend(IpcPower_semExit, BIOS_WAIT_FOREVER);
+
+        /* Delete the suspend task and semaphore */
+        Task_delete(&IpcPower_tskSuspend);
+        Semaphore_delete(&IpcPower_semSuspend);
+        Semaphore_delete(&IpcPower_semExit);
+    }
+}
+
+/*
+ *  ======== IpcPower_suspend ========
+ */
+Void IpcPower_suspend()
+{
+    Assert_isTrue((curInit > 0) , NULL);
+
+    Semaphore_post(IpcPower_semSuspend);
+}
+
+/*
+ *  ======== IpcPower_idle ========
+ */
+Void IpcPower_idle()
+{
+    IpcPower_idleCount++;
+
+    if (IpcPower_deepSleep) {
+        /* Set deepsleep mode */
+        REG32(PDCCMD_REG) = SLEEP_MODE;
+        REG32(PDCCMD_REG);
+    }
+
+    asm(" mfence");
+    asm(" nop");
+    asm(" nop");
+    asm(" nop");
+    asm(" nop");
+    asm(" nop");
+    asm(" nop");
+    asm(" nop");
+    asm(" idle");
+    asm(" nop");
+    asm(" nop");
+    asm(" nop");
+    asm(" nop");
+    asm(" nop");
+    asm(" nop");
+    asm(" nop");
+}
+
+/*
+ *  ======== IpcPower_wakeLock ========
+ */
+Void IpcPower_wakeLock()
+{
+    IpcPower_sleepMode(IpcPower_SLEEP_MODE_WAKELOCK);
+}
+
+/*
+ *  ======== IpcPower_wakeUnlock ========
+ */
+Void IpcPower_wakeUnlock()
+{
+    IpcPower_sleepMode(IpcPower_SLEEP_MODE_WAKEUNLOCK);
+}
+
+/*
+ *  ======== IpcPower_hibernateLock ========
+ */
+UInt IpcPower_hibernateLock()
+{
+    IArg hwiKey;
+
+    hwiKey = Hwi_disable();
+
+    IpcPower_hibLock++;
+
+    Hwi_restore(hwiKey);
+
+    return (IpcPower_hibLock);
+}
+
+/*
+ *  ======== IpcPower_hibernateUnlock ========
+ */
+UInt IpcPower_hibernateUnlock()
+{
+    IArg hwiKey;
+
+    hwiKey = Hwi_disable();
+
+    if (IpcPower_hibLock > 0) {
+        IpcPower_hibLock--;
+    }
+
+    Hwi_restore(hwiKey);
+
+    return (IpcPower_hibLock);
+}
+
+
+/*
+ *  ======== IpcPower_canHibernate ========
+ */
+Bool IpcPower_canHibernate()
+{
+    if (IpcPower_hibLock) {
+        return (FALSE);
+    }
+
+    return (TRUE);
+}
+
+/*
+ *  ======== IpcPower_registerCallback ========
+ */
+#define FXNN "IpcPower_registerCallback"
+Int IpcPower_registerCallback(Int event, IpcPower_CallbackFuncPtr cbck,
+                              Ptr data)
+{
+    IArg hwiKey;
+    IpcPower_CallbackElem **list, *node;
+    BIOS_ThreadType context = BIOS_getThreadType();
+
+    if ((context != BIOS_ThreadType_Task) &&
+        (context != BIOS_ThreadType_Main)) {
+        Log_print0(Diags_ERROR, FXNN":Invalid context\n");
+        return (IpcPower_E_FAIL);
+    }
+
+    list = &IpcPower_callbackList;
+
+    /* Allocate and update new element */
+    node = Memory_alloc(NULL, sizeof(IpcPower_CallbackElem), 0, NULL);
+    if (node == NULL) {
+        Log_print0(Diags_ERROR, FXNN":out of memory\n");
+        return (IpcPower_E_MEMORY);
+    }
+
+    node->next     = NULL;
+    node->event    = (IpcPower_Event) event;
+    node->callback = cbck;
+    node->data     = data;
+
+    hwiKey = Hwi_disable();  /* begin: critical section */
+    while (*list != NULL) {
+        list = &(*list)->next;
+    }
+    *list = node;
+    Hwi_restore(hwiKey);  /* end: critical section */
+
+    return (IpcPower_S_SUCCESS);
+}
+#undef FXNN
+
+/*
+ *  ======== IpcPower_unregisterCallback ========
+ */
+#define FXNN "IpcPower_unregisterCallback"
+Int IpcPower_unregisterCallback(Int event, IpcPower_CallbackFuncPtr cbck)
+{
+    IArg hwiKey;
+    IpcPower_CallbackElem **list, *node;
+    Int status = IpcPower_E_FAIL;
+    BIOS_ThreadType context = BIOS_getThreadType();
+
+    if ((context != BIOS_ThreadType_Task) &&
+        (context != BIOS_ThreadType_Main)) {
+        Log_print0(Diags_ERROR, FXNN":Invalid context\n");
+        return (status);
+    }
+
+    list = &IpcPower_callbackList;
+    node  = NULL;
+
+    hwiKey = Hwi_disable();  /* begin: critical section */
+    while (*list != NULL) {
+        if ( ((*list)->callback == cbck) &&
+             ((*list)->event == event) ) {
+            node   = *list;
+            *list  = (*list)->next;
+            status = IpcPower_S_SUCCESS;
+            break;
+        }
+        list = &(*list)->next;
+    }
+    Hwi_restore(hwiKey);  /* end: critical section */
+
+    if (status == IpcPower_S_SUCCESS) {
+        if (node != NULL) {
+            Memory_free(NULL, node, sizeof(IpcPower_CallbackElem));
+        }
+        else {
+            Log_print0(Diags_ERROR, FXNN":Invalid pointer\n");
+        }
+    }
+
+    return (status);
+}
+#undef FXNN
+
+/*
+ *  ======== IpcPower_preSuspend ========
+ */
+Void IpcPower_preSuspend(Void)
+{
+    IpcPower_suspendCount++;
+
+    /* Call all user registered suspend callback functions */
+    IpcPower_callUserFxns(IpcPower_Event_SUSPEND);
+}
+
+/*
+ *  ======== IpcPower_postResume ========
+ */
+Void IpcPower_postResume(Void)
+{
+    /* Restore timer registers */
+    Timer_restoreRegisters(tickTimerHandle, NULL);
+    Timer_start(tickTimerHandle);
+
+    /* Call all user registered resume callback functions */
+    IpcPower_callUserFxns(IpcPower_Event_RESUME);
+
+    IpcPower_resumeCount++;
+}
index c41d47341f30a85bf18ed8733ba495fb90e3f389..7ba161a2fd461a6893f072997ffc7ad1fd5a4004 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2013, Texas Instruments Incorporated
+ * Copyright (c) 2011-2015, Texas Instruments Incorporated
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -60,6 +60,7 @@ extern "C" {
  * register.
  */
 #define MIRQ_SHIFT(irq)                 (((irq) - 16) % 32)
+#define IRQWAKEEN_SHIFT(irq)            (((irq) - 32) % 32)
 
 #define MBX_INT                         50
 #define GPT3_INT                        53
@@ -68,6 +69,10 @@ extern "C" {
 #define GPT11_INT                       56
 #define MBX6_U1_INT                     66
 
+#define DSP_GPT5_INT                    67
+#define DSP_GPT6_INT                    68
+#define DSP_MBX_INT                     57
+
 #define WUGEN_MAILBOX_BIT               (1 << MIRQ34_SHIFT)
 #define WUGEN_GPT3_BIT                  (1 << MIRQ37_SHIFT)
 #define WUGEN_GPT4_BIT                  (1 << MIRQ38_SHIFT)
@@ -76,10 +81,19 @@ extern "C" {
 #define WUGEN_GPT11_BIT                 (1 << MIRQ_SHIFT(GPT11_INT))
 #define WUGEN_MBX6_U1_BIT               (1 << MIRQ_SHIFT(MBX6_U1_INT))
 
+#define DSP_SYS_IRQWAKEEN_GPT5_BIT      (1 << IRQWAKEEN_SHIFT(DSP_GPT5_INT))
+#define DSP_SYS_IRQWAKEEN_GPT6_BIT      (1 << IRQWAKEEN_SHIFT(DSP_GPT6_INT))
+#define DSP1_SYS_IRQWAKEEN_MBX5_U0_BIT   (1 << IRQWAKEEN_SHIFT(DSP_MBX_INT))
+#define DSP2_SYS_IRQWAKEEN_MBX6_U0_BIT   (1 << IRQWAKEEN_SHIFT(DSP_MBX_INT))
+
 /* Wake-up masks for interrupts 00-31 */
 #define WUGEN_MEVT0                     0x4000100C
 /* Wake-up masks for interrupts 32-63 */
 #define WUGEN_MEVT1                     0x40001010
+/* Wake-up masks for interrupts 32-63 */
+#define DSP_SYS_IRQWAKEEN0              0x01D00020
+/* Wake-up masks for interrupts 64-95 */
+#define DSP_SYS_IRQWAKEEN1              0x01D00024
 
 /* Enable Mailbox, GPT3, and GPT4 interrupts as Wakeup sources */
 #define OMAP_IPU_WUGEN_INT_MASK0        0
@@ -92,6 +106,10 @@ extern "C" {
 #define VAYU_IPU1_WUGEN_INT_MASK0       0
 #define VAYU_IPU1_WUGEN_INT_MASK1       (WUGEN_GPT11_BIT | \
                                          WUGEN_MBX6_U1_BIT)
+#define VAYU_DSP1_WUGEN_INT_MASK0       (DSP1_SYS_IRQWAKEEN_MBX5_U0_BIT)
+#define VAYU_DSP1_WUGEN_INT_MASK1       (DSP_SYS_IRQWAKEEN_GPT5_BIT)
+#define VAYU_DSP2_WUGEN_INT_MASK0       (DSP2_SYS_IRQWAKEEN_MBX6_U0_BIT)
+#define VAYU_DSP2_WUGEN_INT_MASK1       (DSP_SYS_IRQWAKEEN_GPT6_BIT)
 
 #define M3_SCR_REG                      0xE000ED10
 
index 948138010f7a3eba2300b4ec505c8187b8a76d24..f2b7a32a56b88cf1185ef628b8ddb2e85ddef20c 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2013, Texas Instruments Incorporated
+ * Copyright (c) 2011-2015, Texas Instruments Incorporated
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -77,7 +77,7 @@ libArray.push(
     }
 );
 
-/* pm library for DSP target */
+/* pm library for Tesla DSP target */
 libArray.push(
     {
         name: "ti.pm",
@@ -88,6 +88,24 @@ libArray.push(
     }
 );
 
+/* pm library for DRA7XX DSP target */
+libArray.push(
+    {
+        name: "ti.pm_dra7xx_dsp",
+        sources: [
+            "IpcPowerDsp_dra7xx",
+        ],
+        isas: [ "66" ],
+        devices: [
+            {
+                name: "_vayu",
+                defs: " -DVAYU",
+            },
+        ],
+    }
+);
+
+
 /* ==== loop over array of libraries ==== */
 for (var i = 0; i < libArray.length; i++) {
     var lib = libArray[i];