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raw | patch | inline | side by side (parent: ccfcac1)
raw | patch | inline | side by side (parent: ccfcac1)
author | vwan@ti.com <vwan@ti.com> | |
Thu, 14 Aug 2014 00:31:23 +0000 (17:31 -0700) | ||
committer | Robert Tivy <rtivy@ti.com> | |
Thu, 14 Aug 2014 00:39:15 +0000 (17:39 -0700) |
This commit addresses CQ SDOCM00108582.
Signed-off-by: VW <vwan@ti.com>
Signed-off-by: VW <vwan@ti.com>
14 files changed:
diff --git a/qnx/src/ipc3x_dev/ti/syslink/build/Qnx/resmgr/ipc.use b/qnx/src/ipc3x_dev/ti/syslink/build/Qnx/resmgr/ipc.use
index 0652739afd76ec24cd2aa7c1b5ccfa477c6c843f..76f1263cd207c2990c3f56b3333901f0f10b44ba 100644 (file)
ipc - IPC Resource Manager
-ipc: [-HTgdc] <core_id1> <executable1> [<core_id2> <executable2> ...]
+ipc: [-HTgdca] <core_id1> <executable1> [<core_id2> <executable2> ...]
<core_id#> should be set to a core name
followed by the path to the executable to load on that core.
Supported core ids are
OMAP54xx: IPU, DSP
- DRA7xx: IPU2, DSP1
+ DRA7xx: IPU2, DSP1, IPU1
Options:
-H <option> Enable/Disable Ducati hibernation. Default: 1
-d Disable automatic crash recovery
-c <dump_file> Generate dump of slave trace during crashes. Use
absolute path for filename.
+ -a<n> Specify that the first 'n' cores have been pre-loaded and
+ started. Perform late-attach to these cores.
diff --git a/qnx/src/ipc3x_dev/ti/syslink/build/Qnx/resmgr/syslink_main.c b/qnx/src/ipc3x_dev/ti/syslink/build/Qnx/resmgr/syslink_main.c
index a76ebd6f427b0a25a5467898cdb7f2b0afafc699..f29f385008616372fda2b3cd0dbbb361df25e2ab 100644 (file)
static int disableRecovery = false;
static char * logFilename = NULL;
+/* Number of cores to attach to */
+static int numAttach = 0;
+
#if defined(SYSLINK_PLATFORM_VAYU)
static bool gatempEnabled = false;
#endif
uint16_t proc_id;
char * proc;
char * firmware;
+ bool attachOnly;
} syslink_firmware_info;
static syslink_firmware_info syslink_firmware[MultiProc_MAXPROCESSORS];
static unsigned int syslink_num_cores = 0;
@@ -585,6 +589,8 @@ int init_ipc(syslink_dev_t * dev, syslink_firmware_info * firmware, bool recover
pthread_mutex_unlock(&dev->lock);
}
+ memset(procH_fileId, 0, sizeof(procH_fileId));
+
for (i = 0; i < syslink_num_cores; i++) {
procId = firmware[i].proc_id = MultiProc_getId(firmware[i].proc);
if (procId >= MultiProc_MAXPROCESSORS) {
@@ -602,6 +608,14 @@ int init_ipc(syslink_dev_t * dev, syslink_firmware_info * firmware, bool recover
break;
}
+ if (recover) {
+ /*
+ * if we are in recovery, we load the cores we previously
+ * attached to
+ */
+ syslink_firmware[i].attachOnly = false;
+ }
+
if (syslink_firmware[i].firmware) {
rscHandle[procId] = RscTable_alloc(firmware[i].firmware, procId);
if (rscHandle[procId] == NULL) {
@@ -616,6 +630,9 @@ int init_ipc(syslink_dev_t * dev, syslink_firmware_info * firmware, bool recover
/* Load and start the remote processor. */
ProcMgr_getAttachParams (procH[procId], &attachParams);
+ if (syslink_firmware[i].attachOnly) {
+ attachParams.bootMode = ProcMgr_BootMode_NoBoot;
+ }
status = ProcMgr_attach (procH[procId], &attachParams);
if (status < 0) {
GT_setFailureReason (curTrace,
@@ -626,7 +643,8 @@ int init_ipc(syslink_dev_t * dev, syslink_firmware_info * firmware, bool recover
goto procmgrattach_fail;
}
- if (syslink_firmware[i].firmware) {
+ if ((syslink_firmware[i].firmware) &&
+ (!syslink_firmware[i].attachOnly)) {
status = ProcMgr_load (procH[procId],
(String)firmware[i].firmware, 0, NULL,
NULL, &procH_fileId[procId]);
@@ -656,14 +674,16 @@ int init_ipc(syslink_dev_t * dev, syslink_firmware_info * firmware, bool recover
goto procmgrreg_fail;
}
- status = ProcMgr_start(procH[procId], NULL);
- if (status < 0) {
- GT_setFailureReason (curTrace,
+ if (!syslink_firmware[i].attachOnly) {
+ status = ProcMgr_start(procH[procId], NULL);
+ if (status < 0) {
+ GT_setFailureReason (curTrace,
GT_4CLASS,
"init_ipc",
status,
"ProcMgr_start failed!");
- goto procmgrstart_fail;
+ goto procmgrstart_fail;
+ }
}
continue;
procmgrreg_fail:
Ipc_detach(procId);
ipcattach_fail:
- if (syslink_firmware[i].firmware)
+ if ((syslink_firmware[i].firmware) &&
+ (!syslink_firmware[i].attachOnly)) {
ProcMgr_unload(procH[procId], procH_fileId[procId]);
+ }
procmgrload_fail:
ProcMgr_detach(procH[procId]);
procmgrattach_fail:
}
ProcMgr_unregisterNotify(procH[procId], syslink_error_cb,
(Ptr)dev, errStates);
- ProcMgr_stop(procH[procId]);
- if (procH_fileId[procId]) {
- ProcMgr_unload(procH[procId], procH_fileId[procId]);
- procH_fileId[procId] = 0;
+ if (!syslink_firmware[i].attachOnly) {
+ ProcMgr_stop(procH[procId]);
+ if (procH_fileId[procId]) {
+ ProcMgr_unload(procH[procId], procH_fileId[procId]);
+ procH_fileId[procId] = 0;
+ }
}
ProcMgr_detach(procH[procId]);
ProcMgr_close(&procH[procId]);
// Stop the remote cores right away
for (i = 0; i < MultiProc_MAXPROCESSORS; i++) {
- if (procH[i]) {
+ /* Only stop the ones that we have loaded */
+ if ((procH[i]) && (procH_fileId[i])) {
GT_1trace(curTrace, GT_4CLASS, "stopping %s", MultiProc_getName(i));
ProcMgr_stop(procH[i]);
}
{
printf("\n\nUsage:\n");
#if defined(SYSLINK_PLATFORM_OMAP5430)
- printf("\n%s: [-HTdc] <core_id1> <executable1> [<core_id2> <executable2> ...]\n",
+ printf("\n%s: [-HTdca] <core_id1> <executable1> [<core_id2> <executable2> ...]\n",
app);
printf(" <core_id#> should be set to a core name (e.g. IPU, DSP)\n");
printf(" followed by the path to the executable to load on that core.\n");
printf(" -T <arg> specify the hibernation timeout in ms, Default:"
" 5000 ms)\n");
#else
- printf("\n%s: [-gdc] <core_id1> <executable1> [<core_id2> <executable2> ...]\n",
+ printf("\n%s: [-gdca] <core_id1> <executable1> [<core_id2> <executable2> ...]\n",
app);
printf(" <core_id#> should be set to a core name (e.g. DSP1, IPU2)\n");
printf(" followed by the path to the executable to load on that core.\n");
printf("Options:\n");
- printf(" -g enable GateMP support on host\n");
+ printf(" -g enable GateMP support on host\n");
#endif
- printf(" -d disable recovery\n");
+ printf(" -d disable recovery\n");
printf(" -c <file> generate dump of slave trace during crashes (use\n");
printf(" absolute path for filename)\n");
+ printf(" -a<n> specify that the first n cores have been pre-loaded\n");
+ printf(" and started. Perform late-attach to these cores.\n");
exit (EXIT_SUCCESS);
}
/* Parse the input args */
while (1)
{
- c = getopt (argc, argv, "H:T:U:gc:dv:");
+ c = getopt (argc, argv, "H:T:U:gc:dv:a:");
if (c == -1)
break;
case 'c':
logFilename = optarg;
break;
+ case 'a':
+ numAttach = atoi(optarg);
+ break;
case 'v':
verbosity++;
break;
return (error);
}
syslink_firmware[syslink_num_cores].proc = argv [optind];
+ syslink_firmware[syslink_num_cores].attachOnly =
+ ((numAttach-- > 0) ? true : false);
syslink_firmware[syslink_num_cores++].firmware = argv [optind+1];
}
-
/* Get the name of the binary from the input args */
if (!syslink_num_cores) {
fprintf(stderr, "At least one core_id and executable must be "\
diff --git a/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayudsp/VAYUDspProc.c b/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayudsp/VAYUDspProc.c
index c968b59c3cd5338a859317e1500cfec13225b50b..9554562fbd8647e17e3de17b3dd0405e997c3807 100644 (file)
handle->procFxnTable.map = &VAYUDSPPROC_map;
handle->procFxnTable.unmap = &VAYUDSPPROC_unmap;
handle->procFxnTable.translateAddr = &VAYUDSPPROC_translate;
+ handle->procFxnTable.translateFromPte = NULL;
handle->state = ProcMgr_State_Unknown;
/* Allocate memory for the VAYUDSPPROC handle */
/* search for dsp memory map */
status = RscTable_process(procHandle->procId,
TRUE,
- &memBlock.numEntries);
+ &memBlock.numEntries,
+ procHandle,
+ procHandle->bootMode);
if (status < 0 || memBlock.numEntries > SYSLINK_MAX_MEMENTRIES) {
/*! @retval PROCESSOR_E_INVALIDARG Invalid argument */
status = PROCESSOR_E_INVALIDARG;
diff --git a/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayuipu/vayucore0/VAYUIpuCore0Proc.c b/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayuipu/vayucore0/VAYUIpuCore0Proc.c
index f2ba037154f4ea998e02ce91d587875f218c71e3..e569112dd2caed16ef5254989d915f053dfe3cd4 100644 (file)
handle->procFxnTable.map = &VAYUIPUCORE0PROC_map;
handle->procFxnTable.unmap = &VAYUIPUCORE0PROC_unmap;
handle->procFxnTable.translateAddr = &VAYUIPUCORE0PROC_translate;
+ handle->procFxnTable.translateFromPte =
+ &VAYUIPUCORE0PROC_translateFromPte;
handle->state = ProcMgr_State_Unknown;
/* Allocate memory for the VAYUIPUCORE0PROC handle */
object = (VAYUIPUCORE0PROC_Object *) procHandle->object;
GT_assert (curTrace, (object != NULL));
+ /* Initialize halObject for Processor_translateFromPte to work */
+ halParams.procId = procHandle->procId;
+ status = VAYUIPU_halInit(&(object->halObject), &halParams);
+
+ if (status < 0) {
+ GT_setFailureReason(curTrace, GT_4CLASS,
+ "VAYUIPUCORE0PROC_attach", status,
+ "VAYUIPU_halInit failed");
+ }
+
/* Added for Netra Benelli core1 is cortex M4 */
params->procArch = Processor_ProcArch_M4;
GT_0trace(curTrace, GT_1CLASS,
"VAYUIPUCORE0PROC_attach: Mapping memory regions");
- /* search for dsp memory map */
- status = RscTable_process(procHandle->procId,
+ if (status >= 0) {
+ /* search for dsp memory map */
+ status = RscTable_process(procHandle->procId,
TRUE,
- &memBlock.numEntries);
- if (status < 0 || memBlock.numEntries > SYSLINK_MAX_MEMENTRIES) {
- /*! @retval PROCESSOR_E_INVALIDARG Invalid argument */
- status = PROCESSOR_E_INVALIDARG;
- GT_setFailureReason (curTrace,
+ &memBlock.numEntries,
+ procHandle,
+ procHandle->bootMode);
+ if (status < 0 || memBlock.numEntries > SYSLINK_MAX_MEMENTRIES) {
+ /*! @retval PROCESSOR_E_INVALIDARG Invalid argument */
+ status = PROCESSOR_E_INVALIDARG;
+ GT_setFailureReason (curTrace,
GT_4CLASS,
"VAYUIPUCORE0PROC_attach",
status,
"Failed to process resource table");
- }
- else {
- status = RscTable_getMemEntries(procHandle->procId,
+ }
+ else {
+ status = RscTable_getMemEntries(procHandle->procId,
memBlock.memEntries,
&memBlock.numEntries);
- if (status < 0) {
- /*! @retval PROCESSOR_E_INVALIDARG Invalid argument */
- status = PROCESSOR_E_INVALIDARG;
- GT_setFailureReason (curTrace,
+ if (status < 0) {
+ /*! @retval PROCESSOR_E_INVALIDARG Invalid argument */
+ status = PROCESSOR_E_INVALIDARG;
+ GT_setFailureReason (curTrace,
GT_4CLASS,
"VAYUIPUCORE0PROC_attach",
status,
"Failed to get resource table memEntries");
+ }
}
}
memcpy((Ptr)params->memEntries, (Ptr)object->params.memEntries,
sizeof(ProcMgr_AddrInfo) * params->numMemEntries);
- halParams.procId = procHandle->procId;
- status = VAYUIPU_halInit(&(object->halObject), &halParams);
+ if ((procHandle->bootMode == ProcMgr_BootMode_Boot)
+ || (procHandle->bootMode == ProcMgr_BootMode_NoLoad_Pwr)) {
#if !defined(SYSLINK_BUILD_OPTIMIZE)
- if (status < 0) {
- GT_setFailureReason(curTrace, GT_4CLASS,
- "VAYUIPUCORE0PROC_attach", status,
- "VAYUIPU_halInit failed");
- }
- else {
+ if (status < 0) {
+ GT_setFailureReason(curTrace, GT_4CLASS,
+ "VAYUIPUCORE0PROC_attach", status,
+ "Failed to reset the slave processor");
+ }
+ else {
#endif
- if ((procHandle->bootMode == ProcMgr_BootMode_Boot)
- || (procHandle->bootMode == ProcMgr_BootMode_NoLoad_Pwr)) {
+ GT_0trace(curTrace, GT_1CLASS,
+ "VAYUIPUCORE0PROC_attach: slave is now in reset");
+ mmuEnableArgs.numMemEntries = 0;
+ status = VAYUIPU_halMmuCtrl(object->halObject,
+ Processor_MmuCtrlCmd_Enable, &mmuEnableArgs);
#if !defined(SYSLINK_BUILD_OPTIMIZE)
if (status < 0) {
GT_setFailureReason(curTrace, GT_4CLASS,
"VAYUIPUCORE0PROC_attach", status,
- "Failed to reset the slave processor");
+ "Failed to enable the slave MMU");
}
else {
#endif
- GT_0trace(curTrace, GT_1CLASS,
- "VAYUIPUCORE0PROC_attach: slave is now in reset");
-
- mmuEnableArgs.numMemEntries = 0;
- status = VAYUIPU_halMmuCtrl(object->halObject,
- Processor_MmuCtrlCmd_Enable, &mmuEnableArgs);
-#if !defined(SYSLINK_BUILD_OPTIMIZE)
+ GT_0trace(curTrace, GT_2CLASS,
+ "VAYUIPUCORE0PROC_attach: Slave MMU "
+ "is configured!");
+ /*
+ * Pull IPU MMU out of reset to make internal
+ * memory "loadable"
+ */
+ status = VAYUIPUCORE0_halResetCtrl(
+ object->halObject,
+ Processor_ResetCtrlCmd_MMU_Release);
if (status < 0) {
- GT_setFailureReason(curTrace, GT_4CLASS,
- "VAYUIPUCORE0PROC_attach", status,
- "Failed to enable the slave MMU");
+ /*! @retval status */
+ GT_setFailureReason(curTrace,
+ GT_4CLASS,
+ "VAYUIPUCORE0_halResetCtrl",
+ status,
+ "Reset MMU_Release failed");
}
- else {
-#endif
- GT_0trace(curTrace, GT_2CLASS,
- "VAYUIPUCORE0PROC_attach: Slave MMU "
- "is configured!");
- /*
- * Pull IPU MMU out of reset to make internal
- * memory "loadable"
- */
- status = VAYUIPUCORE0_halResetCtrl(
- object->halObject,
- Processor_ResetCtrlCmd_MMU_Release);
- if (status < 0) {
- /*! @retval status */
- GT_setFailureReason(curTrace,
- GT_4CLASS,
- "VAYUIPUCORE0_halResetCtrl",
- status,
- "Reset MMU_Release failed");
- }
#if !defined(SYSLINK_BUILD_OPTIMIZE)
- }
}
-#endif
}
-#if !defined(SYSLINK_BUILD_OPTIMIZE)
- }
#endif
+ }
}
#if !defined(SYSLINK_BUILD_OPTIMIZE)
}
return status;
}
+/*!
+ * @brief Translate slave virtual address to master physical address
+ * by inspecting page table entries.
+ *
+ * @param handle Handle to the Processor object
+ * @param dstAddr Returned: master physical address.
+ * @param srcAddr Slave virtual address.
+ *
+ * @sa
+ */
+Int
+VAYUIPUCORE0PROC_translateFromPte(
+ Processor_Handle handle,
+ UInt32 * dstAddr,
+ UInt32 srcAddr)
+{
+ Int status = PROCESSOR_SUCCESS;
+ Processor_Object * procHandle= (Processor_Object *)handle;
+ VAYUIPUCORE0PROC_Object * object = NULL;
+
+ GT_3trace(curTrace, GT_ENTER, "VAYUIPUCORE0PROC_translateFromPte",
+ handle, dstAddr, srcAddr);
+
+ GT_assert (curTrace, (handle != NULL));
+ GT_assert (curTrace, (dstAddr != NULL));
+
+#if !defined(SYSLINK_BUILD_OPTIMIZE)
+ if (handle == NULL) {
+ /*! @retval PROCESSOR_E_HANDLE Invalid argument */
+ status = PROCESSOR_E_HANDLE;
+ GT_setFailureReason (curTrace,
+ GT_4CLASS,
+ "VAYUIPUCORE0PROC_translateFromPte",
+ status,
+ "Invalid handle specified");
+ }
+ else if (dstAddr == NULL) {
+ /*! @retval PROCESSOR_E_INVALIDARG sglist provided as NULL */
+ status = PROCESSOR_E_INVALIDARG;
+ GT_setFailureReason (curTrace,
+ GT_4CLASS,
+ "VAYUIPUCORE0PROC_translateFromPte",
+ status,
+ "dstAddr provided as NULL");
+ }
+ else {
+#endif
+ object = (VAYUIPUCORE0PROC_Object *)procHandle->object;
+ GT_assert(curTrace, (object != NULL));
+ *dstAddr = -1u;
+
+ status = rproc_mem_lookup(object->halObject, srcAddr, dstAddr);
+
+ if (status < 0) {
+ /* srcAddr not found in slave address space */
+ status = PROCESSOR_E_INVALIDARG;
+ GT_setFailureReason(curTrace, GT_4CLASS,
+ "VAYUIPUCORE0PROC_translateFromPte", status,
+ "srcAddr not found in slave address space");
+ }
+#if !defined(SYSLINK_BUILD_OPTIMIZE)
+ }
+#endif
+ GT_1trace(curTrace, GT_LEAVE,
+ "VAYUIPUCORE0PROC_translateFromPte: status=0x%x", status);
+
+ /*! @retval PROCESSOR_SUCCESS Operation successful */
+ return status;
+}
+
+
/*!
* @brief Map the given address translation into the slave mmu
diff --git a/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayuipu/vayucore1/VAYUIpuCore1Proc.c b/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayuipu/vayucore1/VAYUIpuCore1Proc.c
index 9a67d1823c4b97dbb26d8f3eb8330211025bd658..677def152d151e19ab3d181f603e997392c9fbb3 100644 (file)
handle->procFxnTable.map = &VAYUIPUCORE1PROC_map;
handle->procFxnTable.unmap = &VAYUIPUCORE1PROC_unmap;
handle->procFxnTable.translateAddr = &VAYUIPUCORE1PROC_translate;
+ handle->procFxnTable.translateFromPte = NULL;
handle->state = ProcMgr_State_Unknown;
/* Allocate memory for the VAYUIPUCORE1PROC handle */
object = (VAYUIPUCORE1PROC_Object *) procHandle->object;
GT_assert (curTrace, (object != NULL));
- /* Added for Netra Benelli core0 is cortex M4 */
+ /* Initialize halObject for Processor_translateFromPte to work */
+ halParams.procId = procHandle->procId;
+ status = VAYUIPU_halInit(&(object->halObject), &halParams);
+
+ if (status < 0) {
+ GT_setFailureReason(curTrace, GT_4CLASS,
+ "VAYUIPUCORE1PROC_attach", status,
+ "VAYUIPU_halInit failed");
+ }
+
+ /* Added for Netra Benelli core1 is cortex M4 */
params->procArch = Processor_ProcArch_M4;
object->pmHandle = params->pmHandle;
GT_0trace(curTrace, GT_1CLASS,
"VAYUIPUCORE1PROC_attach: Mapping memory regions");
- /* search for dsp memory map */
- status = RscTable_process(procHandle->procId,
+ if (status >= 0) {
+ /* search for dsp memory map */
+ status = RscTable_process(procHandle->procId,
TRUE,
- &memBlock.numEntries);
- if (status < 0 || memBlock.numEntries > SYSLINK_MAX_MEMENTRIES) {
- /*! @retval PROCESSOR_E_INVALIDARG Invalid argument */
- status = PROCESSOR_E_INVALIDARG;
- GT_setFailureReason (curTrace,
+ &memBlock.numEntries,
+ procHandle,
+ procHandle->bootMode);
+ if (status < 0 || memBlock.numEntries > SYSLINK_MAX_MEMENTRIES) {
+ /*! @retval PROCESSOR_E_INVALIDARG Invalid argument */
+ status = PROCESSOR_E_INVALIDARG;
+ GT_setFailureReason (curTrace,
GT_4CLASS,
"VAYUIPUCORE1PROC_attach",
status,
"Failed to process resource table");
- }
- else {
- status = RscTable_getMemEntries(procHandle->procId,
+ }
+ else {
+ status = RscTable_getMemEntries(procHandle->procId,
memBlock.memEntries,
&memBlock.numEntries);
- if (status < 0) {
- /*! @retval PROCESSOR_E_INVALIDARG Invalid argument */
- status = PROCESSOR_E_INVALIDARG;
- GT_setFailureReason (curTrace,
+ if (status < 0) {
+ /*! @retval PROCESSOR_E_INVALIDARG Invalid argument */
+ status = PROCESSOR_E_INVALIDARG;
+ GT_setFailureReason (curTrace,
GT_4CLASS,
"VAYUIPUCORE1PROC_attach",
status,
"Failed to get resource table memEntries");
+ }
}
}
memcpy((Ptr)params->memEntries, (Ptr)object->params.memEntries,
sizeof(ProcMgr_AddrInfo) * params->numMemEntries);
- halParams.procId = procHandle->procId;
- status = VAYUIPU_halInit(&(object->halObject), &halParams);
+ if ((procHandle->bootMode == ProcMgr_BootMode_Boot)
+ || (procHandle->bootMode == ProcMgr_BootMode_NoLoad_Pwr)) {
-#if !defined(SYSLINK_BUILD_OPTIMIZE) && defined(SYSLINK_BUILD_HLOS)
- if (status < 0) {
- GT_setFailureReason(curTrace, GT_4CLASS,
- "VAYUIPUCORE1PROC_attach", status,
- "VAYUIPU_halInit failed");
- }
- else {
+#if !defined(SYSLINK_BUILD_OPTIMIZE)
+ if (status < 0) {
+ GT_setFailureReason(curTrace, GT_4CLASS,
+ "VAYUIPUCORE1PROC_attach", status,
+ "Failed to reset the slave processor");
+ }
+ else {
#endif
- if ((procHandle->bootMode == ProcMgr_BootMode_Boot)
- || (procHandle->bootMode == ProcMgr_BootMode_NoLoad_Pwr)) {
+ GT_0trace(curTrace, GT_1CLASS,
+ "VAYUIPUCORE1PROC_attach: slave is now in reset");
+ mmuEnableArgs.numMemEntries = 0;
+ status = VAYUIPU_halMmuCtrl(object->halObject,
+ Processor_MmuCtrlCmd_Enable, &mmuEnableArgs);
#if !defined(SYSLINK_BUILD_OPTIMIZE)
if (status < 0) {
GT_setFailureReason(curTrace, GT_4CLASS,
"VAYUIPUCORE1PROC_attach", status,
- "Failed to reset the slave processor");
+ "Failed to enable the slave MMU");
}
else {
#endif
- GT_0trace(curTrace, GT_1CLASS,
- "VAYUIPUCORE1PROC_attach: slave is now in reset");
-
- mmuEnableArgs.numMemEntries = 0;
- status = VAYUIPU_halMmuCtrl(object->halObject,
- Processor_MmuCtrlCmd_Enable, &mmuEnableArgs);
-#if !defined(SYSLINK_BUILD_OPTIMIZE)
+ GT_0trace(curTrace, GT_2CLASS,
+ "VAYUIPUCORE1PROC_attach: Slave MMU "
+ "is configured!");
+ /*
+ * Pull IPU MMU out of reset to make internal
+ * memory "loadable"
+ */
+ status = VAYUIPUCORE1_halResetCtrl(
+ object->halObject,
+ Processor_ResetCtrlCmd_MMU_Release);
if (status < 0) {
- GT_setFailureReason(curTrace, GT_4CLASS,
- "VAYUIPUCORE1PROC_attach", status,
- "Failed to enable the slave MMU");
+ /*! @retval status */
+ GT_setFailureReason(curTrace,
+ GT_4CLASS,
+ "VAYUIPUCORE1_halResetCtrl",
+ status,
+ "Reset MMU_Release failed");
}
- else {
-#endif
- GT_0trace(curTrace, GT_2CLASS,
- "VAYUIPUCORE1PROC_attach: Slave MMU "
- "is configured!");
- /*
- * Pull IPU MMU out of reset to make internal
- * memory "loadable"
- */
- status = VAYUIPUCORE1_halResetCtrl(
- object->halObject,
- Processor_ResetCtrlCmd_MMU_Release);
- if (status < 0) {
- /*! @retval status */
- GT_setFailureReason(curTrace,
- GT_4CLASS,
- "VAYUIPUCORE1_halResetCtrl",
- status,
- "Reset MMU_Release failed");
- }
#if !defined(SYSLINK_BUILD_OPTIMIZE)
- }
}
-#endif
}
-#if !defined(SYSLINK_BUILD_OPTIMIZE) && defined (SYSLINK_BUILD_HLOS)
- }
#endif
+ }
}
#if !defined(SYSLINK_BUILD_OPTIMIZE) && defined (SYSLINK_BUILD_HLOS)
}
diff --git a/qnx/src/ipc3x_dev/ti/syslink/family/vayu/vayuipu/VAYUIpuEnabler.c b/qnx/src/ipc3x_dev/ti/syslink/family/vayu/vayuipu/VAYUIpuEnabler.c
index e3ae4b227ed3b10b0c55e4b9e9e49fd5cd7f229a..cde244b81614c23d8409ea58efe34a070b668e48 100644 (file)
*
* ============================================================================
*
- * Copyright (c) 2013, Texas Instruments Incorporated
+ * Copyright (c) 2013-2014, Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
#define PAGE_SIZE 0x1000
+/* Size of L1 translation table */
+#define TRANSLATION_TABLE_SIZE 0x4000
+
/* Attributes of L2 page tables for DSP MMU.*/
struct page_info {
/* Number of valid PTEs in the L2 PT*/
return status;
}
+/*
+ * ======== rproc_mem_lookup ========
+ * Look up the physical address of a virtual address based on PTEs
+ */
+Int rproc_mem_lookup(VAYUIPU_HalObject * halObject,
+ UInt32 da, UInt32 * pAddr)
+{
+ UInt32 L1_base_va = 0;
+ UInt32 L2_base_va = 0;
+ UInt32 L2_base_pa;
+ UInt32 pte_val;
+ UInt32 pte_size;
+ UInt32 pte_addr_l1;
+ UInt32 pte_addr_l2 = 0;
+ UInt32 vaCurr;
+ Int status = 0;
+ VAYUIpu_MMURegs * mmuRegs;
+ UInt32 tableBaseAddr = 0;
+
+ if (halObject == NULL) {
+ status = -ENOMEM;
+ GT_setFailureReason (curTrace,
+ GT_4CLASS,
+ "rproc_mem_lookup",
+ status,
+ "halObject is NULL");
+ }
+ else if (halObject->mmuBase == 0) {
+ status = -ENOMEM;
+ GT_setFailureReason (curTrace,
+ GT_4CLASS,
+ "rproc_mem_lookup",
+ status,
+ "halObject->mmuBase is 0");
+ }
+ else {
+ /* Retrieve the L1 page table's physical address from TTB */
+ mmuRegs = (VAYUIpu_MMURegs *)halObject->mmuBase;
+ tableBaseAddr = INREG32(&mmuRegs->TTB);
+ vaCurr = da;
+
+ /* Temporarily map to virtual address space */
+ L1_base_va = (UInt32) mmap(NULL,
+ TRANSLATION_TABLE_SIZE,
+ PROT_NOCACHE | PROT_READ | PROT_WRITE,
+ MAP_PHYS | MAP_PRIVATE,
+ NOFD,
+ (off_t)tableBaseAddr);
+ if (L1_base_va == (UInt32)MAP_FAILED) {
+ status = -ENOMEM;
+ GT_setFailureReason (curTrace,
+ GT_4CLASS,
+ "rproc_mem_lookup",
+ status,
+ "Memory map failed.");
+ goto EXIT_LOOP;
+ }
+
+ /* Lookup entry in L1 page table */
+ pte_addr_l1 = hw_mmu_pte_addr_l1(L1_base_va, vaCurr);
+ pte_val = *(UInt32 *)pte_addr_l1;
+ pte_size = hw_mmu_pte_sizel1(pte_val);
+
+ if (pte_size == HW_MMU_COARSE_PAGE_SIZE) {
+ /*
+ * Get the L2 PA from the L1 PTE, and find
+ * corresponding L2 VA
+ */
+ L2_base_pa = hw_mmu_pte_coarsel1(pte_val);
+
+ /* Temporarily map to virtual address space */
+ L2_base_va = (UInt32)mmap(NULL, HW_MMU_COARSE_PAGE_SIZE,
+ PROT_NOCACHE | PROT_READ | PROT_WRITE,
+ MAP_PHYS | MAP_PRIVATE,
+ NOFD,
+ (off_t)L2_base_pa);
+ if (L2_base_va == (UInt32)MAP_FAILED) {
+ status = -ENOMEM;
+ GT_setFailureReason (curTrace,
+ GT_4CLASS,
+ "rproc_mem_lookup",
+ status,
+ "Memory map failed.");
+ goto EXIT_LOOP;
+ }
+
+ /*
+ * Find the L2 PTE address from which we will start
+ * clearing, the number of PTEs to be cleared on this
+ * page, and the size of VA space that needs to be
+ * cleared on this L2 page
+ */
+ pte_addr_l2 = hw_mmu_pte_addr_l2(L2_base_va, vaCurr);
+ /*
+ * Unmap the VA space on this L2 PT. A quicker way
+ * would be to clear pte_count entries starting from
+ * pte_addr_l2. However, below code checks that we don't
+ * clear invalid entries or less than 64KB for a 64KB
+ * entry. Similar checking is done for L1 PTEs too
+ * below
+ */
+ pte_val = *(UInt32 *)pte_addr_l2;
+ pte_size = hw_mmu_pte_sizel2(pte_val);
+ /* vaCurr aligned to pte_size? */
+ if (pte_size != 0) {
+ /* Obtain Physical address from VA */
+ *pAddr = (pte_val & ~(pte_size - 1));
+ *pAddr += (vaCurr & (pte_size - 1));
+ }
+ else {
+ /* Error. Not found */
+ *pAddr = 0;
+ status = -EFAULT;
+ }
+ }
+ else if (pte_size != 0) {
+ /* pte_size = 1 MB or 16 MB */
+ /* entry is in L1 page table */
+ *pAddr = (pte_val & ~(pte_size - 1));
+ *pAddr += (vaCurr & (pte_size - 1));
+ }
+ else {
+ /* Not found */
+ *pAddr = 0;
+ status = -EFAULT;
+ }
+ }
+
+EXIT_LOOP:
+
+ if ((L2_base_va != 0) && (L2_base_va != (UInt32)MAP_FAILED)) {
+ munmap((void *)L2_base_va, HW_MMU_COARSE_PAGE_SIZE);
+ }
+
+ if ((L1_base_va != 0) && (L1_base_va != (UInt32)MAP_FAILED)) {
+ munmap((void *)L1_base_va, TRANSLATION_TABLE_SIZE);
+ }
+
+ return status;
+}
/*
diff --git a/qnx/src/ipc3x_dev/ti/syslink/inc/knl/ProcDefs.h b/qnx/src/ipc3x_dev/ti/syslink/inc/knl/ProcDefs.h
index cfb67b2e6741fc5ec09ac18fe3bbf7ad4ecc8d0b..0be29a369ce0f11e51ce48408ce518b1bfd647fa 100644 (file)
*
* ============================================================================
*
- * Copyright (c) 2008-2009, Texas Instruments Incorporated
+ * Copyright (c) 2008-2014, Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
Ptr arg,
ProcMgr_State state []);
+/*!
+ * @brief Function pointer type for the function to translate between
+ * two types of address spaces.
+ */
+typedef Int (*Processor_TranslateFromPteFxn) (Processor_Handle handle,
+ UInt32 * dstAddr,
+ UInt32 srcAddr);
+
/* =============================================================================
* Function table interface
* =============================================================================
Processor_GetProcInfoFxn getProcInfo;
/* !< Function to Get the proc info of the slave */
Processor_VirtToPhysFxn virtToPhys;
- /* Function to convert Virtual to Physical pages */
+ /*!< Function to convert Virtual to Physical pages */
+ Processor_TranslateFromPteFxn translateFromPte;
+ /*!< Function to translate slave virtual address into physical using page table */
} Processor_FxnTable;
diff --git a/qnx/src/ipc3x_dev/ti/syslink/inc/knl/Processor.h b/qnx/src/ipc3x_dev/ti/syslink/inc/knl/Processor.h
index d4ac6700c3d084ee6447446b5bac80ff147a360d..0be47e8edc0bea0b4b9a32b8ff96553f354bf780 100644 (file)
*
* ============================================================================
*
- * Copyright (c) 2008-2009, Texas Instruments Incorporated
+ * Copyright (c) 2008-2014, Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
UInt32 srcAddr)
;
+/* Function to translate slave virtual address to physical using page table */
+Int Processor_translateFromPte (Processor_Handle handle,
+ UInt32 * dstAddr,
+ UInt32 srcAddr)
+;
+
/* Function to map address to slave address space */
Int Processor_map (Processor_Handle handle,
UInt32 * dstAddr,
diff --git a/qnx/src/ipc3x_dev/ti/syslink/inc/knl/VAYUIpuEnabler.h b/qnx/src/ipc3x_dev/ti/syslink/inc/knl/VAYUIpuEnabler.h
index 933ebd6b614bc053fe172eb11c5a0cb63dec8379..3d73cac4c1f7e3515d3c656f5070794c759066e2 100644 (file)
*
* ============================================================================
*
- * Copyright (c) 2013, Texas Instruments Incorporated
+ * Copyright (c) 2013-2014, Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
Int rproc_ipu_setup (VAYUIPU_HalObject * halObject,
ProcMgr_AddrInfo * memEntries, UInt32 numMemEntries);
Void rproc_ipu_destroy (VAYUIPU_HalObject * halObject);
+
+Int rproc_mem_lookup(VAYUIPU_HalObject * halObject,
+ UInt32 da, UInt32 * pAddr);
+
UInt32 get_IpuVirtAdd (VAYUIPU_HalObject * halObject,
UInt32 physAdd);
Int save_ipu_mmu_ctxt (VAYUIPU_HalObject * halObject, UInt32 procId);
diff --git a/qnx/src/ipc3x_dev/ti/syslink/inc/knl/_VAYUIpuCore0Proc.h b/qnx/src/ipc3x_dev/ti/syslink/inc/knl/_VAYUIpuCore0Proc.h
index a8c535a48f9b40907499eaec8fac38c802b968bd..4ece7f2c33c74e32429f55299d107734369d8830 100644 (file)
/*
* ============================================================================
*
- * Copyright (c) 2013, Texas Instruments Incorporated
+ * Copyright (c) 2013-2014, Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
UInt32 * dstAddr,
UInt32 srcAddr);
+/*
+ * Function to translate slave virtual address into master physical address
+ * using page table
+ */
+Int VAYUIPUCORE0PROC_translateFromPte (Processor_Handle handle,
+ UInt32 * dstAddr, UInt32 srcAddr);
+
/* Function to map slave address to host address space */
Int VAYUIPUCORE0PROC_map (Processor_Handle handle,
UInt32 * dstAddr,
diff --git a/qnx/src/ipc3x_dev/ti/syslink/ipc/hlos/knl/Ipc.c b/qnx/src/ipc3x_dev/ti/syslink/ipc/hlos/knl/Ipc.c
index d6998c0e386906c5f561000fb66d495961e0b5d7..2d6d82d5211a84821098b817bb77e2e7ef7a735f 100644 (file)
}
if (status >= 0) {
+ /* flush the resource table to device memory */
status = RscTable_update(remoteProcId, procHandle);
}
ProcMgr_close(&procHandle);
diff --git a/qnx/src/ipc3x_dev/ti/syslink/procMgr/hlos/knl/Processor.c b/qnx/src/ipc3x_dev/ti/syslink/procMgr/hlos/knl/Processor.c
index 0f9570806f41a314a2df783e1b5ec1424a6ee685..40afc24e15100f7b57a5f145098dcc4ff4fa3aa7 100644 (file)
*
* ============================================================================
*
- * Copyright (c) 2008-2012, Texas Instruments Incorporated
+ * Copyright (c) 2008-2014, Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
return status;
}
+/*!
+ * @brief Function to translate slave virtual address to master physical
+ * address using MMU page table entries
+ *
+ * @param handle Handle to the Processor object
+ * @param dstAddr Returned: master physical address.
+ * @param srcAddr Slave virtual address.
+ *
+ * @sa
+ */
+inline
+Int
+Processor_translateFromPte(Processor_Handle handle,
+ UInt32 * dstAddr,
+ UInt32 srcAddr)
+{
+ Int status = PROCESSOR_SUCCESS;
+ Processor_Object * procHandle = (Processor_Object *) handle;
+
+ GT_3trace (curTrace, GT_ENTER, "Processor_translateFromPte",
+ handle, dstAddr, srcAddr);
+
+ GT_assert (curTrace, (handle != NULL));
+ GT_assert (curTrace, (dstAddr != NULL));
+
+ /* No parameter validation here since this is an internal module, and
+ * validation has already happened at the ProcMgr level.
+ */
+ if (procHandle->procFxnTable.translateFromPte != NULL) {
+ status = procHandle->procFxnTable.translateFromPte(
+ handle, dstAddr, srcAddr);
+ }
+ else {
+ status = PROCESSOR_E_NOTSUPPORTED;
+ }
+
+#if !defined(SYSLINK_BUILD_OPTIMIZE)
+ if (status < 0) {
+ GT_setFailureReason (curTrace,
+ GT_4CLASS,
+ "Processor_translateFromPte",
+ status,
+ "Processor address translation failed!");
+ }
+#endif /* if !defined(SYSLINK_BUILD_OPTIMIZE) */
+
+ GT_1trace (curTrace, GT_LEAVE, "Processor_translateFromPte", status);
+
+ /*! @retval PROCESSOR_SUCCESS Operation successful */
+ return status;
+}
/*!
* @brief Function to map address to slave address space.
diff --git a/qnx/src/ipc3x_dev/ti/syslink/resources/RscTable.c b/qnx/src/ipc3x_dev/ti/syslink/resources/RscTable.c
index ba812c2867495ac564d7f2d2ace9cb1bdf9d8263..6f9f2e328626ba6c589c31e51953325d9cc69e71 100644 (file)
#include <_MultiProc.h>
#include <dload_api.h>
#include <ti/syslink/ProcMgr.h>
+#include <Processor.h>
#include <Bitops.h>
#include <_MessageQCopyDefs.h>
#include <ProcDefs.h>
}
Int
-RscTable_process (UInt16 procId, Bool tryAlloc, UInt32 * numBlocks)
+RscTable_process (UInt16 procId, Bool tryAlloc, UInt32 * numBlocks,
+ Processor_Handle procHandle, ProcMgr_BootMode bootMode)
{
Int status = 0;
Int ret = 0;
RscTable_Header * table = NULL;
UInt i = 0, j = 0;
UInt dmem_num = 0;
+ struct fw_rsc_vdev *vdev = NULL;
+ struct fw_rsc_vdev_vring * vring = NULL;
+ UInt32 vr_size = 0;
#if !ZEROINIT_CHUNKS
UInt32 vringVA = 0, vringSize = 0;
#endif
case TYPE_CARVEOUT :
{
// TODO: need to allocate this mem from carveout
- struct fw_rsc_carveout * cout = (struct fw_rsc_carveout *)entry;
+ struct fw_rsc_carveout * cout =
+ (struct fw_rsc_carveout *)entry;
UInt32 pa = 0;
- if (cout->pa == 0) {
- ret = Chunk_allocate (obj, cout->len, &pa);
+
+ if (bootMode == ProcMgr_BootMode_NoBoot) {
+ /* Lookup physical address of carveout from page table */
+ if (Processor_translateFromPte(procHandle,
+ &cout->pa, cout->da) != ProcMgr_S_SUCCESS) {
+ status = RSCTABLE_E_FAIL;
+ GT_setFailureReason (curTrace,
+ GT_4CLASS,
+ "RscTable_process",
+ status,
+ "Failed to lookup address from page table");
+ ret = -1;
+ }
}
- if (!ret) {
- cout->pa = pa;
+ else {
+ if (cout->pa == 0) {
+ ret = Chunk_allocate (obj, cout->len, &pa);
+ }
+ if (!ret) {
+ cout->pa = pa;
+ }
+ }
+
+ if (ret == 0) {
if (obj->numMemEntries == SYSLINK_MAX_MEMENTRIES) {
ret = -1;
}
else {
obj->memEntries[obj->numMemEntries].slaveVirtAddr =
- cout->da;
+ cout->da;
obj->memEntries[obj->numMemEntries].masterPhysAddr =
- cout->pa;
- obj->memEntries[obj->numMemEntries].size = cout->len;
+ cout->pa;
+ obj->memEntries[obj->numMemEntries].size =
+ cout->len;
obj->memEntries[obj->numMemEntries].map = TRUE;
obj->memEntries[obj->numMemEntries].mapMask =
ProcMgr_SLAVEVIRT;
- obj->memEntries[obj->numMemEntries].isCached = FALSE;
+ obj->memEntries[obj->numMemEntries].isCached =
+ FALSE;
obj->memEntries[obj->numMemEntries].isValid = TRUE;
obj->numMemEntries++;
}
{
// only care about mem in DDR for now
struct fw_rsc_devmem * dmem = (struct fw_rsc_devmem *)entry;
+ UInt32 pa = 0;
+
if (dmem->pa >= DDR_MEM) {
// HACK: treat vring mem specially, vring is always the
// first devmem entry, may change in future
if (dmem_num++ == 0) {
- // memory should already be reserved for vring
- if (obj->vringPa == 0) {
- // vdev must have been defined first
- GT_setFailureReason (curTrace,
+ if (bootMode == ProcMgr_BootMode_NoBoot) {
+ /*
+ * Lookup physical address of vrings from page
+ * table
+ */
+ if (Processor_translateFromPte(procHandle,
+ &pa, dmem->da) != ProcMgr_S_SUCCESS) {
+ status = RSCTABLE_E_FAIL;
+ GT_setFailureReason (curTrace,
+ GT_4CLASS,
+ "RscTable_process",
+ status,
+ "Failed to lookup address from page table");
+ ret = -1;
+ }
+ obj->vringPa = pa;
+ obj->vringBufsPa = pa + vr_size;
+ }
+ else {
+ // memory should already be reserved for vring
+ if (obj->vringPa == 0) {
+ // vdev must have been defined first
+ GT_setFailureReason (curTrace,
GT_4CLASS,
"RscTable_process",
status,
"Vring Must be Defined First");
- ret = -1;
- }
- else if (obj->vringPa != dmem->pa && (!tryAlloc)) {
- // defined pa does not match allocated pa, and
- // either the mmu is disabled or the platform has
- // not given permission to allocate on our own
- ret = -1;
- GT_setFailureReason (curTrace,
+ ret = -1;
+ }
+ else if (obj->vringPa != dmem->pa && (!tryAlloc)) {
+ // defined pa does not match allocated pa, and
+ // either the mmu is disabled or the platform has
+ // not given permission to allocate on our own
+ ret = -1;
+ GT_setFailureReason (curTrace,
GT_4CLASS,
"RscTable_process",
status,
"Vring PA Mis-match");
- GT_2trace (curTrace, GT_4CLASS,
+ GT_2trace (curTrace, GT_4CLASS,
"vringPa is 0x%x, dmem->pa is 0x%x",
obj->vringPa, dmem->pa);
+ }
}
- else {
+ if (ret == 0) {
+#if !ZEROINIT_CHUNKS
+ /* Map the phys mem to local */
+ vringVA = (UInt32)mmap_device_io(vringSize, pa);
+ if (vringVA != MAP_DEVICE_FAILED) {
+ /* Zero-init the vring */
+ Memory_set((Ptr)vringVA, 0, vringSize);
+ munmap_device_io(vringVA, vringSize);
+ }
+ else {
+ GT_0trace(curTrace, GT_4CLASS,
+ "RscTable_alloc: "
+ "Warning - Unable to zero-init vring mem");
+ }
+#endif
+ /*
+ * Override the vring 'da' field in resource table.
+ * This allows the slave to look it up when creating
+ * the VirtQueues
+ */
+ for (j = 0; j < vdev->num_of_vrings; j++) {
+ vring = (struct fw_rsc_vdev_vring *)
+ ((UInt32)vdev + sizeof(*vdev) +
+ (sizeof(*vring) * j));
+ vring->da = obj->vringPa + (j *
+ vr_size / vdev->num_of_vrings);
+ }
+
+ /*
+ * Override the physical address provided by the
+ * entry with the physical locations of the vrings
+ * as allocated when we processed the vdev entry
+ * (or as allocated by external loader for late
+ * attach mode)
+ */
dmem->pa = obj->vringPa;
}
}
case TYPE_VDEV :
{
// TODO: save vring info for future use
- struct fw_rsc_vdev *vdev = (struct fw_rsc_vdev *)entry;
- struct fw_rsc_vdev_vring * vring = NULL;
- UInt32 vr_size = 0;
UInt32 vr_bufs_size = 0;
UInt32 pa = 0;
+
+ vdev = (struct fw_rsc_vdev *)entry;
obj->numVrings = vdev->num_of_vrings;
obj->vrings = Memory_alloc(NULL,
sizeof (*vring) * obj->numVrings, 0,
vr_size += ROUND_UP(MessageQCopy_RINGSIZE, 0x4000);
vr_bufs_size += (vring->num) * RPMSG_BUF_SIZE;
}
- if (!ret) {
+ if ((!ret) && (bootMode != ProcMgr_BootMode_NoBoot)) {
// HACK: round up to multiple of 1MB, because we know this
// is the size of the remote entry
ret = Chunk_allocate(obj,
- ROUND_UP(vr_size + vr_bufs_size, 0x100000),
- &pa);
- }
- else if (obj->vrings) {
- Memory_free (NULL, obj->vrings,
- sizeof(*vring) * obj->numVrings);
- obj->vrings = NULL;
+ ROUND_UP(vr_size + vr_bufs_size, 0x100000),
+ &pa);
}
if (!ret) {
#if !ZEROINIT_CHUNKS
- /* Map the phys mem to local */
vringSize = vr_size + vr_bufs_size;
- vringVA = (UInt32)mmap_device_io(vringSize, pa);
- if (vringVA != MAP_DEVICE_FAILED) {
- /* Zero-init the vring */
- Memory_set((Ptr)vringVA, 0, vringSize);
- munmap_device_io(vringVA, vringSize);
- }
- else {
- GT_0trace(curTrace, GT_4CLASS,
- "RscTable_alloc: "
- "Warning - Unable to zero-init vring mem");
- }
#endif
-
- obj->vringPa = pa;
- obj->vringBufsPa = pa + vr_size;
-
- /*
- * Override the vring 'da' field in resource table.
- * This allows the slave to look it up when creating
- * the VirtQueues
- */
- for (j = 0; j < vdev->num_of_vrings; j++) {
- vring = (struct fw_rsc_vdev_vring *)
- ((UInt32)vdev + sizeof(*vdev) +
- (sizeof(*vring) * j));
- vring->da = obj->vringPa + (j *
- vr_size / vdev->num_of_vrings);
+ if (bootMode != ProcMgr_BootMode_NoBoot) {
+ obj->vringPa = pa;
+ obj->vringBufsPa = pa + vr_size;
}
}
+ else if (obj->vrings) {
+ Memory_free (NULL, obj->vrings,
+ sizeof(*vring) * obj->numVrings);
+ obj->vrings = NULL;
+ }
+
break;
}
default :
diff --git a/qnx/src/ipc3x_dev/ti/syslink/resources/RscTable.h b/qnx/src/ipc3x_dev/ti/syslink/resources/RscTable.h
index 03abd600e38f38e7cd7691cb574ba8e530494af5..93820d9931b7f109457d132162e3cd980a04967a 100644 (file)
#include <ti/syslink/SysLink.h>
#include <rsc_types.h>
#include <ti/syslink/ProcMgr.h>
+#include <Processor.h>
/*!
* @def RSCTABLE_MODULEID
Int RscTable_free (RscTable_Handle * handle);
-Int RscTable_process (UInt16 procId, Bool tryAlloc, UInt32 * numBlocks);
+Int RscTable_process (UInt16 procId, Bool tryAlloc, UInt32 * numBlocks,
+ Processor_Handle procHandle, ProcMgr_BootMode bootMode);
Int RscTable_getMemEntries (UInt16 procId, SysLink_MemEntry * memEntries,
UInt32 * numMemEntries);