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raw | patch | inline | side by side (parent: d0e4ce1)
raw | patch | inline | side by side (parent: d0e4ce1)
author | Angela Stegmaier <angelabaker@ti.com> | |
Mon, 16 May 2016 21:06:46 +0000 (16:06 -0500) | ||
committer | Angela Stegmaier <angelabaker@ti.com> | |
Wed, 18 May 2016 22:21:44 +0000 (17:21 -0500) |
This patch essentially reverts the following commits:
1. "Add fw_rsc_intmem definition to support new TYPE_INTMEM entries in QNX"
(commit 4a5f6fd0864854a99d430c6e6e7c65fb962f00e4)
2. " Add INTMEM resource type support in QNX"
(commit eb3d6bcfd35b823746c6032a9f811fc414824704)
Support for TYPE_INTMEM is being removed. Instead the internal memory
regions will be available by default from the QNX resource manager, without
the remote core image needing to speicify a special resource table
entry. The changes are being made to align with coming BIOS-side changes
to remove the TYPE_INTMEM.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
1. "Add fw_rsc_intmem definition to support new TYPE_INTMEM entries in QNX"
(commit 4a5f6fd0864854a99d430c6e6e7c65fb962f00e4)
2. " Add INTMEM resource type support in QNX"
(commit eb3d6bcfd35b823746c6032a9f811fc414824704)
Support for TYPE_INTMEM is being removed. Instead the internal memory
regions will be available by default from the QNX resource manager, without
the remote core image needing to speicify a special resource table
entry. The changes are being made to align with coming BIOS-side changes
to remove the TYPE_INTMEM.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
diff --git a/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayudsp/VAYUDspProc.c b/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayudsp/VAYUDspProc.c
index 3b15edcbbf60375dedc264fa3b0c4d73dc67cc3b..65bd52ac1760beb3455a385d5cdad06feb37461c 100644 (file)
*
* ============================================================================
*
*
* ============================================================================
*
- * Copyright (c) 2013-2015, Texas Instruments Incorporated
+ * Copyright (c) 2013-2016, Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* =============================================================================
*/
* =============================================================================
*/
+/*!
+ * @brief Number of static entries in address translation table.
+ */
+#define AddrTable_STATIC_COUNT 3
/*!
* @brief Max entries in address translation table.
/*!
* @brief Max entries in address translation table.
/*!< MultiProc id of DSP1 (to avoid multiple lookups) */
} VAYUDSPPROC_ModuleObject;
/*!< MultiProc id of DSP1 (to avoid multiple lookups) */
} VAYUDSPPROC_ModuleObject;
-/* Memory region counters */
+/* Default memory regions */
static UInt32 AddrTable_count[NUM_DSPS] = {
static UInt32 AddrTable_count[NUM_DSPS] = {
- 0,
- 0
+ AddrTable_STATIC_COUNT,
+ AddrTable_STATIC_COUNT
};
/*
* Address translation table
};
/*
* Address translation table
+ * static memory regions
+ * CAUTION: AddrTable_STATIC_COUNT must match number of entries below.
*/
*/
-static ProcMgr_AddrInfo AddrTable_DSP1[AddrTable_SIZE];
-static ProcMgr_AddrInfo AddrTable_DSP2[AddrTable_SIZE];
+static ProcMgr_AddrInfo AddrTable_DSP1[AddrTable_SIZE] =
+ {
+ /* L2 RAM */
+ {
+ .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterPhys] = 0x40800000u,
+ .addr[ProcMgr_AddrType_SlaveVirt] = 0x800000u,
+ .addr[ProcMgr_AddrType_SlavePhys] = -1u,
+ .size = 0x40000u,
+ .isCached = FALSE,
+ .mapMask = ProcMgr_SLAVEVIRT,
+ .isMapped = TRUE,
+ .refCount = 0u /* refCount set to 0 for static entry */
+ },
+
+ /* L1P RAM */
+ {
+ .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterPhys] = 0x40E00000u,
+ .addr[ProcMgr_AddrType_SlaveVirt] = 0xE00000u,
+ .addr[ProcMgr_AddrType_SlavePhys] = -1u,
+ .size = 0x8000u,
+ .isCached = FALSE,
+ .mapMask = ProcMgr_SLAVEVIRT,
+ .isMapped = TRUE,
+ .refCount = 0u /* refCount set to 0 for static entry */
+ },
+
+ /* L1D RAM */
+ {
+ .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterPhys] = 0x40F00000u,
+ .addr[ProcMgr_AddrType_SlaveVirt] = 0xF00000u,
+ .addr[ProcMgr_AddrType_SlavePhys] = -1u,
+ .size = 0x8000u,
+ .isCached = FALSE,
+ .mapMask = ProcMgr_SLAVEVIRT,
+ .isMapped = TRUE,
+ .refCount = 0u /* refCount set to 0 for static entry */
+ },
+ };
+
+static ProcMgr_AddrInfo AddrTable_DSP2[AddrTable_SIZE] =
+ {
+ /* L2 RAM */
+ {
+ .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterPhys] = 0x41000000u,
+ .addr[ProcMgr_AddrType_SlaveVirt] = 0x800000u,
+ .addr[ProcMgr_AddrType_SlavePhys] = -1u,
+ .size = 0x40000u,
+ .isCached = FALSE,
+ .mapMask = ProcMgr_SLAVEVIRT,
+ .isMapped = TRUE,
+ .refCount = 0u /* refCount set to 0 for static entry */
+ },
+
+ /* L1P RAM */
+ {
+ .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterPhys] = 0x41600000u,
+ .addr[ProcMgr_AddrType_SlaveVirt] = 0xE00000u,
+ .addr[ProcMgr_AddrType_SlavePhys] = -1u,
+ .size = 0x8000u,
+ .isCached = FALSE,
+ .mapMask = ProcMgr_SLAVEVIRT,
+ .isMapped = TRUE,
+ .refCount = 0u /* refCount set to 0 for static entry */
+ },
+
+ /* L1D RAM */
+ {
+ .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterPhys] = 0x41700000u,
+ .addr[ProcMgr_AddrType_SlaveVirt] = 0xF00000u,
+ .addr[ProcMgr_AddrType_SlavePhys] = -1u,
+ .size = 0x8000u,
+ .isCached = FALSE,
+ .mapMask = ProcMgr_SLAVEVIRT,
+ .isMapped = TRUE,
+ .refCount = 0u /* refCount set to 0 for static entry */
+ },
+ };
static ProcMgr_AddrInfo * AddrTable[NUM_DSPS] =
{
static ProcMgr_AddrInfo * AddrTable[NUM_DSPS] =
{
.isSetup = FALSE,
.configSize = sizeof(VAYUDSPPROC_Config),
.gateHandle = NULL,
.isSetup = FALSE,
.configSize = sizeof(VAYUDSPPROC_Config),
.gateHandle = NULL,
- .defInstParams.numMemEntries = 0
+ .defInstParams.numMemEntries = AddrTable_STATIC_COUNT
};
};
}
/* delete all dynamically added entries */
}
/* delete all dynamically added entries */
- for (i = 0; i <
+ for (i = AddrTable_STATIC_COUNT; i <
AddrTable_count[PROCID_TO_DSP(procHandle->procId)]; i++) {
ai = &AddrTable[PROCID_TO_DSP(procHandle->procId)][i];
ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u;
AddrTable_count[PROCID_TO_DSP(procHandle->procId)]; i++) {
ai = &AddrTable[PROCID_TO_DSP(procHandle->procId)][i];
ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u;
ai->isMapped = FALSE;
ai->refCount = 0u;
}
ai->isMapped = FALSE;
ai->refCount = 0u;
}
- object->params.numMemEntries = 0;
- AddrTable_count[PROCID_TO_DSP(procHandle->procId)] = 0;
+ object->params.numMemEntries = AddrTable_STATIC_COUNT;
+ AddrTable_count[PROCID_TO_DSP(procHandle->procId)] = AddrTable_STATIC_COUNT;
//No need to reset.. that will be done in STOP
/*tmpStatus = VAYUDSP_halResetCtrl(object->halObject,
//No need to reset.. that will be done in STOP
/*tmpStatus = VAYUDSP_halResetCtrl(object->halObject,
* is required. Add the entry only if the range does not exist
* in the translation table.
*/
* is required. Add the entry only if the range does not exist
* in the translation table.
*/
+ /* check in static entries first */
for (j = 0;
for (j = 0;
- j < AddrTable_count[PROCID_TO_DSP(procHandle->procId)]; j++) {
+ j < AddrTable_STATIC_COUNT; j++) {
ai = &AddrTable[PROCID_TO_DSP(procHandle->procId)][j];
ai = &AddrTable[PROCID_TO_DSP(procHandle->procId)][j];
+ startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt];
+ endAddr = startAddr + ai->size;
- if (ai->isMapped == TRUE) {
- startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt];
- endAddr = startAddr + ai->size;
+ if ((startAddr <= *dstAddr) && (*dstAddr < endAddr)) {
+ found = TRUE;
- if ((startAddr <= *dstAddr) && (*dstAddr < endAddr)
- && ((*dstAddr + sglist[i].size) <= endAddr)) {
- found = TRUE;
- ai->refCount++;
- break;
+ /* refCount does not need to be incremented for static entries */
+
+ break;
+ }
+ }
+
+ /* if not found in static entries, check in dynamic entries */
+ if (!found) {
+ for (j = AddrTable_STATIC_COUNT;
+ j < AddrTable_count[PROCID_TO_DSP(procHandle->procId)]; j++) {
+ ai = &AddrTable[PROCID_TO_DSP(procHandle->procId)][j];
+
+ if (ai->isMapped == TRUE) {
+ startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt];
+ endAddr = startAddr + ai->size;
+
+ if ((startAddr <= *dstAddr) && (*dstAddr < endAddr)
+ && ((*dstAddr + sglist[i].size) <= endAddr)) {
+ found = TRUE;
+ ai->refCount++;
+ break;
+ }
}
}
}
}
}
}
diff --git a/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayuipu/vayucore0/VAYUIpuCore0Proc.c b/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayuipu/vayucore0/VAYUIpuCore0Proc.c
index 7e596a6cf7a91a18137e0d64263c99f6b31dec0a..a1e24e008d9e531a4c23704850a2cb6fe102bef1 100644 (file)
*
* ============================================================================
*
*
* ============================================================================
*
- * Copyright (c) 2013-2015, Texas Instruments Incorporated
+ * Copyright (c) 2013-2016, Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* =============================================================================
*/
* =============================================================================
*/
+/*!
+ * @brief Number of static entries in address translation table.
+ */
+#define AddrTable_STATIC_COUNT 1
+
/*!
* @brief Max entries in address translation table.
*/
/*!
* @brief Max entries in address translation table.
*/
/* Memory region counters */
static UInt32 AddrTable_count[NUM_IPUS] = {
/* Memory region counters */
static UInt32 AddrTable_count[NUM_IPUS] = {
- 0,
- 0
+ AddrTable_STATIC_COUNT,
+ AddrTable_STATIC_COUNT,
};
/*
* Address translation tables
};
/*
* Address translation tables
+ * CAUTION: AddrTable_STATIC_COUNT must match number of entries below.
*/
*/
-static ProcMgr_AddrInfo AddrTable_IPU1[AddrTable_SIZE];
-static ProcMgr_AddrInfo AddrTable_IPU2[AddrTable_SIZE];
+static ProcMgr_AddrInfo AddrTable_IPU1[AddrTable_SIZE] =
+{
+ /* L2 RAM */
+ {
+ .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterPhys] = 0x58820000u,
+ .addr[ProcMgr_AddrType_SlaveVirt] = 0x20000000u,
+ .addr[ProcMgr_AddrType_SlavePhys] = -1u,
+ .size = 0x10000u,
+ .isCached = FALSE,
+ .mapMask = ProcMgr_SLAVEVIRT,
+ .isMapped = TRUE,
+ .refCount = 0u /* refCount set to 0 for static entry */
+ },
+};
+
+static ProcMgr_AddrInfo AddrTable_IPU2[AddrTable_SIZE] =
+{
+ /* L2 RAM */
+ {
+ .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterPhys] = 0x55020000u,
+ .addr[ProcMgr_AddrType_SlaveVirt] = 0x20000000u,
+ .addr[ProcMgr_AddrType_SlavePhys] = -1u,
+ .size = 0x10000u,
+ .isCached = FALSE,
+ .mapMask = ProcMgr_SLAVEVIRT,
+ .isMapped = TRUE,
+ .refCount = 0u /* refCount set to 0 for static entry */
+ },
+};
static ProcMgr_AddrInfo * AddrTable[NUM_IPUS] =
{
static ProcMgr_AddrInfo * AddrTable[NUM_IPUS] =
{
.isSetup = FALSE,
.configSize = sizeof(VAYUIPUCORE0PROC_Config),
.gateHandle = NULL,
.isSetup = FALSE,
.configSize = sizeof(VAYUIPUCORE0PROC_Config),
.gateHandle = NULL,
- .defInstParams.numMemEntries = 0,
+ .defInstParams.numMemEntries = AddrTable_STATIC_COUNT,
};
};
/*! @retval status */
GT_setFailureReason (curTrace,
GT_4CLASS,
/*! @retval status */
GT_setFailureReason (curTrace,
GT_4CLASS,
- "VAYUIPUCORE0PROC_detach",
+ "VAYUIPUCORE0_halResetCtrl",
status,
"Reset MMU failed");
}
status,
"Reset MMU failed");
}
}
/* delete all dynamically added entries */
}
/* delete all dynamically added entries */
- for (i = 0; i <
+ for (i = AddrTable_STATIC_COUNT; i <
AddrTable_count[PROCID_TO_IPU(procHandle->procId)]; i++) {
ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][i];
ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u;
AddrTable_count[PROCID_TO_IPU(procHandle->procId)]; i++) {
ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][i];
ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u;
ai->isMapped = FALSE;
ai->refCount = 0u;
}
ai->isMapped = FALSE;
ai->refCount = 0u;
}
- object->params.numMemEntries = 0;
- AddrTable_count[PROCID_TO_IPU(procHandle->procId)] = 0;
+ object->params.numMemEntries = AddrTable_STATIC_COUNT;
+ AddrTable_count[PROCID_TO_IPU(procHandle->procId)] =
+ AddrTable_STATIC_COUNT;
//No need to reset.. that will be done in STOP
/*tmpStatus = VAYUIPUCORE0_halResetCtrl(object->halObject,
//No need to reset.. that will be done in STOP
/*tmpStatus = VAYUIPUCORE0_halResetCtrl(object->halObject,
* is required. Add the entry only if the range does not exist
* in the translation table.
*/
* is required. Add the entry only if the range does not exist
* in the translation table.
*/
- for (j = 0;
- j < AddrTable_count[PROCID_TO_IPU(procHandle->procId)]; j++) {
+ /* check in static entries first */
+ for (j = 0; j < AddrTable_STATIC_COUNT; j++) {
ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][j];
ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][j];
+ startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt];
+ endAddr = startAddr + ai->size;
- if (ai->isMapped == TRUE) {
- startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt];
- endAddr = startAddr + ai->size;
+ if ((startAddr <= *dstAddr) && (*dstAddr < endAddr)) {
+ found = TRUE;
+ /* refCount does not need to be incremented for static entries */
+ break;
+ }
+ }
- if ((startAddr <= *dstAddr) && (*dstAddr < endAddr)
- && ((*dstAddr + sglist[i].size) <= endAddr)) {
- found = TRUE;
- ai->refCount++;
- break;
+ /* if not found in static entries, check in dynamic entries */
+ if (!found) {
+ for (j = AddrTable_STATIC_COUNT;
+ j < AddrTable_count[PROCID_TO_IPU(procHandle->procId)]; j++) {
+ ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][j];
+
+ if (ai->isMapped == TRUE) {
+ startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt];
+ endAddr = startAddr + ai->size;
+
+ if ((startAddr <= *dstAddr) && (*dstAddr < endAddr)
+ && ((*dstAddr + sglist[i].size) <= endAddr)) {
+ found = TRUE;
+ ai->refCount++;
+ break;
+ }
}
}
}
}
}
}
/* Delete added entries from translation
* table only in last unmap called on that entry
*/
/* Delete added entries from translation
* table only in last unmap called on that entry
*/
- for (i = 0;
+ for (i = AddrTable_STATIC_COUNT;
i < AddrTable_count[PROCID_TO_IPU(procHandle->procId)]; i++) {
ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][i];
i < AddrTable_count[PROCID_TO_IPU(procHandle->procId)]; i++) {
ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][i];
diff --git a/qnx/src/ipc3x_dev/ti/syslink/family/omap5430/ipu/omap5430BenelliProc.c b/qnx/src/ipc3x_dev/ti/syslink/family/omap5430/ipu/omap5430BenelliProc.c
index 380dc4fa6c0c9ae2a2a8937954e608a805233f57..e76e280b66ac368c0648652b4d78939a0d08282d 100644 (file)
*
* ============================================================================
*
*
* ============================================================================
*
- * Copyright (c) 2010-2015, Texas Instruments Incorporated
+ * Copyright (c) 2010-2016, Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
#define IS_RANGE_VALID(x,min,max) (((x) < (max)) && ((x) >= (min)))
#define IS_RANGE_VALID(x,min,max) (((x) < (max)) && ((x) >= (min)))
+/*!
+ * @brief Number of static entries in address translation table.
+ */
+#define AddrTable_IPU_STATIC_COUNT 1
+#define AddrTable_DSP_STATIC_COUNT 0
+
/*!
* @brief max entries in translation table.
*/
/*!
* @brief max entries in translation table.
*/
/* Number of memory regions */
/* Number of memory regions */
-static UInt32 AddrTable_IPU_count = 0;
-static UInt32 AddrTable_DSP_count = 0;
+static UInt32 AddrTable_IPU_count = AddrTable_IPU_STATIC_COUNT;
+static UInt32 AddrTable_DSP_count = AddrTable_DSP_STATIC_COUNT;
/* Address translation table for IPU */
/* Address translation table for IPU */
-static ProcMgr_AddrInfo OMAP5430BENELLIPROC_addrTable[AddrTable_SIZE];
+static ProcMgr_AddrInfo OMAP5430BENELLIPROC_addrTable[AddrTable_SIZE] =
+{
+ /* L2 RAM */
+ {
+ .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u,
+ .addr[ProcMgr_AddrType_MasterPhys] = 0x55020000u,
+ .addr[ProcMgr_AddrType_SlaveVirt] = 0x20000000u,
+ .addr[ProcMgr_AddrType_SlavePhys] = -1u,
+ .size = 0x10000u,
+ .isCached = FALSE,
+ .mapMask = ProcMgr_SLAVEVIRT,
+ .isMapped = TRUE,
+ .refCount = 0u /* refCount set to 0 for static entry */
+ },
+};
/* Address translation table for DSP */
/* Address translation table for DSP */
-static ProcMgr_AddrInfo OMAP5430TESLAPROC_addrTable[AddrTable_SIZE];
+static ProcMgr_AddrInfo OMAP5430TESLAPROC_addrTable[AddrTable_SIZE] =
+{
+};
/* =============================================================================
* Globals
/* =============================================================================
* Globals
OMAP5430BENELLIPROC_ModuleObject OMAP5430IPU0PROC_state =
{
.config_size = sizeof (OMAP5430BENELLIPROC_Config),
OMAP5430BENELLIPROC_ModuleObject OMAP5430IPU0PROC_state =
{
.config_size = sizeof (OMAP5430BENELLIPROC_Config),
- .defInstParams.numMemEntries = 0,
+ .defInstParams.numMemEntries = AddrTable_IPU_STATIC_COUNT,
.isSetup = FALSE,
.procHandle = NULL,
.gateHandle = NULL
.isSetup = FALSE,
.procHandle = NULL,
.gateHandle = NULL
OMAP5430BENELLIPROC_ModuleObject OMAP5430IPU1PROC_state =
{
.config_size = sizeof (OMAP5430BENELLIPROC_Config),
OMAP5430BENELLIPROC_ModuleObject OMAP5430IPU1PROC_state =
{
.config_size = sizeof (OMAP5430BENELLIPROC_Config),
- .defInstParams.numMemEntries = 0,
+ .defInstParams.numMemEntries = AddrTable_IPU_STATIC_COUNT,
.isSetup = FALSE,
.procHandle = NULL,
.gateHandle = NULL
.isSetup = FALSE,
.procHandle = NULL,
.gateHandle = NULL
OMAP5430TESLAPROC_ModuleObject OMAP5430DSPPROC_state =
{
.config_size = sizeof (OMAP5430TESLAPROC_Config),
OMAP5430TESLAPROC_ModuleObject OMAP5430DSPPROC_state =
{
.config_size = sizeof (OMAP5430TESLAPROC_Config),
- .defInstParams.numMemEntries = 0,
+ .defInstParams.numMemEntries = AddrTable_DSP_STATIC_COUNT,
.isSetup = FALSE,
.procHandle = NULL,
.gateHandle = NULL
.isSetup = FALSE,
.procHandle = NULL,
.gateHandle = NULL
Int i = 0;
ProcMgr_AddrInfo * ai;
ProcMgr_AddrInfo * pMemRegn = NULL;
Int i = 0;
ProcMgr_AddrInfo * ai;
ProcMgr_AddrInfo * pMemRegn = NULL;
+ UInt32 staticCount = 0;
UInt32 * AddrTable_count = NULL;
GT_1trace (curTrace, GT_ENTER, "OMAP5430BENELLIPROC_detach", handle);
UInt32 * AddrTable_count = NULL;
GT_1trace (curTrace, GT_ENTER, "OMAP5430BENELLIPROC_detach", handle);
{
case PROCTYPE_IPU0:
pMemRegn = OMAP5430BENELLIPROC_addrTable;
{
case PROCTYPE_IPU0:
pMemRegn = OMAP5430BENELLIPROC_addrTable;
+ staticCount = AddrTable_IPU_STATIC_COUNT;
AddrTable_count = &AddrTable_IPU_count;
break;
#ifndef IPC_SYSBIOS_SMP
case PROCTYPE_IPU1:
pMemRegn = OMAP5430BENELLIPROC_addrTable;
AddrTable_count = &AddrTable_IPU_count;
break;
#ifndef IPC_SYSBIOS_SMP
case PROCTYPE_IPU1:
pMemRegn = OMAP5430BENELLIPROC_addrTable;
+ staticCount = AddrTable_IPU_STATIC_COUNT;
AddrTable_count = &AddrTable_IPU_count;
break;
#endif
case PROCTYPE_DSP:
pMemRegn = OMAP5430TESLAPROC_addrTable;
AddrTable_count = &AddrTable_IPU_count;
break;
#endif
case PROCTYPE_DSP:
pMemRegn = OMAP5430TESLAPROC_addrTable;
+ staticCount = AddrTable_DSP_STATIC_COUNT;
AddrTable_count = &AddrTable_DSP_count;
break;
}
AddrTable_count = &AddrTable_DSP_count;
break;
}
}
/* delete all dynamically added entries */
}
/* delete all dynamically added entries */
- for (i = 0; i < *AddrTable_count; i++) {
+ for (i = staticCount; i < *AddrTable_count; i++) {
ai = &pMemRegn[i];
ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u;
ai->addr[ProcMgr_AddrType_MasterUsrVirt] = -1u;
ai = &pMemRegn[i];
ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u;
ai->addr[ProcMgr_AddrType_MasterUsrVirt] = -1u;
ai->isMapped = FALSE;
ai->refCount = 0u;
}
ai->isMapped = FALSE;
ai->refCount = 0u;
}
- object->params.numMemEntries = 0;
- *AddrTable_count = 0;
+ object->params.numMemEntries = staticCount;
+ *AddrTable_count = staticCount;
//No need to reset.. that will be done in STOP
/* tmpStatus = OMAP5430BENELLI_halResetCtrl (object->halObject,
//No need to reset.. that will be done in STOP
/* tmpStatus = OMAP5430BENELLI_halResetCtrl (object->halObject,
diff --git a/qnx/src/ipc3x_dev/ti/syslink/resources/RscTable.c b/qnx/src/ipc3x_dev/ti/syslink/resources/RscTable.c
index 875946a6108d7ab5fb1b660ea8e4719a2390326c..489669cd84654840df8ac9d02da4d85d762070d3 100644 (file)
*
* ============================================================================
*
*
* ============================================================================
*
- * Copyright (c) 2012-2015, Texas Instruments Incorporated
+ * Copyright (c) 2012-2016, Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
printf ("RscTable_process: carveout [%s] @ da [0x%08x] pa [0x%08x] len [0x%x]\n", cout->name, cout->da, cout->pa, cout->len);
break;
}
printf ("RscTable_process: carveout [%s] @ da [0x%08x] pa [0x%08x] len [0x%x]\n", cout->name, cout->da, cout->pa, cout->len);
break;
}
- case TYPE_INTMEM :
- {
- struct fw_rsc_intmem * cout = (struct fw_rsc_intmem *)entry;
-
- if (obj->numMemEntries == IPC_MAX_MEMENTRIES) {
- ret = -1;
- }
- else {
- obj->memEntries[obj->numMemEntries].slaveVirtAddr =
- cout->da;
- obj->memEntries[obj->numMemEntries].masterPhysAddr =
- cout->pa;
- obj->memEntries[obj->numMemEntries].size = cout->len;
- /* do not map to slave MMU */
- obj->memEntries[obj->numMemEntries].map = FALSE;
- obj->memEntries[obj->numMemEntries].mapMask =
- ProcMgr_SLAVEVIRT;
- obj->memEntries[obj->numMemEntries].isCached = FALSE;
- obj->memEntries[obj->numMemEntries].isValid = TRUE;
- obj->numMemEntries++;
- }
- printf ("RscTable_process: intmem [%s] @ da [0x%08x]"
- " pa [0x%08x] len [0x%x]\n", cout->name, cout->da,
- cout->pa, cout->len);
- break;
- }
case TYPE_DEVMEM :
{
// only care about mem in DDR for now
case TYPE_DEVMEM :
{
// only care about mem in DDR for now
diff --git a/qnx/src/ipc3x_dev/ti/syslink/resources/rsc_types.h b/qnx/src/ipc3x_dev/ti/syslink/resources/rsc_types.h
index 4dda9e26a8dc62097a98bf8316ff43a629efc4ca..a6de4f9b0033417e56d3e965f734d8b663a5af85 100644 (file)
/*
/*
- * Copyright (c) 2011-2014, Texas Instruments Incorporated
+ * Copyright (c) 2011-2016, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
#define TYPE_DEVMEM 1
#define TYPE_TRACE 2
#define TYPE_VDEV 3
#define TYPE_DEVMEM 1
#define TYPE_TRACE 2
#define TYPE_VDEV 3
-#define TYPE_INTMEM 4
/* Common Resource Structure Types */
struct fw_rsc_carveout {
/* Common Resource Structure Types */
struct fw_rsc_carveout {
Char name[32];
};
Char name[32];
};
-struct fw_rsc_intmem {
- UInt32 type;
- UInt32 version;
- UInt32 da;
- UInt32 pa;
- UInt32 len;
- UInt32 reserved;
- Char name[32];
-};
-
struct fw_rsc_devmem {
UInt32 type;
UInt32 da;
struct fw_rsc_devmem {
UInt32 type;
UInt32 da;