Vayu: Fixed AMMU fault when running SYS/BIOS on IPU1 3.00.01.21_eng
authorRamsey Harris <ramsey@ti.com>
Thu, 30 May 2013 02:33:15 +0000 (19:33 -0700)
committerChris Ring <cring@ti.com>
Thu, 30 May 2013 02:35:37 +0000 (19:35 -0700)
Prevent invalid mailbox accesses for interrupts between core0 and core1
because those interrupts do not use mailboxes.

packages/ti/sdo/ipc/family/vayu/InterruptIpu.c

index 1a2c77ac9fe8041cbdeaec704ddbfae81b2958ee..2914af6cf7f67183421abd8fda31cbcb14507098 100644 (file)
@@ -235,6 +235,8 @@ Int InterruptIpu_Module_startup(Int phase)
 Void InterruptIpu_intEnable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo)
 {
     UInt16 index;
+    Bool useMailbox = TRUE;
+    UInt8 subMbxIdx;
 
     index = MBX_TABLE_IDX(remoteProcId, MultiProc_self());
 
@@ -242,52 +244,62 @@ Void InterruptIpu_intEnable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo)
         if ((remoteProcId == InterruptIpu_ipu1_0ProcId) ||
             (remoteProcId == InterruptIpu_ipu1_1ProcId)) {
             Hwi_enableInterrupt(WUGENIPU);
+            useMailbox = FALSE;
         }
     }
     else {
         if ((remoteProcId == InterruptIpu_ipu2_0ProcId) ||
             (remoteProcId == InterruptIpu_ipu2_1ProcId)) {
             Hwi_enableInterrupt(WUGENIPU);
+            useMailbox = FALSE;
         }
     }
 
-    /*
-     *  If the remote processor communicates via mailboxes, we should enable
+    /*  If the remote processor communicates via mailboxes, we should enable
      *  the Mailbox IRQ instead of enabling the Hwi because multiple mailboxes
      *  share the same Hwi
      */
-    REG32(MAILBOX_IRQENABLE_SET(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index));
+    if (useMailbox) {
+        subMbxIdx = SUBMBX_IDX(index);
+        REG32(MAILBOX_IRQENABLE_SET(index)) = MAILBOX_REG_VAL(subMbxIdx);
+    }
 }
 
 /*
  *  ======== InterruptIpu_intDisable ========
  *  Disables remote processor interrupt
  */
-Void InterruptIpu_intDisable(UInt16 remoteProcId,
-                             IInterrupt_IntInfo *intInfo)
+Void InterruptIpu_intDisable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo)
 {
     UInt16 index;
+    Bool useMailbox = TRUE;
+    UInt8 subMbxIdx;
 
     if (Core_ipuId == 1) {
         if ((remoteProcId == InterruptIpu_ipu1_0ProcId) ||
             (remoteProcId == InterruptIpu_ipu1_1ProcId)) {
             Hwi_disableInterrupt(WUGENIPU);
+            useMailbox = FALSE;
         }
     }
     else {
         if ((remoteProcId == InterruptIpu_ipu2_0ProcId) ||
             (remoteProcId == InterruptIpu_ipu2_1ProcId)) {
             Hwi_disableInterrupt(WUGENIPU);
+            useMailbox = FALSE;
         }
     }
 
     index = MBX_TABLE_IDX(remoteProcId, MultiProc_self());
-    /*
-     *  If the remote processor communicates via mailboxes, we should disable
+
+    /*  If the remote processor communicates via mailboxes, we should disable
      *  the Mailbox IRQ instead of disabling the Hwi because multiple mailboxes
      *  share the same Hwi
      */
-    REG32(MAILBOX_IRQENABLE_CLR(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index));
+    if (useMailbox) {
+        subMbxIdx = SUBMBX_IDX(index);
+        REG32(MAILBOX_IRQENABLE_CLR(index)) = MAILBOX_REG_VAL(subMbxIdx);
+    }
 }
 
 /*
@@ -661,6 +673,11 @@ Void InterruptIpu_intShmMbxStub(UArg arg)
 
         index = MBX_TABLE_IDX(loopIdx, selfIdx);
 
+        /* skip mailbox if it's not being used */
+        if (InterruptIpu_mailboxTable[index] == (UInt32)(-1)) {
+            continue;
+        }
+
         if (((REG32(MAILBOX_STATUS(index)) != 0) &&
              (REG32(MAILBOX_IRQENABLE_SET(index)) &
               MAILBOX_REG_VAL(SUBMBX_IDX(index))))) {